From b7d85655f7a2c72a69d71789fdb74e94864cf510 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Fri, 5 Oct 2018 14:49:20 +0000
Subject: [PATCH] [x86] add test for fneg matching failure; NFC

llvm-svn: 343854
---
 llvm/test/CodeGen/X86/vec_fneg.ll | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/llvm/test/CodeGen/X86/vec_fneg.ll b/llvm/test/CodeGen/X86/vec_fneg.ll
index d198964bf1d7..26c233f7db22 100644
--- a/llvm/test/CodeGen/X86/vec_fneg.ll
+++ b/llvm/test/CodeGen/X86/vec_fneg.ll
@@ -98,3 +98,22 @@ define <2 x float> @fneg_bitcast(i64 %i) nounwind {
   %fneg = fsub <2 x float> <float -0.0, float -0.0>, %bitcast
   ret <2 x float> %fneg
 }
+
+define <4 x float> @undef_elts_v4f32(<4 x float> %x) {
+; X32-SSE-LABEL: undef_elts_v4f32:
+; X32-SSE:       # %bb.0:
+; X32-SSE-NEXT:    movaps {{.*#+}} xmm1 = <-0,u,u,-0>
+; X32-SSE-NEXT:    subps %xmm0, %xmm1
+; X32-SSE-NEXT:    movaps %xmm1, %xmm0
+; X32-SSE-NEXT:    retl
+;
+; X64-SSE-LABEL: undef_elts_v4f32:
+; X64-SSE:       # %bb.0:
+; X64-SSE-NEXT:    movaps {{.*#+}} xmm1 = <-0,u,u,-0>
+; X64-SSE-NEXT:    subps %xmm0, %xmm1
+; X64-SSE-NEXT:    movaps %xmm1, %xmm0
+; X64-SSE-NEXT:    retq
+  %r = fsub <4 x float> <float -0.0, float undef, float undef, float -0.0>, %x
+  ret <4 x float> %r
+}
+