OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

[mips] Add macros _MIPS_ISA and __mips_isa_rev (same expansion as defined by GCC). 

Summary: The Linux Kernel is one example of a piece of software that relies on them.

Reviewers: atanasyan

Reviewed By: atanasyan

Differential Revision: http://reviews.llvm.org/D3756

llvm-svn: 210270
This commit is contained in:
Matheus Almeida 2014-06-05 14:59:18 +00:00
parent 93d68595a9
commit b84b37d606
2 changed files with 28 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
clang/lib/Basic/Targets.cpp
View File

@ -5228,6 +5228,7 @@ public:
CPU = Name;
return true;
}
const std::string& getCPU() const { return CPU; }
void getDefaultFeatures(llvm::StringMap<bool> &Features) const override {
// The backend enables certain ABI's by default according to the
// architecture.
@ -5452,6 +5453,13 @@ public:
MipsTargetInfoBase::getTargetDefines(Opts, Builder);
Builder.defineMacro("__mips", "32");
Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
const std::string& CPUStr = getCPU();
if (CPUStr == "mips32")
Builder.defineMacro("__mips_isa_rev", "1");
else if (CPUStr == "mips32r2")
Builder.defineMacro("__mips_isa_rev", "2");
if (ABI == "o32") {
Builder.defineMacro("__mips_o32");
@ -5587,6 +5595,13 @@ public:
Builder.defineMacro("__mips", "64");
Builder.defineMacro("__mips64");
Builder.defineMacro("__mips64__");
Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
const std::string& CPUStr = getCPU();
if (CPUStr == "mips64")
Builder.defineMacro("__mips_isa_rev", "1");
else if (CPUStr == "mips64r2")
Builder.defineMacro("__mips_isa_rev", "2");
if (ABI == "n32") {
Builder.defineMacro("__mips_n32");

14
clang/test/Preprocessor/init.c
View File

@ -1880,7 +1880,7 @@
// MIPS64EL:#define _mips 1
// MIPS64EL:#define mips 1
//
// Check MIPS arch macros
// Check MIPS arch and isa macros
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
// RUN: < /dev/null \
@ -1888,6 +1888,8 @@
//
// MIPS-ARCH-DEF32:#define _MIPS_ARCH "mips32r2"
// MIPS-ARCH-DEF32:#define _MIPS_ARCH_MIPS32R2 1
// MIPS-ARCH-DEF32:#define _MIPS_ISA _MIPS_ISA_MIPS32
// MIPS-ARCH-DEF32:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-nones \
// RUN: -target-cpu mips32 < /dev/null \
@ -1895,6 +1897,8 @@
//
// MIPS-ARCH-32:#define _MIPS_ARCH "mips32"
// MIPS-ARCH-32:#define _MIPS_ARCH_MIPS32 1
// MIPS-ARCH-32:#define _MIPS_ISA _MIPS_ISA_MIPS32
// MIPS-ARCH-32:#define __mips_isa_rev 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
// RUN: -target-cpu mips32r2 < /dev/null \
@ -1902,6 +1906,8 @@
//
// MIPS-ARCH-32R2:#define _MIPS_ARCH "mips32r2"
// MIPS-ARCH-32R2:#define _MIPS_ARCH_MIPS32R2 1
// MIPS-ARCH-32R2:#define _MIPS_ISA _MIPS_ISA_MIPS32
// MIPS-ARCH-32R2:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: < /dev/null \
@ -1909,6 +1915,8 @@
//
// MIPS-ARCH-DEF64:#define _MIPS_ARCH "mips64r2"
// MIPS-ARCH-DEF64:#define _MIPS_ARCH_MIPS64R2 1
// MIPS-ARCH-DEF64:#define _MIPS_ISA _MIPS_ISA_MIPS64
// MIPS-ARCH-DEF64:#define __mips_isa_rev 2
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu mips64 < /dev/null \
@ -1916,6 +1924,8 @@
//
// MIPS-ARCH-64:#define _MIPS_ARCH "mips64"
// MIPS-ARCH-64:#define _MIPS_ARCH_MIPS64 1
// MIPS-ARCH-64:#define _MIPS_ISA _MIPS_ISA_MIPS64
// MIPS-ARCH-64:#define __mips_isa_rev 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
// RUN: -target-cpu mips64r2 < /dev/null \
@ -1923,6 +1933,8 @@
//
// MIPS-ARCH-64R2:#define _MIPS_ARCH "mips64r2"
// MIPS-ARCH-64R2:#define _MIPS_ARCH_MIPS64R2 1
// MIPS-ARCH-64R2:#define _MIPS_ISA _MIPS_ISA_MIPS64
// MIPS-ARCH-64R2:#define __mips_isa_rev 2
//
// Check MIPS float ABI macros
//