From bfe2c24c801f2b5112a1fbe1b09ea4b58ec78169 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 22 May 2011 18:28:46 +0000 Subject: [PATCH] add a note. llvm-svn: 131863 --- llvm/lib/Target/README.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/llvm/lib/Target/README.txt b/llvm/lib/Target/README.txt index 0105ae4562a9..260cb5ccab34 100644 --- a/llvm/lib/Target/README.txt +++ b/llvm/lib/Target/README.txt @@ -2346,3 +2346,13 @@ Note that bb1 and bb2 are the same. This doesn't happen at the IR level because one call is passing an i32 and the other is passing an i64. //===---------------------------------------------------------------------===// + +I see this sort of pattern in 176.gcc in a few places (e.g. the start of +store_bit_field). The rem should be replaced with a multiply and subtract: + + %3 = sdiv i32 %A, %B + %4 = srem i32 %A, %B + +Similarly for udiv/urem. + +//===---------------------------------------------------------------------===//