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[X86] Use ISD::CONCAT_VECTORS when splitting 256-bit loads in combineLoad. 

llvm-svn: 321537
This commit is contained in:
Craig Topper 2017-12-28 19:46:06 +00:00
parent 4b311da3a4
commit c0b6cb1e47
1 changed files with 1 additions and 3 deletions
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4
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -34057,9 +34057,7 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
Load1.getValue(1), Load1.getValue(1),
Load2.getValue(1)); Load2.getValue(1));
SDValue NewVec = DAG.getUNDEF(RegVT); SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2);
NewVec = insert128BitVector(NewVec, Load1, 0, DAG, dl);
NewVec = insert128BitVector(NewVec, Load2, NumElems / 2, DAG, dl);
return DCI.CombineTo(N, NewVec, TF, true); return DCI.CombineTo(N, NewVec, TF, true);
} }