OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

fix BranchCC with a setCC with an arg of 0 

llvm-svn: 22203
This commit is contained in:
Andrew Lenharth 2005-06-08 18:02:21 +00:00
parent 8086cfaa6a
commit c504a3db60
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -899,8 +899,8 @@ void ISel::SelectBranchCC(SDOperand N)
//Dropping the CC is only useful if we are comparing to 0
bool LeftZero = SetCC->getOperand(0).getOpcode() == ISD::Constant &&
cast<ConstantSDNode>(SetCC->getOperand(0))->getValue() == 0;
bool RightZero = SetCC->getOperand(0).getOpcode() == ISD::Constant &&
cast<ConstantSDNode>(SetCC->getOperand(0))->getValue() == 0;
bool RightZero = SetCC->getOperand(1).getOpcode() == ISD::Constant &&
cast<ConstantSDNode>(SetCC->getOperand(1))->getValue() == 0;
bool isNE = false;
//Fix up CC
@ -912,7 +912,7 @@ void ISel::SelectBranchCC(SDOperand N)
isNE = true;
if (LeftZero || RightZero) {
switch (SetCC->getCondition()) {
switch (cCode) {
default: CC.Val->dump(); assert(0 && "Unknown integer comparison!");
case ISD::SETEQ: Opc = Alpha::BEQ; break;
case ISD::SETLT: Opc = Alpha::BLT; break;