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[X86] Fix isel pattern that was looking for a bitcasted load. Remove what appears to be a copy/paste mistake. 

DAG combine should ensure bitcasts of loads don't exist.

Also remove 3 patterns that are identical to the block above them.

llvm-svn: 364158
This commit is contained in:
Craig Topper 2019-06-23 19:17:50 +00:00
parent 9bc3141dc2
commit c8d94e7889
1 changed files with 1 additions and 13 deletions
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14
llvm/lib/Target/X86/X86InstrAVX512.td
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@ -9797,19 +9797,7 @@ defm : AVX512_pmovx_patterns<"VPMOVZX", zext, zext_invec>;
let Predicates = [HasAVX512, NoBWI] in {
def: Pat<(v16i8 (trunc (v16i16 VR256X:$src))),
(VPMOVDBZrr (v16i32 (VPMOVZXWDZrr VR256X:$src)))>;
def: Pat<(v16i8 (trunc (bc_v16i16 (loadv4i64 addr:$src)))),
(VPMOVDBZrr (v16i32 (VPMOVZXWDZrm addr:$src)))>;
def: Pat<(store (v16i8 (trunc (v16i16 VR256X:$src))), addr:$dst),
(VPMOVDBZmr addr:$dst, (v16i32 (VPMOVZXWDZrr VR256X:$src)))>;
}
// Without BWI we can't do a trunc from v16i16 to v16i8. DAG combine can merge
// ext+trunc aggresively making it impossible to legalize the DAG to this
// pattern directly.
let Predicates = [HasAVX512, NoBWI] in {
def: Pat<(v16i8 (trunc (v16i16 VR256X:$src))),
(VPMOVDBZrr (v16i32 (VPMOVZXWDZrr VR256X:$src)))>;
def: Pat<(v16i8 (trunc (bc_v16i16 (loadv4i64 addr:$src)))),
def: Pat<(v16i8 (trunc (loadv16i16 addr:$src))),
(VPMOVDBZrr (v16i32 (VPMOVZXWDZrm addr:$src)))>;
def: Pat<(store (v16i8 (trunc (v16i16 VR256X:$src))), addr:$dst),
(VPMOVDBZmr addr:$dst, (v16i32 (VPMOVZXWDZrr VR256X:$src)))>;