ARM vqdmulh assembly parsing for the lane index operand.
llvm-svn: 142386
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			@ -2009,8 +2009,8 @@ class N3VDInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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class N3VDIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin,
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                string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp>
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  : N3VLane32<0, 1, op21_20, op11_8, 1, 0,
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        (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, nohash_imm:$lane),
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        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm[$lane]", "",
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        (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, VectorIndex32:$lane),
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        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm$lane", "",
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        [(set (Ty DPR:$Vd),
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              (Ty (IntOp (Ty DPR:$Vn),
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                         (Ty (NEONvduplane (Ty DPR_VFP2:$Vm),
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			@ -2020,8 +2020,8 @@ class N3VDIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin,
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class N3VDIntSL16<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin,
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                  string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp>
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  : N3VLane16<0, 1, op21_20, op11_8, 1, 0,
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        (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, nohash_imm:$lane),
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        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm[$lane]", "",
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        (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, VectorIndex16:$lane),
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        NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm$lane", "",
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        [(set (Ty DPR:$Vd),
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              (Ty (IntOp (Ty DPR:$Vn),
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                         (Ty (NEONvduplane (Ty DPR_8:$Vm), imm:$lane)))))]> {
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			@ -31,13 +31,13 @@
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	vqdmulh.s32	d16, d16, d17
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	vqdmulh.s16	q8, q8, q9
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	vqdmulh.s32	q8, q8, q9
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@	vqdmulh.s16	d11, d2, d3[0]
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	vqdmulh.s16	d11, d2, d3[0]
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@ CHECK: vqdmulh.s16	d16, d16, d17   @ encoding: [0x50,0xef,0xa1,0x0b]
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@ CHECK: vqdmulh.s32	d16, d16, d17   @ encoding: [0x60,0xef,0xa1,0x0b]
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@ CHECK: vqdmulh.s16	q8, q8, q9      @ encoding: [0x50,0xef,0xe2,0x0b]
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@ CHECK: vqdmulh.s32	q8, q8, q9      @ encoding: [0x60,0xef,0xe2,0x0b]
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@ FIXME: vqdmulh.s16	d11, d2, d3[0]  @ encoding: [0x92,0xef,0x43,0xbc]
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@ CHECK: vqdmulh.s16	d11, d2, d3[0]  @ encoding: [0x92,0xef,0x43,0xbc]
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	vqrdmulh.s16	d16, d16, d17
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