[SVE] Remove bad calls to VectorType::getNumElements() from X86
Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D85156
This commit is contained in:
Christopher Tetreault
parent
adb5c23f8c
commit
c9e6887f83
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@ -202,7 +202,7 @@ static Value *simplifyX86immShift(const IntrinsicInst &II,
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auto Vec = II.getArgOperand(0);
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auto Amt = II.getArgOperand(1);
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auto VT = cast<VectorType>(Vec->getType());
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auto VT = cast<FixedVectorType>(Vec->getType());
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auto SVT = VT->getElementType();
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auto AmtVT = Amt->getType();
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unsigned VWidth = VT->getNumElements();
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@ -234,7 +234,7 @@ static Value *simplifyX86immShift(const IntrinsicInst &II,
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assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 &&
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cast<VectorType>(AmtVT)->getElementType() == SVT &&
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"Unexpected shift-by-scalar type");
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unsigned NumAmtElts = cast<VectorType>(AmtVT)->getNumElements();
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unsigned NumAmtElts = cast<FixedVectorType>(AmtVT)->getNumElements();
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APInt DemandedLower = APInt::getOneBitSet(NumAmtElts, 0);
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APInt DemandedUpper = APInt::getBitsSet(NumAmtElts, 1, NumAmtElts / 2);
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KnownBits KnownLowerBits = llvm::computeKnownBits(
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@ -350,7 +350,7 @@ static Value *simplifyX86varShift(const IntrinsicInst &II,
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auto Vec = II.getArgOperand(0);
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auto Amt = II.getArgOperand(1);
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auto VT = cast<VectorType>(II.getType());
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auto VT = cast<FixedVectorType>(II.getType());
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auto SVT = VT->getElementType();
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int NumElts = VT->getNumElements();
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int BitWidth = SVT->getIntegerBitWidth();
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@ -448,10 +448,10 @@ static Value *simplifyX86pack(IntrinsicInst &II,
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if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))
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return UndefValue::get(ResTy);
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auto *ArgTy = cast<VectorType>(Arg0->getType());
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auto *ArgTy = cast<FixedVectorType>(Arg0->getType());
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unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128;
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unsigned NumSrcElts = ArgTy->getNumElements();
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assert(cast<VectorType>(ResTy)->getNumElements() == (2 * NumSrcElts) &&
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assert(cast<FixedVectorType>(ResTy)->getNumElements() == (2 * NumSrcElts) &&
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"Unexpected packing types");
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unsigned NumSrcEltsPerLane = NumSrcElts / NumLanes;
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@ -513,7 +513,7 @@ static Value *simplifyX86movmsk(const IntrinsicInst &II,
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if (isa<UndefValue>(Arg))
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return Constant::getNullValue(ResTy);
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auto *ArgTy = dyn_cast<VectorType>(Arg->getType());
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auto *ArgTy = dyn_cast<FixedVectorType>(Arg->getType());
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// We can't easily peek through x86_mmx types.
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if (!ArgTy)
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return nullptr;
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@ -567,7 +567,7 @@ static Value *simplifyX86insertps(const IntrinsicInst &II,
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if (!CInt)
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return nullptr;
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VectorType *VecTy = cast<VectorType>(II.getType());
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auto *VecTy = cast<FixedVectorType>(II.getType());
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assert(VecTy->getNumElements() == 4 && "insertps with wrong vector type");
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// The immediate permute control byte looks like this:
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@ -810,7 +810,7 @@ static Value *simplifyX86pshufb(const IntrinsicInst &II,
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if (!V)
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return nullptr;
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auto *VecTy = cast<VectorType>(II.getType());
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auto *VecTy = cast<FixedVectorType>(II.getType());
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unsigned NumElts = VecTy->getNumElements();
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assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
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"Unexpected number of elements in shuffle mask!");
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@ -855,7 +855,7 @@ static Value *simplifyX86vpermilvar(const IntrinsicInst &II,
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if (!V)
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return nullptr;
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auto *VecTy = cast<VectorType>(II.getType());
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auto *VecTy = cast<FixedVectorType>(II.getType());
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unsigned NumElts = VecTy->getNumElements();
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bool IsPD = VecTy->getScalarType()->isDoubleTy();
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unsigned NumLaneElts = IsPD ? 2 : 4;
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@ -903,7 +903,7 @@ static Value *simplifyX86vpermv(const IntrinsicInst &II,
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if (!V)
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return nullptr;
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auto *VecTy = cast<VectorType>(II.getType());
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auto *VecTy = cast<FixedVectorType>(II.getType());
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unsigned Size = VecTy->getNumElements();
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assert((Size == 4 || Size == 8 || Size == 16 || Size == 32 || Size == 64) &&
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"Unexpected shuffle mask size");
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@ -1084,7 +1084,7 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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// These intrinsics only demand the 0th element of their input vectors. If
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// we can simplify the input based on that, do so now.
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Value *Arg = II.getArgOperand(0);
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unsigned VWidth = cast<VectorType>(Arg->getType())->getNumElements();
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unsigned VWidth = cast<FixedVectorType>(Arg->getType())->getNumElements();
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg, VWidth, 1)) {
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return IC.replaceOperand(II, 0, V);
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}
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@ -1136,7 +1136,7 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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bool MadeChange = false;
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Value *Arg0 = II.getArgOperand(0);
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Value *Arg1 = II.getArgOperand(1);
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unsigned VWidth = cast<VectorType>(Arg0->getType())->getNumElements();
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unsigned VWidth = cast<FixedVectorType>(Arg0->getType())->getNumElements();
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg0, VWidth, 1)) {
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IC.replaceOperand(II, 0, V);
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MadeChange = true;
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@ -1362,7 +1362,7 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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Value *Arg1 = II.getArgOperand(1);
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assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&
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"Unexpected packed shift size");
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unsigned VWidth = cast<VectorType>(Arg1->getType())->getNumElements();
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unsigned VWidth = cast<FixedVectorType>(Arg1->getType())->getNumElements();
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {
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return IC.replaceOperand(II, 1, V);
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@ -1433,7 +1433,8 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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bool MadeChange = false;
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Value *Arg0 = II.getArgOperand(0);
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Value *Arg1 = II.getArgOperand(1);
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unsigned VWidth = cast<VectorType>(Arg0->getType())->getNumElements();
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unsigned VWidth =
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cast<FixedVectorType>(Arg0->getType())->getNumElements();
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APInt UndefElts1(VWidth, 0);
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APInt DemandedElts1 =
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@ -1476,8 +1477,8 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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case Intrinsic::x86_sse4a_extrq: {
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Value *Op0 = II.getArgOperand(0);
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Value *Op1 = II.getArgOperand(1);
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unsigned VWidth0 = cast<VectorType>(Op0->getType())->getNumElements();
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unsigned VWidth1 = cast<VectorType>(Op1->getType())->getNumElements();
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unsigned VWidth0 = cast<FixedVectorType>(Op0->getType())->getNumElements();
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unsigned VWidth1 = cast<FixedVectorType>(Op1->getType())->getNumElements();
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assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
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Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth0 == 2 &&
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VWidth1 == 16 && "Unexpected operand sizes");
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@ -1517,7 +1518,7 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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// EXTRQI: Extract Length bits starting from Index. Zero pad the remaining
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// bits of the lower 64-bits. The upper 64-bits are undefined.
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Value *Op0 = II.getArgOperand(0);
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unsigned VWidth = cast<VectorType>(Op0->getType())->getNumElements();
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unsigned VWidth = cast<FixedVectorType>(Op0->getType())->getNumElements();
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assert(Op0->getType()->getPrimitiveSizeInBits() == 128 && VWidth == 2 &&
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"Unexpected operand size");
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@ -1541,10 +1542,10 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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case Intrinsic::x86_sse4a_insertq: {
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Value *Op0 = II.getArgOperand(0);
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Value *Op1 = II.getArgOperand(1);
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unsigned VWidth = cast<VectorType>(Op0->getType())->getNumElements();
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unsigned VWidth = cast<FixedVectorType>(Op0->getType())->getNumElements();
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assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
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Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth == 2 &&
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cast<VectorType>(Op1->getType())->getNumElements() == 2 &&
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cast<FixedVectorType>(Op1->getType())->getNumElements() == 2 &&
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"Unexpected operand size");
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// See if we're dealing with constant values.
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@ -1577,8 +1578,8 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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// undefined.
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Value *Op0 = II.getArgOperand(0);
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Value *Op1 = II.getArgOperand(1);
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unsigned VWidth0 = cast<VectorType>(Op0->getType())->getNumElements();
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unsigned VWidth1 = cast<VectorType>(Op1->getType())->getNumElements();
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unsigned VWidth0 = cast<FixedVectorType>(Op0->getType())->getNumElements();
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unsigned VWidth1 = cast<FixedVectorType>(Op1->getType())->getNumElements();
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assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
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Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth0 == 2 &&
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VWidth1 == 2 && "Unexpected operand sizes");
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@ -1650,9 +1651,9 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
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"Not expecting mask and operands with different sizes");
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unsigned NumMaskElts =
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cast<VectorType>(Mask->getType())->getNumElements();
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cast<FixedVectorType>(Mask->getType())->getNumElements();
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unsigned NumOperandElts =
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cast<VectorType>(II.getType())->getNumElements();
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cast<FixedVectorType>(II.getType())->getNumElements();
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if (NumMaskElts == NumOperandElts) {
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return SelectInst::Create(BoolVec, Op1, Op0);
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}
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@ -1768,7 +1769,7 @@ Optional<Value *> X86TTIImpl::simplifyDemandedUseBitsIntrinsic(
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ArgWidth = 8; // Arg is x86_mmx, but treated as <8 x i8>.
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} else {
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auto Arg = II.getArgOperand(0);
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auto ArgType = cast<VectorType>(Arg->getType());
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auto ArgType = cast<FixedVectorType>(Arg->getType());
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ArgWidth = ArgType->getNumElements();
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}
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@ -1934,7 +1935,7 @@ Optional<Value *> X86TTIImpl::simplifyDemandedVectorEltsIntrinsic(
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case Intrinsic::x86_avx512_packusdw_512:
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case Intrinsic::x86_avx512_packuswb_512: {
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auto *Ty0 = II.getArgOperand(0)->getType();
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unsigned InnerVWidth = cast<VectorType>(Ty0)->getNumElements();
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unsigned InnerVWidth = cast<FixedVectorType>(Ty0)->getNumElements();
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assert(VWidth == (InnerVWidth * 2) && "Unexpected input size");
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unsigned NumLanes = Ty0->getPrimitiveSizeInBits() / 128;
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