OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

Added machine-independent value for INVALID_MACHINE_OPCODE. 

Just cosmetic changes otherwise.

llvm-svn: 1898
This commit is contained in:
Vikram S. Adve 2002-03-18 03:19:38 +00:00
parent a1cbf5e076
commit c9fc306b70
2 changed files with 26 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
llvm/include/llvm/Target/MachineInstrInfo.h
View File

@ -28,6 +28,9 @@ typedef int MachineOpCode;
typedef int OpCodeMask; typedef int OpCodeMask;
typedef int InstrSchedClass; typedef int InstrSchedClass;
const MachineOpCode INVALID_MACHINE_OPCODE = -1;
// Global variable holding an array of descriptors for machine instructions. // Global variable holding an array of descriptors for machine instructions.
// The actual object needs to be created separately for each target machine. // The actual object needs to be created separately for each target machine.
// This variable is initialized and reset by class MachineInstrInfo. // This variable is initialized and reset by class MachineInstrInfo.
@ -182,17 +185,10 @@ public:
bool isDummyPhiInstr(const MachineOpCode opCode) const { bool isDummyPhiInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG; return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
} }
// delete this later *******
bool isPhi(const MachineOpCode opCode) const
{ return isDummyPhiInstr(opCode); }
bool isPseudoInstr(const MachineOpCode opCode) const { bool isPseudoInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_PSEUDO_FLAG; return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
} }
// Check if an instruction can be issued before its operands are ready, // Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued // or if a subsequent instruction that uses its result can be issued
// before the results are ready. // before the results are ready.
@ -220,7 +216,7 @@ public:
// //
// Which operand holds an immediate constant? Returns -1 if none // Which operand holds an immediate constant? Returns -1 if none
// //
virtual int getImmmedConstantPos(MachineOpCode opCode) const { virtual int getImmedConstantPos(MachineOpCode opCode) const {
return -1; // immediate position is machine specific, so say -1 == "none" return -1; // immediate position is machine specific, so say -1 == "none"
} }
@ -252,7 +248,8 @@ public:
// The generated instructions are returned in `minstrVec'. // The generated instructions are returned in `minstrVec'.
// Any temp. registers (TmpInstruction) created are returned in `tempVec'. // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
// //
virtual void CreateCodeToLoadConst(Value* val, virtual void CreateCodeToLoadConst(Method* method,
Value* val,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& minstrVec, std::vector<MachineInstr*>& minstrVec,
std::vector<TmpInstruction*> &) const = 0; std::vector<TmpInstruction*> &) const = 0;
@ -283,11 +280,12 @@ public:
// create copy instruction(s) // create copy instruction(s)
virtual void virtual void CreateCopyInstructionsByType(const TargetMachine& target,
CreateCopyInstructionsByType(const TargetMachine& target, Method* method,
Value* src, Value* src,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& minstrVec) const = 0; std::vector<MachineInstr*>& minstrVec)
const = 0;
}; };
#endif #endif

28
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -28,6 +28,9 @@ typedef int MachineOpCode;
typedef int OpCodeMask; typedef int OpCodeMask;
typedef int InstrSchedClass; typedef int InstrSchedClass;
const MachineOpCode INVALID_MACHINE_OPCODE = -1;
// Global variable holding an array of descriptors for machine instructions. // Global variable holding an array of descriptors for machine instructions.
// The actual object needs to be created separately for each target machine. // The actual object needs to be created separately for each target machine.
// This variable is initialized and reset by class MachineInstrInfo. // This variable is initialized and reset by class MachineInstrInfo.
@ -182,17 +185,10 @@ public:
bool isDummyPhiInstr(const MachineOpCode opCode) const { bool isDummyPhiInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG; return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
} }
// delete this later *******
bool isPhi(const MachineOpCode opCode) const
{ return isDummyPhiInstr(opCode); }
bool isPseudoInstr(const MachineOpCode opCode) const { bool isPseudoInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_PSEUDO_FLAG; return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
} }
// Check if an instruction can be issued before its operands are ready, // Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued // or if a subsequent instruction that uses its result can be issued
// before the results are ready. // before the results are ready.
@ -220,7 +216,7 @@ public:
// //
// Which operand holds an immediate constant? Returns -1 if none // Which operand holds an immediate constant? Returns -1 if none
// //
virtual int getImmmedConstantPos(MachineOpCode opCode) const { virtual int getImmedConstantPos(MachineOpCode opCode) const {
return -1; // immediate position is machine specific, so say -1 == "none" return -1; // immediate position is machine specific, so say -1 == "none"
} }
@ -252,7 +248,8 @@ public:
// The generated instructions are returned in `minstrVec'. // The generated instructions are returned in `minstrVec'.
// Any temp. registers (TmpInstruction) created are returned in `tempVec'. // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
// //
virtual void CreateCodeToLoadConst(Value* val, virtual void CreateCodeToLoadConst(Method* method,
Value* val,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& minstrVec, std::vector<MachineInstr*>& minstrVec,
std::vector<TmpInstruction*> &) const = 0; std::vector<TmpInstruction*> &) const = 0;
@ -283,11 +280,12 @@ public:
// create copy instruction(s) // create copy instruction(s)
virtual void virtual void CreateCopyInstructionsByType(const TargetMachine& target,
CreateCopyInstructionsByType(const TargetMachine& target, Method* method,
Value* src, Value* src,
Instruction* dest, Instruction* dest,
std::vector<MachineInstr*>& minstrVec) const = 0; std::vector<MachineInstr*>& minstrVec)
const = 0;
}; };
#endif #endif