[SLP][X86] Regenerate POW2 SDIV Tests
Added non-uniform pow2 test as well llvm-svn: 334819
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Simon Pilgrim
parent
84c11aed10
commit
ca6215f8c8
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@ -1,13 +1,28 @@
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; RUN: opt < %s -basicaa -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basicaa -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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;CHECK-LABEL: @powof2div(
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;CHECK: load <4 x i32>, <4 x i32>*
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;CHECK: add nsw <4 x i32>
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;CHECK: sdiv <4 x i32>
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define void @powof2div(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* noalias nocapture readonly %c){
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define void @powof2div_uniform(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* noalias nocapture readonly %c){
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; CHECK-LABEL: @powof2div_uniform(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1
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; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 1
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; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 1
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; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2
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; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 2
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; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 2
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; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to <4 x i32>*
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; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
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; CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 3
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[C]] to <4 x i32>*
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; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP3]], [[TMP1]]
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; CHECK-NEXT: [[TMP5:%.*]] = sdiv <4 x i32> [[TMP4]], <i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 3
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[A]] to <4 x i32>*
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; CHECK-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = load i32, i32* %b, align 4
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%1 = load i32, i32* %c, align 4
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@ -41,3 +56,70 @@ entry:
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ret void
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}
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define void @powof2div_nonuniform(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* noalias nocapture readonly %c){
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; CHECK-LABEL: @powof2div_nonuniform(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[B:%.*]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[C:%.*]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP0]]
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; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[ADD]], 2
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; CHECK-NEXT: store i32 [[DIV]], i32* [[A:%.*]], align 4
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 1
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; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
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; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 1
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; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
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; CHECK-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP3]], [[TMP2]]
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; CHECK-NEXT: [[DIV6:%.*]] = sdiv i32 [[ADD5]], 4
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; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 1
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; CHECK-NEXT: store i32 [[DIV6]], i32* [[ARRAYIDX7]], align 4
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; CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX8]], align 4
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; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 2
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; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
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; CHECK-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
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; CHECK-NEXT: [[DIV11:%.*]] = sdiv i32 [[ADD10]], 8
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; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 2
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; CHECK-NEXT: store i32 [[DIV11]], i32* [[ARRAYIDX12]], align 4
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; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3
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; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4
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; CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 3
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; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4
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; CHECK-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP7]], [[TMP6]]
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; CHECK-NEXT: [[DIV16:%.*]] = sdiv i32 [[ADD15]], 16
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; CHECK-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 3
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; CHECK-NEXT: store i32 [[DIV16]], i32* [[ARRAYIDX17]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%0 = load i32, i32* %b, align 4
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%1 = load i32, i32* %c, align 4
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%add = add nsw i32 %1, %0
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%div = sdiv i32 %add, 2
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store i32 %div, i32* %a, align 4
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%arrayidx3 = getelementptr inbounds i32, i32* %b, i64 1
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%2 = load i32, i32* %arrayidx3, align 4
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%arrayidx4 = getelementptr inbounds i32, i32* %c, i64 1
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%3 = load i32, i32* %arrayidx4, align 4
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%add5 = add nsw i32 %3, %2
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%div6 = sdiv i32 %add5, 4
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%arrayidx7 = getelementptr inbounds i32, i32* %a, i64 1
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store i32 %div6, i32* %arrayidx7, align 4
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%arrayidx8 = getelementptr inbounds i32, i32* %b, i64 2
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%4 = load i32, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32, i32* %c, i64 2
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%5 = load i32, i32* %arrayidx9, align 4
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%add10 = add nsw i32 %5, %4
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%div11 = sdiv i32 %add10, 8
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%arrayidx12 = getelementptr inbounds i32, i32* %a, i64 2
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store i32 %div11, i32* %arrayidx12, align 4
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%arrayidx13 = getelementptr inbounds i32, i32* %b, i64 3
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%6 = load i32, i32* %arrayidx13, align 4
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%arrayidx14 = getelementptr inbounds i32, i32* %c, i64 3
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%7 = load i32, i32* %arrayidx14, align 4
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%add15 = add nsw i32 %7, %6
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%div16 = sdiv i32 %add15, 16
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%arrayidx17 = getelementptr inbounds i32, i32* %a, i64 3
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store i32 %div16, i32* %arrayidx17, align 4
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ret void
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}
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