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[AMDGPU] Add wave barrier builtin 

The wave barrier represents the discardable barrier. Its main purpose is to
carry convergent attribute, thus preventing illegal CFG optimizations. All lanes
in a wave come to convergence point simultaneously with SIMT, thus no special
instruction is needed in the ISA. The barrier is discarded during code generation.

Differential Revision: https://reviews.llvm.org/D26584

llvm-svn: 287006
This commit is contained in:
Stanislav Mekhanoshin 2016-11-15 18:58:03 +00:00
parent 8013e81def
commit cd433d2811
2 changed files with 8 additions and 0 deletions
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1
clang/include/clang/Basic/BuiltinsAMDGPU.def
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@ -36,6 +36,7 @@ BUILTIN(__builtin_amdgcn_workitem_id_z, "Ui", "nc")
// Instruction builtins. // Instruction builtins.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
BUILTIN(__builtin_amdgcn_s_barrier, "v", "n") BUILTIN(__builtin_amdgcn_s_barrier, "v", "n")
BUILTIN(__builtin_amdgcn_wave_barrier, "v", "n")
BUILTIN(__builtin_amdgcn_div_scale, "dddbb*", "n") BUILTIN(__builtin_amdgcn_div_scale, "dddbb*", "n")
BUILTIN(__builtin_amdgcn_div_scalef, "fffbb*", "n") BUILTIN(__builtin_amdgcn_div_scalef, "fffbb*", "n")
BUILTIN(__builtin_amdgcn_div_fmas, "ddddb", "nc") BUILTIN(__builtin_amdgcn_div_fmas, "ddddb", "nc")

7
clang/test/CodeGenOpenCL/builtins-amdgcn.cl
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@ -270,6 +270,13 @@ void test_s_barrier()
__builtin_amdgcn_s_barrier(); __builtin_amdgcn_s_barrier();
} }
// CHECK-LABEL: @test_wave_barrier
// CHECK: call void @llvm.amdgcn.wave.barrier(
void test_wave_barrier()
{
__builtin_amdgcn_wave_barrier();
}
// CHECK-LABEL: @test_s_memtime // CHECK-LABEL: @test_s_memtime
// CHECK: call i64 @llvm.amdgcn.s.memtime() // CHECK: call i64 @llvm.amdgcn.s.memtime()
void test_s_memtime(global ulong* out) void test_s_memtime(global ulong* out)