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Encode condition code for Thumb1 conditional branch instruction. 

llvm-svn: 120865
This commit is contained in:
Jim Grosbach 2010-12-04 00:20:40 +00:00
parent eed4b5b230
commit ce18d7ebb5
1 changed files with 6 additions and 3 deletions
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9
llvm/lib/Target/ARM/ARMInstrThumb.td
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@ -475,10 +475,13 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
// FIXME: should be able to write a pattern for ARMBrcond, but can't use
// a two-value operand where a dag node expects two operands. :(
let isBranch = 1, isTerminator = 1 in
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), IIC_Br,
"b$cc\t$target",
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$p), IIC_Br,
"b${p}\t$target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>,
T1Encoding<{1,1,0,1,?,?}>;
T1Encoding<{1,1,0,1,?,?}> {
bits<4> p;
let Inst{11-8} = p;
}
// Compare and branch on zero / non-zero
let isBranch = 1, isTerminator = 1 in {