OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

Fixed release build after D89170

This commit is contained in:
Stanislav Mekhanoshin 2020-10-26 15:55:59 -07:00
parent 745c1671b1
commit d176e13ca5
1 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
View File

@ -490,15 +490,16 @@ void SIRegisterInfo::resolveFrameIndex(MachineInstr &MI, Register BaseReg,
MachineOperand *FIOp =
TII->getNamedOperand(MI, IsFlat ? AMDGPU::OpName::saddr
: AMDGPU::OpName::vaddr);
MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
int64_t NewOffset = OffsetOp->getImm() + Offset;
#ifndef NDEBUG
MachineBasicBlock *MBB = MI.getParent();
MachineFunction *MF = MBB->getParent();
assert(FIOp && FIOp->isFI() && "frame index must be address operand");
assert(TII->isMUBUF(MI) || TII->isFLATScratch(MI));
MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset);
int64_t NewOffset = OffsetOp->getImm() + Offset;
if (IsFlat) {
assert(TII->isLegalFLATOffset(NewOffset, AMDGPUAS::PRIVATE_ADDRESS, true) &&
"offset should be legal");