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R600: Remove DIV_INF 

This corresponded to an amdil instruction which there is
a 2 instruction equivalent for.

llvm-svn: 211616
This commit is contained in:
Matt Arsenault 2014-06-24 17:42:16 +00:00
parent bcc6004a0e
commit d40b970616
2 changed files with 2 additions and 3 deletions
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4
llvm/lib/Target/R600/AMDGPUISelLowering.cpp
View File

@ -1246,7 +1246,8 @@ SDValue AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const {
SDValue fb = DAG.getNode(ISD::SINT_TO_FP, DL, FLTTY, ib);
// float fq = native_divide(fa, fb);
SDValue fq = DAG.getNode(AMDGPUISD::DIV_INF, DL, FLTTY, fa, fb);
SDValue fq = DAG.getNode(ISD::FMUL, DL, FLTTY,
fa, DAG.getNode(AMDGPUISD::RCP, DL, FLTTY, fb));
// fq = trunc(fq);
fq = DAG.getNode(ISD::FTRUNC, DL, FLTTY, fq);
@ -2031,7 +2032,6 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {
// AMDIL DAG nodes
NODE_NAME_CASE(CALL);
NODE_NAME_CASE(UMUL);
NODE_NAME_CASE(DIV_INF);
NODE_NAME_CASE(RET_FLAG);
NODE_NAME_CASE(BRANCH_COND);

1
llvm/lib/Target/R600/AMDGPUISelLowering.h
View File

@ -165,7 +165,6 @@ enum {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
CALL, // Function call based on a single integer
UMUL, // 32bit unsigned multiplication
DIV_INF, // Divide with infinity returned on zero divisor
RET_FLAG,
BRANCH_COND,
// End AMDIL ISD Opcodes