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tsan: fix memory barriers in atomics 

llvm-svn: 169379
This commit is contained in:
Dmitry Vyukov 2012-12-05 13:14:55 +00:00
parent 94b257df3c
commit d413d8cfa9
1 changed files with 7 additions and 1 deletions
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8
compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cc
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@ -115,7 +115,10 @@ static morder ConvertOrder(morder mo) {
}
template<typename T> T func_xchg(volatile T *v, T op) {
return __sync_lock_test_and_set(v, op);
T res = __sync_lock_test_and_set(v, op);
// __sync_lock_test_and_set does not contain full barrier.
__sync_synchronize();
return res;
}
template<typename T> T func_add(volatile T *v, T op) {
@ -255,6 +258,9 @@ static void AtomicStore(ThreadState *thr, uptr pc, volatile T *a, T v,
thr->clock.ReleaseStore(&s->clock);
*a = v;
s->mtx.Unlock();
// Trainling memory barrier to provide sequential consistency
// for Dekker-like store-load synchronization.
__sync_synchronize();
}
template<typename T, T (*F)(volatile T *v, T op)>