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[X86][SSE] Drop PMADDWD in lowerMul 

As mentioned in D42258, we don't need this any more

llvm-svn: 323540
This commit is contained in:
Simon Pilgrim 2018-01-26 16:57:36 +00:00
parent 9896238dc9
commit d567c27c84
1 changed files with 0 additions and 7 deletions
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7
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -22262,13 +22262,6 @@ static SDValue LowerMUL(SDValue Op, const X86Subtarget &Subtarget,
assert(Subtarget.hasSSE2() && !Subtarget.hasSSE41() && assert(Subtarget.hasSSE2() && !Subtarget.hasSSE41() &&
"Should not custom lower when pmulld is available!"); "Should not custom lower when pmulld is available!");
// If the upper 17 bits of each element are zero then we can use PMADDWD.
APInt Mask17 = APInt::getHighBitsSet(32, 17);
if (DAG.MaskedValueIsZero(A, Mask17) && DAG.MaskedValueIsZero(B, Mask17))
return DAG.getNode(X86ISD::VPMADDWD, dl, VT,
DAG.getBitcast(MVT::v8i16, A),
DAG.getBitcast(MVT::v8i16, B));
// Extract the odd parts. // Extract the odd parts.
static const int UnpackMask[] = { 1, -1, 3, -1 }; static const int UnpackMask[] = { 1, -1, 3, -1 };
SDValue Aodds = DAG.getVectorShuffle(VT, dl, A, A, UnpackMask); SDValue Aodds = DAG.getVectorShuffle(VT, dl, A, A, UnpackMask);