OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity

Only call isUse/isDef on register operands 

llvm-svn: 30122
This commit is contained in:
Evan Cheng 2006-09-05 20:32:06 +00:00
parent 2656932979
commit ddfb10b5af
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/lib/CodeGen/RegAllocLocal.cpp
View File

@ -552,7 +552,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
for (unsigned i = 0; i != MI->getNumOperands(); ++i) { for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
MachineOperand& MO = MI->getOperand(i); MachineOperand& MO = MI->getOperand(i);
// here we are looking for only used operands (never def&use) // here we are looking for only used operands (never def&use)
if (!MO.isDef() && MO.isRegister() && MO.getReg() && if (MO.isRegister() && !MO.isDef() && MO.getReg() &&
MRegisterInfo::isVirtualRegister(MO.getReg())) MRegisterInfo::isVirtualRegister(MO.getReg()))
MI = reloadVirtReg(MBB, MI, i); MI = reloadVirtReg(MBB, MI, i);
} }
@ -584,7 +584,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// are defined, and marking explicit destinations in the PhysRegsUsed map. // are defined, and marking explicit destinations in the PhysRegsUsed map.
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand& MO = MI->getOperand(i); MachineOperand& MO = MI->getOperand(i);
if (MO.isDef() && MO.isRegister() && MO.getReg() && if (MO.isRegister() && MO.isDef() && MO.getReg() &&
MRegisterInfo::isPhysicalRegister(MO.getReg())) { MRegisterInfo::isPhysicalRegister(MO.getReg())) {
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
PhysRegsEverUsed[Reg] = true; PhysRegsEverUsed[Reg] = true;
@ -626,7 +626,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// //
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand& MO = MI->getOperand(i); MachineOperand& MO = MI->getOperand(i);
if (MO.isDef() && MO.isRegister() && MO.getReg() && if (MO.isRegister() && MO.isDef() && MO.getReg() &&
MRegisterInfo::isVirtualRegister(MO.getReg())) { MRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned DestVirtReg = MO.getReg(); unsigned DestVirtReg = MO.getReg();
unsigned DestPhysReg; unsigned DestPhysReg;