[InstCombine] Merged two test files and regenerated checks using update_test_checks.py. NFC.

llvm-svn: 281478
This commit is contained in:
Andrea Di Biagio 2016-09-14 14:18:21 +00:00
parent f239e6b7a2
commit e8e1af3649
3 changed files with 49 additions and 34 deletions

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@ -1,14 +0,0 @@
; RUN: opt < %s -instcombine -S | grep "ret i64 0" | count 2
define i64 @foo(i32 %x) nounwind {
%y = lshr i32 %x, 1
%r = udiv i32 %y, -1
%z = sext i32 %r to i64
ret i64 %z
}
define i64 @bar(i32 %x) nounwind {
%y = lshr i32 %x, 31
%r = udiv i32 %y, 3
%z = sext i32 %r to i64
ret i64 %z
}

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@ -1,20 +0,0 @@
; RUN: opt < %s -instcombine -S > %t1.ll
; RUN: grep udiv %t1.ll | count 2
; RUN: grep zext %t1.ll | count 2
; PR2274
; The udiv instructions shouldn't be optimized away, and the
; sext instructions should be optimized to zext.
define i64 @bar(i32 %x, i32 %g) nounwind {
%y = lshr i32 %x, 30
%r = udiv i32 %y, %g
%z = sext i32 %r to i64
ret i64 %z
}
define i64 @qux(i32 %x, i32 %v) nounwind {
%y = lshr i32 %x, 31
%r = udiv i32 %y, %v
%z = sext i32 %r to i64
ret i64 %z
}

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@ -0,0 +1,49 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define i64 @test1(i32 %x) nounwind {
; CHECK-LABEL: @test1(
; CHECK-NEXT: ret i64 0
;
%y = lshr i32 %x, 1
%r = udiv i32 %y, -1
%z = sext i32 %r to i64
ret i64 %z
}
define i64 @test2(i32 %x) nounwind {
; CHECK-LABEL: @test2(
; CHECK-NEXT: ret i64 0
;
%y = lshr i32 %x, 31
%r = udiv i32 %y, 3
%z = sext i32 %r to i64
ret i64 %z
}
; The udiv instructions shouldn't be optimized away, and the
; sext instructions should be optimized to zext.
define i64 @test1_PR2274(i32 %x, i32 %g) nounwind {
; CHECK-LABEL: @test1_PR2274(
; CHECK-NEXT: [[Y:%.*]] = lshr i32 %x, 30
; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], %g
; CHECK-NEXT: [[Z1:%.*]] = zext i32 [[R]] to i64
; CHECK-NEXT: ret i64 [[Z1]]
;
%y = lshr i32 %x, 30
%r = udiv i32 %y, %g
%z = sext i32 %r to i64
ret i64 %z
}
define i64 @test2_PR2274(i32 %x, i32 %v) nounwind {
; CHECK-LABEL: @test2_PR2274(
; CHECK-NEXT: [[Y:%.*]] = lshr i32 %x, 31
; CHECK-NEXT: [[R:%.*]] = udiv i32 [[Y]], %v
; CHECK-NEXT: [[Z1:%.*]] = zext i32 [[R]] to i64
; CHECK-NEXT: ret i64 [[Z1]]
;
%y = lshr i32 %x, 31
%r = udiv i32 %y, %v
%z = sext i32 %r to i64
ret i64 %z
}