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Encoding of instructions referencing segments has changed. Do what X86MCCodeEmitter does. 

llvm-svn: 138723
This commit is contained in:
Nicolas Geoffray 2011-08-28 13:07:57 +00:00
parent 52600ee8c3
commit f786bae6ac
1 changed files with 25 additions and 7 deletions
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32
llvm/lib/Target/X86/X86CodeEmitter.cpp
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@ -618,14 +618,32 @@ void Emitter<CodeEmitter>::emitInstruction(MachineInstr &MI,
// Emit segment override opcode prefix as needed. // Emit segment override opcode prefix as needed.
switch (Desc->TSFlags & X86II::SegOvrMask) { switch (Desc->TSFlags & X86II::SegOvrMask) {
case X86II::FS: case 0: {
MCE.emitByte(0x64); // Determine where the memory operand starts, if present.
int MemOperand = X86II::getMemoryOperandNo(Desc->TSFlags);
// No segment override, check for explicit one on memory operand.
if (MemOperand != -1) { // If the instruction has a memory operand.
switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) {
default: assert(0 && "Unknown segment register!");
case 0: break;
case X86::CS: MCE.emitByte(0x2E); break;
case X86::SS: MCE.emitByte(0x36); break;
case X86::DS: MCE.emitByte(0x3E); break;
case X86::ES: MCE.emitByte(0x26); break;
case X86::FS: MCE.emitByte(0x64); break;
case X86::GS: MCE.emitByte(0x65); break;
}
}
}
break; break;
case X86II::GS:
MCE.emitByte(0x65); case X86II::FS:
break; MCE.emitByte(0x64);
default: llvm_unreachable("Invalid segment!"); break;
case 0: break; // No segment override! case X86II::GS:
MCE.emitByte(0x65);
break;
default: llvm_unreachable("Invalid segment!");
} }
// Emit the repeat opcode prefix as needed. // Emit the repeat opcode prefix as needed.