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Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC code. It 

is already in GR64 for the same reasons. Since it isn't allocatable it can't cause
any problems.

llvm-svn: 131787
This commit is contained in:
Cameron Zwarich 2011-05-21 04:13:49 +00:00
parent 2df6c010aa
commit faeb520c97
1 changed files with 1 additions and 1 deletions
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2
llvm/lib/Target/X86/X86RegisterInfo.td
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@ -496,7 +496,7 @@ def GR32_TC : RegisterClass<"X86", [i32], 32, [EAX, ECX, EDX]> {
let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi), (GR16 sub_16bit)]; let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi), (GR16 sub_16bit)];
} }
def GR64_TC : RegisterClass<"X86", [i64], 64, [RAX, RCX, RDX, RSI, RDI, def GR64_TC : RegisterClass<"X86", [i64], 64, [RAX, RCX, RDX, RSI, RDI,
R8, R9, R11]> { R8, R9, R11, RIP]> {
let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi), let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi),
(GR16 sub_16bit), (GR16 sub_16bit),
(GR32_TC sub_32bit)]; (GR32_TC sub_32bit)];