llvm-project

Commit Graph

Author	SHA1	Message	Date
Matt Arsenault	06c192d454	OpaquePtr: Bulk update tests to use typed byval Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.	2020-11-20 14:00:46 -05:00
Krzysztof Parzyszek	a72fad980c	[Hexagon] Replace instruction definitions with auto-generated ones llvm-svn: 294753	2017-02-10 15:33:13 +00:00
Krzysztof Parzyszek	60f0b51485	[Hexagon] Skip byval arguments when checking parameter attributes From the point of view of register assignment, byval parameters are ignored: a byval parameter is not going to be assigned to a register, and it will not affect the assignments of subsequent parameters. When matching registers with parameters in the bit tracker, make sure to skip byval parameters before advancing the registers. llvm-svn: 278375	2016-08-11 18:15:16 +00:00

Author

SHA1

Message

Date

Matt Arsenault

06c192d454

OpaquePtr: Bulk update tests to use typed byval

Upgrade of the IR text tests should be the only thing blocking making
typed byval mandatory. Partially done through regex and partially
manual.

2020-11-20 14:00:46 -05:00

Krzysztof Parzyszek

a72fad980c

[Hexagon] Replace instruction definitions with auto-generated ones

llvm-svn: 294753

2017-02-10 15:33:13 +00:00

Krzysztof Parzyszek

60f0b51485

[Hexagon] Skip byval arguments when checking parameter attributes

From the point of view of register assignment, byval parameters are
ignored: a byval parameter is not going to be assigned to a register,
and it will not affect the assignments of subsequent parameters.
When matching registers with parameters in the bit tracker, make sure
to skip byval parameters before advancing the registers.

llvm-svn: 278375

2016-08-11 18:15:16 +00:00

3 Commits