Commit Graph

952 Commits

Author SHA1 Message Date
Eric Fiselier 4b2c8f75a1 Add __CLANG_ATOMIC_<TYPE>_LOCK_FREE macros for use in MSVC compatibility mode.
Summary:
Libc++ currently implements the `ATOMIC_<TYPE>_LOCK_FREE` macros using the `__GCC_ATOMIC_<TYPE>_LOCK_FREE` macros. However these are not available when MSVC compatibility is enabled even though C11 `_Atomic` is.  This prevents libc++ from correctly implementing `ATOMIC_<TYPE>_LOCK_FREE`.

This patch adds an alternative spelling `__CLANG_ATOMIC_<TYPE>_LOCK_FREE` that is enabled with `-fms-compatibility`.

Reviewers: rsmith, aaron.ballman, majnemer, zturner, compnerd, jfb, rnk

Reviewed By: rsmith

Subscribers: BillyONeal, smeenai, jfb, cfe-commits, dschuff

Differential Revision: https://reviews.llvm.org/D32265

llvm-svn: 300914
2017-04-20 22:53:57 +00:00
Oliver Stannard 233310f3e6 [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64
This macro is defined for arm-none-eabi as of r266625, but it should also be
defined for eabihf and aarch64.

llvm-svn: 300549
2017-04-18 13:12:36 +00:00
Eric Christopher d26d8839d8 When we turn on vsx it should also turn on altivec explicitly, same
with disabling it as well as disabling all vsx specific features when
turning off altivec.

Fixes PR32663.

llvm-svn: 300395
2017-04-15 06:15:00 +00:00
Eric Christopher fc6ffede65 Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf

the -mrtm option will still work normally.

llvm-svn: 298956
2017-03-28 23:03:19 +00:00
Eric Christopher 1e6fedbb83 _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit.
Adjust and add a test for the 32-bit side.

llvm-svn: 298778
2017-03-25 19:26:04 +00:00
Eric Christopher ee21410bdc Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles.
llvm-svn: 298770
2017-03-25 06:37:23 +00:00
Eric Christopher 0d36116394 Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as well.
llvm-svn: 298769
2017-03-25 05:40:13 +00:00
Eric Christopher 2fd2eda0ac Add the _CALL_LINUX preprocessor define for ppc linux platforms.
This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
our ppc suppport post-dates this and it should work on all linux platforms. It
is guaranteed to work on all elfv2 platforms.

llvm-svn: 298765
2017-03-25 03:33:59 +00:00
Eric Christopher 153dad4ca9 __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms rather
than the default of 8 in clang, fix and update tests accordingly.

llvm-svn: 298761
2017-03-25 02:55:21 +00:00
Eric Christopher b70819e6a2 Add preprocessor defines for a bare powerpc64le triple/cpu.
The le triple didn't exist until power8, so use that as a default (this
also matches what gcc does).

llvm-svn: 298759
2017-03-25 02:29:18 +00:00
Eric Christopher 74fa24ff27 Turn on HTM on power8 and later (including powerpc64le) since it's
available by default on those cpus and configurations.

llvm-svn: 298307
2017-03-20 21:12:53 +00:00
Richard Smith 4b0cad0bb8 Bump __cplusplus for C++17 to 201703L per the C++17 DIS.
llvm-svn: 298299
2017-03-20 20:12:48 +00:00
Eric Christopher dec1b92ccc Add a small test for __STRUCT_PARM_ALIGN__ for ppc64 darwin.
llvm-svn: 298006
2017-03-16 22:31:07 +00:00
Joel Jones 15467df982 [AArch64] Vulcan is now ThunderXT99
Broadcom Vulcan is now Cavium ThunderX2T99.

LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113
Corresponding LLVM change: https://reviews.llvm.org/rL297190

Changes to clang to support the change.

Patch by Joel Jones

llvm-svn: 297227
2017-03-07 21:24:53 +00:00
Brad Smith 8e55bd5bbd Set the Int64Type / IntMaxType types correctly for OpenBSD/mips64
llvm-svn: 297098
2017-03-06 23:48:31 +00:00
Brad Smith 9cb3b3bf60 Also test OpenBSD/powerpc here for the various types expected to be the same across archs.
llvm-svn: 296256
2017-02-25 16:35:18 +00:00
Brad Smith 9aa2bf209b Hook up OpenBSD AArch64 support
llvm-svn: 295786
2017-02-21 23:13:09 +00:00
Simon Dardis df827a7165 [mips] Define macros related to -mabicalls in the preprocessor
Summary:
Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in
the preprocessor when -mabicalls is in effect.

Mainline GCC later defined __mips_abicalls when -mabicalls is in effect.

This patch teaches the preprocessor to define these macros when appropriate.

NetBSD does not require the ABICALLS macro.

This resolves PR/31694.

Thanks to Sean Bruno for highlighting this issue!

Reviewers: slthakur, seanbruno

Reviewed By: seanbruno

Subscribers: joerg, brad, emaste, seanbruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D29032

llvm-svn: 295728
2017-02-21 16:01:00 +00:00
Sanne Wouda 0479e69c91 [ARM] Add regression tests for Cortex-M23 and Cortex-M33
Reviewers: rengolin, t.p.northover

Reviewed By: t.p.northover

Subscribers: aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D30100

llvm-svn: 295647
2017-02-20 10:37:01 +00:00
Eric Christopher 32ac5e41ef Add a definition for __STRUCT_PARM_ALIGN__ for elfv2 and 64-bit darwin platforms to match what other compilers produce.
llvm-svn: 295156
2017-02-15 07:50:11 +00:00
George Burgess IV fc9705679e Add support for armv7ve flag in clang (PR31358).
This is a followup change to add v7ve support to clang for gcc
compatibility. Please see r294661.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29773

llvm-svn: 294662
2017-02-09 23:30:10 +00:00
Craig Topper 4574226c3f [X86] Clzero flag addition and inclusion under znver1
1. Adds the command line flag for clzero.
2. Includes the clzero flag under znver1.
3. Defines the macro for clzero.
4. Adds a new file which has the intrinsic definition for clzero instruction.

Patch by Ganesh Gopalasubramanian with some additional tests from me.

Differential revision: https://reviews.llvm.org/D29386

llvm-svn: 294559
2017-02-09 06:10:14 +00:00
Douglas Yung 60fc1dd532 Add check that "#define unix 1" is present for the PS4 target.
llvm-svn: 294534
2017-02-09 00:07:38 +00:00
Craig Topper d2bf7b03e5 [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc.
llvm-svn: 294424
2017-02-08 08:23:40 +00:00
Craig Topper 204ecffdb4 [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.
llvm-svn: 294423
2017-02-08 08:23:17 +00:00
Craig Topper b16cb82c93 [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.
llvm-svn: 294419
2017-02-08 07:56:42 +00:00
Craig Topper 8c708cf6bc [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc.
In the future, we should also add a clwb intrinsic to the backend, a frontend builtin, and an instrinsic header file.

llvm-svn: 294416
2017-02-08 07:36:58 +00:00
Craig Topper 78b4787593 [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc.
llvm-svn: 294411
2017-02-08 06:48:58 +00:00
Saleem Abdulrasool 5602709b98 Revert "Basic: match GCC behaviour for SuS macro"
This reverts commit SVN r294148.  Seems that it was mistaken, and GCC
does still define `__unix` and `unix` when in GNU mode.

llvm-svn: 294332
2017-02-07 19:00:06 +00:00
Ulrich Weigand 82a86cb155 [SystemZ] Provide predefined __ARCH__ and __VX__ macros
GCC 7 will predefine two new macros on s390x:

- __ARCH__ indicates the ISA architecture level
- __VX__ indicates that the vector facility is available

This adds those macros to clang as well to ensure continued
compatibility with GCC.

llvm-svn: 294197
2017-02-06 17:04:22 +00:00
Saleem Abdulrasool c5cddc9fa8 Basic: match GCC behaviour for SuS macro
GCC does not generate `__unix` nor `unix` macros.  The latter already
intrudes into the user's namespace and should be avoided.  Use the
canonical spelling of `__unix__` across all the targets.

llvm-svn: 294148
2017-02-05 22:18:15 +00:00
Alex Lorenz 41d13152b1 [Frontend] The macro that describes the Objective-C bool type should
be defined for non Objective-C code as well

rdar://29794915

Differential Revision: https://reviews.llvm.org/D28349

llvm-svn: 292617
2017-01-20 16:48:25 +00:00
Yaron Keren fa3674017a Fix PR31644 introduced by r287138 and add a regression test.
Thanks Dimitry Andric for the report and fix!

llvm-svn: 292032
2017-01-14 21:12:08 +00:00
Craig Topper c45744ad93 AMD family 17h (znver1) enablement
Summary:
This patch enables the following
1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu).
2. ISAs that are enabled for "znver1" architecture.
3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used.
4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17.
5. For the time being, it uses the btver2 scheduler model.
6. Test file is updated to check this flag.

This is linked to llvm review item https://reviews.llvm.org/D28017

Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper.

Reviewers: RKSimon, craig.topper

Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits

Differential Revision: https://reviews.llvm.org/D28018

llvm-svn: 291544
2017-01-10 06:02:12 +00:00
Justin Lebar b662659355 [CUDA] More correctly inherit primitive types from the host during device compilation.
Summary:
CUDA lets users share structs between the host and device, so for that
and other reasons, primitive types such as ptrdiff_t should be the same
on both sides of the compilation.

Our code to do this wasn't entirely successful.  In particular, we did a
bunch of work during the NVPTXTargetInfo constructor, only to override
it in the NVPTX{32,64}TargetInfo constructors.  It worked well enough on
Linux and Mac, but Windows is LLP64, which is different enough to break
it.

This patch removes the NVPTX{32,64}TargetInfo classes entirely and fixes
the bug described above.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28322

llvm-svn: 291135
2017-01-05 16:53:21 +00:00
Dylan McKay 924fa3abdc Add AVR target and toolchain to Clang
Summary:
Authored by Senthil Kumar Selvaraj

This patch adds barebones support in Clang for the (experimental) AVR target. It uses the integrated assembler for assembly, and the GNU linker for linking, as lld doesn't know about the target yet.

The DataLayout string is the same as the one in AVRTargetMachine.cpp. The alignment specs look wrong to me, as it's an 8 bit target and all types only need 8 bit alignment. Clang failed with a datalayout mismatch error when I tried to change it, so I left it that way for now.

Reviewers: rsmith, dylanmckay, cfe-commits, rengolin

Subscribers: rengolin, jroelofs, wdng

Differential Revision: https://reviews.llvm.org/D27123

llvm-svn: 291082
2017-01-05 05:20:27 +00:00
Tim Northover c67803fb14 ARM: define a macro for the FPv5 FPU in ARM mode.
FPv5 is in Cortex-M7 and the 64-bit CPUs when running in 32-bit mode. The name
is from the Cortex-M7 TRM.

llvm-svn: 290268
2016-12-21 20:49:43 +00:00
Evandro Menezes ba17775c84 Add support for Samsung Exynos M3 (NFC)
llvm-svn: 289614
2016-12-13 23:31:57 +00:00
Benjamin Kramer 6aeb249891 Also recognize -std=iso9899:201x
It should already be handled but a typo in the LANGSTANDARD() definition
was introduced in r147220.

Patch by Alexander Richardson, test case by me.

Differential Revision:https://reviews.llvm.org/D27427

llvm-svn: 288793
2016-12-06 10:23:07 +00:00
Justin Lebar fbe0a57604 [CUDA] Attempt to fix test failures in cuda-macos-includes.cu.
Run clang -cc1 -E instead of -S, in an attempt to make this test work
cross-platform.

llvm-svn: 287292
2016-11-18 01:11:32 +00:00
Justin Lebar f91086b0a8 [CUDA] Initialize our header search using the host triple.
Summary:
This used to work because system headers are found in a (somewhat)
predictable set of locations on Linux.  But this is not the case on
MacOS; without this change, we don't look in the right places for our
headers when doing device-side compilation on Mac.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26776

llvm-svn: 287286
2016-11-18 00:41:27 +00:00
Bruno Cardoso Lopes 6fa3b742e0 [Preprocessor] Support for '-dI' flag
Re-introduce r285411.

Implement the -dI as supported by GCC: Output ‘#include’ directives in addition
to the result of preprocessing.

This change aims to add this option, pass it through to the preprocessor via
the options class, and when inclusions occur we output some information (+ test
cases).

Patch by Steve O'Brien!

Differential Revision: https://reviews.llvm.org/D26089

llvm-svn: 287275
2016-11-17 22:45:31 +00:00
Sylvestre Ledru d340ccc88a Add a new optimization option -Og
Summary:
Just like gcc, we should have the -Og option as more and more software are using it:
https://llvm.org/bugs/show_bug.cgi?id=20765

Reviewers: echristo, dberlin, dblaikie, keith.walker.arm, rengolin

Subscribers: aprantl, friss, mehdi_amini, RKSimon, probinson, majnemer, cfe-commits

Differential Revision: https://reviews.llvm.org/D24998

llvm-svn: 286602
2016-11-11 17:29:56 +00:00
Stephen Hines a89d8ff0ad Define __ANDROID_API__ when specified as part of an Android target.
Summary:
This macro should be defined only when the user directly specifies an
API level as part of an Android target. For any regular Android target,
we leave this macro undefined.

Bug: https://llvm.org/bugs/show_bug.cgi?id=30940

Reviewers: eugenis, pirama

Subscribers: tberghammer, cfe-commits, pirama, eugenis, danalbert

Differential Revision: https://reviews.llvm.org/D26491

llvm-svn: 286543
2016-11-11 01:29:39 +00:00
Douglas Katzman 13f4a91a1f [Sparc] LLONG is not lock-free atomic on v8
Differential Revision: https://reviews.llvm.org/D26286

llvm-svn: 286376
2016-11-09 15:43:51 +00:00
Craig Topper 6c7ecc5341 [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction set is also enabled.
Summary: This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912.

Reviewers: delena, zvi

Subscribers: RKSimon, cfe-commits

Differential Revision: https://reviews.llvm.org/D26306

llvm-svn: 286340
2016-11-09 04:51:03 +00:00
Ulrich Weigand 30354ebb00 [SystemZ] Add -march=archX aliases
For compatibility with other compilers on the platform, allow specifying
levels of the z/Architecture instead of model names with -march.  In
particular, the following aliases are now supported:

  -march=arch8   equals  -march=z10
  -march=arch9   equals  -march=z196
  -march=arch10  equals  -march=zEC12
  -march=arch11  equals  -march=z13

This parallels the equivalent (and prerequisite) LLVM change in r285577.

llvm-svn: 285578
2016-10-31 14:38:05 +00:00
Bruno Cardoso Lopes f16070074e Revert "[Preprocessor] Support for '-dI' flag"
This reverts r285411. Tests failing on
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/141

llvm-svn: 285416
2016-10-28 17:02:10 +00:00
Bruno Cardoso Lopes c9af134dda [Preprocessor] Support for '-dI' flag
Implement the -dI as supported by GCC: Output ‘#include’ directives in addition
to the result of preprocessing.

This change aims to add this option, pass it through to the preprocessor via
the options class, and when inclusions occur we output some information (+ test
cases).

Patch by Steve O'Brien!

Differential Revision: https://reviews.llvm.org/D25153

llvm-svn: 285411
2016-10-28 16:32:10 +00:00
Erik Verbruggen e0bde7554c Do not print include_next/pragma once warnings when input is a header.
r276653 suppressed the pragma once warning when generating a PCH file.
This patch extends that to any main file for which clang is told (with
the -x option) that it's a header file. It will also suppress the
warning "#include_next in primary source file".

Differential Revision: http://reviews.llvm.org/D25989

llvm-svn: 285295
2016-10-27 14:17:10 +00:00