* InstructionScheduling is now a real pass
* InstrSched _uses_ LiveVar analysis, instead of creating it's own copy many times
through a loop. In this was LiveVarAnalysis is actually even SHARED by Register
allocation.
* SchedPriorities is now passed the live var information in
llvm-svn: 1700
(1) Ensure that delay slot instructions are not moved out of place (this
was happening for some CALL instructions). Basically, we need to
move all delay slot instructions out of the graph and handle them
along with the delayed control transfer instruction.
(2) Mark scheduled instructions correctly when instructions are scheduled
in more than one cycle in a single step (due to delay slots).
llvm-svn: 678
Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files
llvm-svn: 566
1. Clean up the TargetMachine structure. No more wierd pointers that have to
be cast around and taken care of by the target.
2. Instruction Scheduling now takes the schedinfo as an argument. The same
should be done with the instinfo, it just isn't now.
llvm-svn: 565
Chris Lattner