llvm-project

Commit Graph

Author	SHA1	Message	Date
Nemanja Ivanovic	ecd8435483	[NFC][PowerPC] Fix register class for patterns using XXPERMDIs There are a few patterns where we use a superclass for inputs to this instruction rather than the correct class. This can sometimes lead to unncessary copies.	2020-04-07 14:06:08 -05:00
Nemanja Ivanovic	1461fb6e78	[PowerPC] Exploit single instruction load-and-splat for word and doubleword We currently produce a load, followed by (possibly a move for integers and) a splat as separate instructions. VSX has always had a splatting load for doublewords, but as of Power9, we have it for words as well. This patch just exploits these instructions. Differential revision: https://reviews.llvm.org/D63624 llvm-svn: 372139	2019-09-17 16:45:20 +00:00

Author

SHA1

Message

Date

Nemanja Ivanovic

ecd8435483

[NFC][PowerPC] Fix register class for patterns using XXPERMDIs

There are a few patterns where we use a superclass for inputs to this
instruction rather than the correct class. This can sometimes lead to
unncessary copies.

2020-04-07 14:06:08 -05:00

Nemanja Ivanovic

1461fb6e78

[PowerPC] Exploit single instruction load-and-splat for word and doubleword

We currently produce a load, followed by (possibly a move for integers and) a
splat as separate instructions. VSX has always had a splatting load for
doublewords, but as of Power9, we have it for words as well. This patch just
exploits these instructions.

Differential revision: https://reviews.llvm.org/D63624

llvm-svn: 372139

2019-09-17 16:45:20 +00:00

2 Commits