Commit Graph

151663 Commits

Author SHA1 Message Date
Craig Topper 4fa0cdbb74 [TableGen][MC] Fix a few places where we didn't hide the underlying type of LaneBitmask very well.
One place compared with 32, which I've replaced with LaneBitmask::BitWidth.

The other places are shifts of a constant 1 by a lane number. But if LaneBitmask were to be a larger type than 32-bits like 64-bits, the 1 would need to be 1ULL to do a 64-bit shift. To hide this I've added a LanebitMask::getLane that hides the shift and make sures the 1 is casted to correct type first.

llvm-svn: 308042
2017-07-14 18:30:09 +00:00
Jakub Kuderski b292c22c8d [Dominators] Make IsPostDominator a template parameter
Summary:
DominatorTreeBase used to have IsPostDominators (bool) member to indicate if the tree is a dominator or a postdominator tree. This made it possible to switch between the two 'modes' at runtime, but it isn't used in practice anywhere.

This patch makes IsPostDominator a template argument. This way, it is easier to switch between different algorithms at compile-time based on this argument and design external utilities around it. It also makes it impossible to incidentally assign a postdominator tree to a dominator tree (and vice versa), and to further simplify template code in GenericDominatorTreeConstruction.

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35315

llvm-svn: 308040
2017-07-14 18:26:09 +00:00
Alfred Huang 5b27072f57 [AMDGPU] Do not insert an instruction into worklist twice in movetovalu
In moveToVALU(), move to vector ALU is performed, all instrs in
the use chain will be visited. We do not want the same node to be
pushed to the visit worklist more than once.

Differential Revision: https://reviews.llvm.org/D34726

llvm-svn: 308039
2017-07-14 17:56:55 +00:00
Jakub Kuderski e1c46554a2 [Dominators] Simplify block and node printing
Summary:
This patch adds `BlockPrinter`-- a small wrapper for printing CFG nodes and DomTree nodes to `raw_ostream`. It is meant to be only used internally, for debugging and printing errors.

Reviewers: dberlin, sanjoy, grosser, davide

Reviewed By: grosser, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35286

llvm-svn: 308036
2017-07-14 16:56:35 +00:00
George Rimar efd3ffb2b6 [llvm-readobj] - Teach readobj to print DT_FILTER dynamic tag in human readable form.
Nothing special here, output format is similar to the format
used by binutils readelf and ELF Tool Chain readelf.

Differential revision: https://reviews.llvm.org/D35351

llvm-svn: 308033
2017-07-14 16:00:16 +00:00
Krzysztof Parzyszek 9c084fc55d [Hexagon] Add intrinsics for data cache operations
This is the LLVM part, adding definitions for
  void @llvm.hexagon.Y2.dccleana(i8*)
  void @llvm.hexagon.Y2.dccleaninva(i8*)
  void @llvm.hexagon.Y2.dcinva(i8*)
  void @llvm.hexagon.Y2.dczeroa(i8*)
  void @llvm.hexagon.Y4.l2fetch(i8*, i32)
  void @llvm.hexagon.Y5.l2fetch(i8*, i64)
The clang part will follow.

llvm-svn: 308032
2017-07-14 15:58:48 +00:00
Sanjay Patel 3f4db3ea97 [InstCombine] convert bitwise (in)equality checks to logical ops (PR32401)
As discussed in:
https://bugs.llvm.org/show_bug.cgi?id=32401

we have a backend transform to undo this:
https://reviews.llvm.org/rL299542

when it's likely that the xor version leads to better codegen, but we want 
this form in IR for better analysis and simplification potential.

llvm-svn: 308031
2017-07-14 15:09:49 +00:00
Simon Dardis 45b2277a33 Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
FileCheck is crashing on in the input file, so reverting again while
I investigate.

This reverts r308023.

llvm-svn: 308030
2017-07-14 15:08:05 +00:00
Sanjay Patel 22abfdfe47 [InstCombine] add tests for PR32401; NFC
Also, add comments to a couple of tests that could be moved out of instcombine.

llvm-svn: 308029
2017-07-14 14:43:28 +00:00
Jonas Paulsson b144af49c1 [SystemZ] Minor fixing in SystemZScheduleZ196.td
Some minor corrections for the recently added instructions.

Review: Ulrich Weigand
llvm-svn: 308028
2017-07-14 14:30:46 +00:00
Sanjay Patel 0439d76497 [InstCombine] auto-generate complete test checks; NFC
llvm-svn: 308027
2017-07-14 14:29:11 +00:00
Nirav Dave a8f63af9d1 Improve Aliasing of operations to static alloca
Recommiting after adding check to avoid miscomputing alias information
on addresses of the same base but different subindices.

Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.

Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.

Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.

The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.

Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand

Reviewed By: rnk

Subscribers: sdardis, nemanjai, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33345

llvm-svn: 308025
2017-07-14 13:56:21 +00:00
Jonas Paulsson 89ca10de33 [SystemZ] Enable LoopDataPrefetch pass.
Loop data prefetching has shown some improvements on benchmarks, and is
enabled at -O1 and above.

Review: Ulrich Weigand
llvm-svn: 308024
2017-07-14 13:52:38 +00:00
Simon Dardis b3529841db Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""
Unlike many other instructions, these instructions have aliases which
take coprocessor registers, gpr register, accumulator (and dsp accumulator)
registers, floating point registers, floating point control registers and
coprocessor 2 data and control operands.

For the moment, these aliases are treated as pseudo instructions which are
expanded into the underlying instruction. As a result, disassembling these
instructions shows the underlying instruction and not the alias.

Reviewers: slthakur, atanasyan

Differential Revision: https://reviews.llvm.org/D35253

The last version of this patch broke one of the expensive checks buildbots,
this version changes the failing test/MC/Mips/mt/invalid.s and other invalid
tests to write the errors to a file and run FileCheck on that, rather than
relying on the 'not llvm-mc ... <%s 2>&1 | Filecheck %s' idiom.

Hopefully this will sarisfy the buildbot.

llvm-svn: 308023
2017-07-14 13:44:12 +00:00
Zoran Jovanovic 0e03935182 Reverting commit 308011.
llvm-svn: 308017
2017-07-14 10:52:22 +00:00
Zoran Jovanovic d374c5993b [mips][microMIPS] Extending size reduction pass with ADDIUSP and ADDIUR1SP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
ADDIU instruction is transformed into 16-bit instruction ADDIUSP
ADDIU instruction is transformed into 16-bit instruction ADDIUR1SP
Function InRange is changed to avoid left shifting of negative values, since 
that caused some sanitizer tests to fail (so the previous patch 
Differential Revision: https://reviews.llvm.org/D34511

llvm-svn: 308011
2017-07-14 10:13:11 +00:00
Diana Picus 87a7067983 [ARM] GlobalISel: Support G_BRCOND
Insert a TSTri to set the flags and a Bcc to branch based on their
values. This is a bit inefficient in the (common) cases where the
condition for the branch comes from a compare right before the branch,
since we set the flags both as part of the compare lowering and as part
of the branch lowering. We're going to live with that until we settle on
a principled way to handle this kind of situation, which occurs with
other patterns as well (combines might be the way forward here).

llvm-svn: 308009
2017-07-14 09:46:06 +00:00
Jonas Paulsson a84f9f5364 [SystemZ] Minor fixing in SystemZScheduleZEC12.td
Some minor corrections for the recently added instructions.

Review: Ulrich Weigand
llvm-svn: 308007
2017-07-14 09:18:18 +00:00
Renato Golin d806b49899 [RelTest] Diana is doing both releases now
llvm-svn: 308006
2017-07-14 08:33:52 +00:00
Sam Parker 2893448576 [ARM] Allow rematerialization of ARM Thumb literal pool loads
Constants are crucial for code size in the ARM Thumb-1 instruction
set. The 16 bit instruction size often does not offer enough space
for immediate arguments. This means that additional instructions are
frequently used to load constants into registers. Since constants are
hoisted, this can lead to significant register spillage if they are
used multiple times in a single function. This can be avoided by
rematerialization, i.e. recomputing a constant instead of reloading
it from the stack. This patch fixes the rematerialization of literal
pool loads in the ARM Thumb instruction set.

Patch by Philip Ginsbach

Differential Revision: https://reviews.llvm.org/D33936

llvm-svn: 308004
2017-07-14 08:23:56 +00:00
Max Kazantsev f80ffa1a78 [IRCE] Fix corner case with Start = INT_MAX
When iterating through loop

  for (int i = INT_MAX; i > 0; i--)

We fail to generate the pre-loop for it. It happens because we use the
overflown value in a comparison predicate when identifying whether or not
we need it.

In old logic, we used SLE predicate against Greatest value which exceeds all
seen values of the IV and might be overflown. Now we use the GreatestSeen
value of this IV with SLT predicate.

Also added a test that ensures that a pre-loop is generated for such loops.

Differential Revision: https://reviews.llvm.org/D35347

llvm-svn: 308001
2017-07-14 06:35:03 +00:00
Adam Nemet c5bcc587ae [opt-viewer] Flush stdout after progress update
Without this, there was no progress shown during parsing but only during
rendering on macOS.

llvm-svn: 308000
2017-07-14 04:54:26 +00:00
Eric Christopher 4e332c7cf1 Add a set of comments explaining why getSubtargetImpl() is deleted on these targets.
llvm-svn: 307999
2017-07-14 04:33:43 +00:00
Dinar Temirbulatov 21599fe2de [SLPVectorizer] Add an extra parameter to alreadyVectorized function, NFCI.
llvm-svn: 307996
2017-07-14 03:48:29 +00:00
Eric Christopher f73870eefa Remove set but not used variables from the debug info verifier code.
llvm-svn: 307987
2017-07-14 01:40:47 +00:00
Leo Li 7641d962da [CMake]Use LLVM_LIBRARY_DIR for lib path.
Summary:
This makes sure the correct lib path is being used when `CMAKE_CFG_INTDIR` or
`LLVM_LIBDIR_SUFFIX` is set.

Reviewers: beanz

Subscribers: mgorny, srhines, pirama, llvm-commits

Differential Revision: https://reviews.llvm.org/D35318

llvm-svn: 307985
2017-07-14 00:35:21 +00:00
Kostya Serebryany 71f6f7f5dc [libFuzzer] update the comments in afl/afl_driver.cpp
llvm-svn: 307981
2017-07-14 00:18:37 +00:00
Kostya Serebryany 7c83896f55 [libFuzzer] remove stale code; NFC
llvm-svn: 307980
2017-07-14 00:16:23 +00:00
Matt Arsenault 23e4df6a59 AMDGPU: Detect kernarg segment pointer
This is necessary to pass the kernarg segment pointer
to callee functions. Also don't unconditionally enable
for kernels.

llvm-svn: 307978
2017-07-14 00:11:13 +00:00
Kostya Serebryany f64b8487f9 [libFuzzer] simplify the handling of memmem/strstr
llvm-svn: 307977
2017-07-14 00:06:27 +00:00
Stanislav Mekhanoshin dc2890a887 [AMDGPU] fcaninicalize optimization for GFX9+
Since GFX9 supports denorm modes for v_min_f32/v_max_f32 that
is possible to further optimize fcanonicalize and remove it
if applied to min/max given their operands are known not to be
an sNaN or that sNaNs are not supported.

Additionally we can remove fcanonicalize if denorms are supported
for the VT and we know that its argument is never a NaN.

Differential Revision: https://reviews.llvm.org/D35335

llvm-svn: 307976
2017-07-13 23:59:15 +00:00
Spyridoula Gravani 890eedc4e4 [DWARF] Introduce verification for the unit header chain in .debug_info section to llvm-dwarfdump.
This patch adds verification checks for the unit header chain in the .debug_info section.
Specifically, for each unit in the .debug_info section, the verifier checks that:

The unit length is valid (i.e. the unit can actually fit in the .debug_info section)
The dwarf version of the unit is valid
The address size is valid (4 or 8)
The unit type (if the unit is in dwarf5) is valid
The debug_abbrev_offset is valid

llvm-svn: 307975
2017-07-13 23:25:24 +00:00
Jakub Kuderski 3b4317cbc2 [Dominators] Define Arc less-than operator inline.
This fixes warnings on some buildbots.

llvm-svn: 307974
2017-07-13 23:11:57 +00:00
Kostya Serebryany 697f2159bb [libFuzzer] move code around; NFC
llvm-svn: 307973
2017-07-13 22:30:23 +00:00
Reid Kleckner d815a278d8 Fix build due to const-correctness issue after last minute refactoring
llvm-svn: 307971
2017-07-13 22:05:30 +00:00
Reid Kleckner 05c70f5dba [PDB] Fix quadratic behavior when writing a BinaryItemStream
Binary streams are an abstraction over a discontiguous buffer. To write
a discontiguous buffer, we want to copy each contiguous chunk
individually. Currently BinaryStreams do not expose a way to iterate
over the chunks, so the code repeatedly calls
readLongestContiguousChunk() with an increasing offset. In order to
lookup the chunk by offset, we would iterate the items list to figure
out which chunk the offset is within. This is obviously O(n^2).

Instead, pre-compute a table of offsets and do a binary search to figure
out which chunk to use. This is still only an O(n^2) to O(n log n)
improvement, but it's a very local fix that seems worth doing.

This improves self-linking lld.exe with PDBs from 90s to 10s.

llvm-svn: 307970
2017-07-13 22:02:23 +00:00
Jakub Kuderski d529467afb [Dominators] Rename Update.Arc to Update.Edge
Update.Arc of type Arc caused a warning on some buildbots.

llvm-svn: 307968
2017-07-13 21:52:56 +00:00
Matt Arsenault 6b93046f29 AMDGPU: Annotate call graph with used features
Previously this wouldn't detect used features indirectly
used in callee functions.

llvm-svn: 307967
2017-07-13 21:43:42 +00:00
Jakub Kuderski eb370adeb6 [Dominators] Add CFGBuilder testing utility
Summary:
This patch introduces a new testing utility for building and modifying CFG -- CFGBuilder. The primary use case for the utility is testing the upcoming incremental dominator tree update API.

The current design provides a simple mechanism of constructing arbitrary graphs and then applying series of updates to them. CFGBuilder takes care of creating empty functions, connecting and disconnecting basic blocks. Under the hood it uses SwitchInst and UnreachableInst.

It will be also possible to create a thin wrapper over CFGBuilder for parsing string input and to hook it up to other textual tools (e.g. opt used with FileCheck).

Reviewers: dberlin, sanjoy, grosser, dblaikie

Reviewed By: dblaikie

Subscribers: davide, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D34798

llvm-svn: 307960
2017-07-13 21:16:01 +00:00
Jakub Kuderski 5af07f5c1e [Dominators] Simplify templates
Summary: DominatorTreeBase and related classes used overcomplicated template machinery. This patch simplifies them and gets rid of DominatorTreeBaseTraits and DominatorTreeBaseByTraits, which weren't actually used outside the DomTree construction.

Reviewers: dberlin, sanjoy, davide, grosser

Reviewed By: dberlin, davide, grosser

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35285

llvm-svn: 307953
2017-07-13 20:45:32 +00:00
Lang Hames 4284ed0894 [Orc] Fix some Error-related fixmes in CompileOnDemandLayer now that the layer
interface has been errorized.

llvm-svn: 307952
2017-07-13 20:44:46 +00:00
Sanjay Patel 71b02704c8 [InstCombine] put tests for commuted variants of the same fold together; NFC
llvm-svn: 307951
2017-07-13 20:35:45 +00:00
Jakub Kuderski 443d5cf1f1 [Dominators] Split SemiNCA into smaller functions
Summary:
This patch splits the SemiNCA algorithm into smaller functions. It also adds a new debug macro.

In order to perform incremental updates, we need to be able to refire SemiNCA on a subset of CFG nodes (determined by a DFS walk results). We also need to skip nodes that are not deep enough in a DomTree.

Reviewers: dberlin, davide, sanjoy, grosser

Reviewed By: dberlin, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35282

llvm-svn: 307950
2017-07-13 20:35:01 +00:00
Jakub Kuderski 34327d28fd [NFC] Move DEBUG_TYPE below includes in Hexagon
llvm-svn: 307947
2017-07-13 20:26:45 +00:00
Reid Kleckner 6597c28d76 [PDB] Fix type server handling for archives
Summary:
This fixes type indices for SDK or CRT static archives. Previously we'd
try to look next to the archive object file path, which would not exist
on the local machine.

Also error out if we can't resolve a type server record. Hypothetically
we can recover from this error by discarding debug info for this object,
but that is not yet implemented.

Reviewers: ruiu, amccarth

Subscribers: aprantl, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D35369

llvm-svn: 307946
2017-07-13 20:12:23 +00:00
Jakub Kuderski 1d2dc681b1 [NFC] Move DEBUG_TYPE macro below includes...
in MachineCombiner.cpp.

llvm-svn: 307940
2017-07-13 19:30:52 +00:00
Simon Dardis 1558ee3365 Revert "[mips][mt][6/7] Add support for mftr, mttr instructions."
This reverts r307836, it broke one of the buildbots. Reverting
while I investigate.

llvm-svn: 307939
2017-07-13 19:27:41 +00:00
George Karpenkov dfa6c20f4b [lit] add a -vv option to echo all executed commands.
Debugging LIT scripts can be rather painful, as LIT directly does not
specify which line has failed.
Rather, FileCheck is expected to report the failing location, but it can
be often ambiguous if multiple commands are tested against the same
prefix.  This change adds a -vv option, which echoes all output.
Then detecting the error becomes straightforward: last printed line is
the failing one.

Of course, it could be desired to try to get failing line number
directly from bash, but it involves excessive hacks on older bash
versions (cf.
https://stackoverflow.com/questions/24398691/how-to-get-the-real-line-number-of-a-failing-bash-command)

Differential Revision: https://reviews.llvm.org/D35330

llvm-svn: 307938
2017-07-13 19:26:27 +00:00
Andrew Zhogin af3d5fe83b [X86][tests] Added rotate_vec.ll CodeGen test. NFC precommit for bug 33691 fix.
llvm-svn: 307937
2017-07-13 18:57:40 +00:00
Jakub Kuderski 3064fae5a6 [Dominators] Improve reachability verification
Summary:
This patch improves verification by making `verifyReachablility` look for CFG not found in the DomTree.
It also makes the verification work with postdominators by handling virtual root.

Reviewers: dberlin, davide, grosser, sanjoy

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35279

llvm-svn: 307936
2017-07-13 18:55:52 +00:00