a5804effed
Fix random abort.
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llvm-svn: 56184
2008-09-13 01:55:59 +00:00
380482ac46
Typo.
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llvm-svn: 56182
2008-09-13 01:44:01 +00:00
ba28161103
Rely on instruction format to determine so_reg operand for now.
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llvm-svn: 56181
2008-09-13 01:38:29 +00:00
12134701ec
Revert 56176. All those instruction formats are still needed.
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llvm-svn: 56180
2008-09-13 01:35:33 +00:00
db6571a2c7
Accidentially flipped the condition.
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llvm-svn: 56179
2008-09-13 01:29:57 +00:00
25a39094f8
Add debug dumps.
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llvm-svn: 56178
2008-09-13 01:15:21 +00:00
c5c74f36fd
Eliminate unnecessary instruction formats.
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llvm-svn: 56176
2008-09-12 23:15:39 +00:00
d1424c4eca
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
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llvm-svn: 56172
2008-09-12 22:45:55 +00:00
33fa89c6fb
Rewrite address mode 1 code emission routines.
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llvm-svn: 56171
2008-09-12 22:01:15 +00:00
a79db30d28
Tidy up several unbeseeming casts from pointer to intptr_t.
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llvm-svn: 55779
2008-09-04 17:05:41 +00:00
3be5b728b1
Revamp ARM JIT.
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llvm-svn: 55624
2008-09-02 06:52:38 +00:00
40d67c59d5
Remove bunch of gcc 4.3-related warnings from Target
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llvm-svn: 47369
2008-02-20 11:22:39 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
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Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
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that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
1457b2b3b1
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
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llvm-svn: 41627
2007-08-30 23:29:26 +00:00
f7c6effc44
Initial JIT support for ARM by Raul Fernandes Herbster.
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llvm-svn: 40887
2007-08-07 01:37:15 +00:00
396156e00b
no email addrs in file headers
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llvm-svn: 39962
2007-07-17 05:56:43 +00:00
9546a5c7de
Initial ARM JIT support by Raul Fernandes Herbster.
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llvm-svn: 37926
2007-07-05 21:15:40 +00:00
Evan Cheng