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3 Commits

Author SHA1 Message Date
Bill Wendling 8f26840c5a Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183571
 2013-06-07 21:00:34 +00:00
Preston Gurd 128920d9fa Make function documentation conform to llvm standards. 
Expunge all remaining traces and use of live variable information.

llvm-svn: 180577
 2013-04-25 21:31:33 +00:00
Preston Gurd 8b7ab4ba2b This patch adds the X86FixupLEAs pass, which will reduce instruction 
latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.

llvm-svn: 180573
 2013-04-25 20:29:37 +00:00