b14097000b
Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUPLANE node with the vector input size different from the output size. This was bacause the BUILD_VECTOR lowering code didn't check that the size of the input vector was correct for using VDUPLANE.
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llvm-svn: 165929
2012-10-15 09:41:32 +00:00
49bdbce8e1
Improve codegen for BUILD_VECTORs on ARM.
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If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base.
llvm-svn: 163304
2012-09-06 09:55:02 +00:00
3e2c6f380c
ARM VLDR/VSTR instructions don't need a size suffix.
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Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
llvm-svn: 144583
2011-11-14 23:03:21 +00:00
9375d27460
Add float patterns for Neon vld1-lane/dup and vst1-lane operations.
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llvm-svn: 121583
2010-12-10 22:13:32 +00:00
103a0dcfe1
Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes.
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Radar 7373643.
llvm-svn: 108303
2010-07-14 01:22:12 +00:00
29dda21e96
Remove arm_apcscc from the test files. It is the default and doing this
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matches what llvm-gcc and clang now produce.
llvm-svn: 106221
2010-06-17 15:18:27 +00:00
35b6173a17
Merge a bunch of NEON tests into larger files so they run faster.
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llvm-svn: 83667
2009-10-09 20:20:54 +00:00
c8054d90fb
Eliminate more uses of llvm-as and llvm-dis.
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llvm-svn: 81293
2009-09-09 00:09:15 +00:00
30e30587eb
Remove stale greps.
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llvm-svn: 80986
2009-09-04 05:07:52 +00:00
36d8c75eca
Convert tests to FileCheck.
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llvm-svn: 80983
2009-09-04 04:07:19 +00:00
23b28cb824
2 more vdup.32 cases
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llvm-svn: 78419
2009-08-07 22:36:50 +00:00
2e076c4e02
Add support for ARM's Advanced SIMD (NEON) instruction set.
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This is still a work in progress but most of the NEON instruction set
is supported.
llvm-svn: 73919
2009-06-22 23:27:02 +00:00
Silviu Baranga