e206e6e80a
Cleanup: test source files do not need to be executable
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llvm-svn: 180003
2013-04-22 08:02:43 +00:00
ece459bb66
[mips] Fix inefficient code generation.
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This patch eliminates the need to emit a constant move instruction when this
pattern is matched:
(select (setgt a, Constant), T, F)
The pattern above effectively turns into this:
(conditional-move (setlt a, Constant + 1), F, T)
llvm-svn: 176384
2013-03-01 21:52:08 +00:00
63c0e2c58c
Fix test cases in test/CodeGen/Mips.
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llvm-svn: 157868
2012-06-02 00:05:45 +00:00
763ab85690
Fix test cases.
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llvm-svn: 156697
2012-05-12 03:25:16 +00:00
ca41d13bbd
Add another peephole pattern for conditional moves.
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llvm-svn: 156460
2012-05-09 02:29:29 +00:00
2020e27d6d
Do not use $gp as a dedicated global register if the target ABI is not O32.
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llvm-svn: 155522
2012-04-25 01:24:52 +00:00
b2e05cb6b1
64-bit WrapperPICPat patterns.
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llvm-svn: 146086
2011-12-07 22:11:43 +00:00
c32af340fc
Change the default scheduler from Latency to ILP, since Latency
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is going away.
llvm-svn: 142810
2011-10-24 17:45:02 +00:00
5624707684
Fix test cases.
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Generate code for Mips32r1 unless a Mips32r2 feature is tested.
llvm-svn: 139433
2011-09-09 23:14:58 +00:00
b406843fe5
Define a wrapper node for target constant nodes (tglobaladdr, etc.).
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Need this to prevent emitting illegal conditional move instructions.
llvm-svn: 132240
2011-05-28 01:07:07 +00:00
f4c9754d5c
Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
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Add an extra run with -regalloc=basic to keep them honest.
llvm-svn: 128654
2011-03-31 18:42:43 +00:00
f0c6e3780d
Match a pattern generated by a dag combiner opt where:
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(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))
Thanks to Akira for pointing that.
llvm-svn: 121163
2010-12-07 19:00:20 +00:00
Arnaud A. de Grandmaison