Andrew Trick
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121124acf8
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Revert "Temporarily enable MI-Sched on X86."
This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c.
llvm-svn: 184823
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2013-06-25 02:48:58 +00:00 |
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Andrew Trick
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5a1e0af838
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Temporarily enable MI-Sched on X86.
Sorry for the unit test churn. I'll try to make the change permanently
next time.
llvm-svn: 184705
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2013-06-24 09:13:20 +00:00 |
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Evan Cheng
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c436631a9c
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Turn on post-alloc scheduling for x86.
llvm-svn: 84431
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2009-10-18 19:57:27 +00:00 |
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Dan Gohman
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03a7667349
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Fix this test to account for a movl $0 being emitted as an xor now,
and convert it to FileCheck.
llvm-svn: 84065
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2009-10-14 00:28:48 +00:00 |
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Dan Gohman
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40503396da
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Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81290
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2009-09-08 23:54:48 +00:00 |
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Evan Cheng
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d4e01dce74
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Fix test.
llvm-svn: 55849
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2008-09-05 20:04:37 +00:00 |
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Evan Cheng
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4f0d21592a
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If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
llvm-svn: 55840
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2008-09-05 17:24:07 +00:00 |
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Evan Cheng
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6c94b99c62
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For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
llvm-svn: 55807
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2008-09-04 22:59:58 +00:00 |