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Author SHA1 Message Date
Simon Dardis e82e4fa7ef [MIPS} Address ISel failures for 64 bit fpus in microMIPS 
Add the instructions and patterns for loads and stores in microMIPSr3
when a 64 bit FPU is present. Previously, this would lead to an
instruction selection failure.

This resolves PR/49200.

Thanks to jdeguire for reporting the issue!

Differential Revision: https://reviews.llvm.org/D124723
 2022-05-12 23:25:09 +01:00
Simon Atanasyan 909c8c2b0d [mips] Use reg-exp in tests to tolerate register indexes changing. NFC 
llvm-svn: 361966
 2019-05-29 14:59:07 +00:00
Simon Dardis 57c2095d1b [mips] Fix microMIPS loads and stores. 
Previously these instructions were unselectable and instead were generated
through the instruction mapping tables.

Reviewers: atanasyan, smaksimovic, abeserminji

Differential Revision: https://reviews.llvm.org/D46055

llvm-svn: 331165
 2018-04-30 09:44:44 +00:00