Commit Graph

4 Commits

Author SHA1 Message Date
Zi Xuan Wu (Zeson) 70b8b738c5 [CSKY] Fix the btsti16 instruction missing in generic processor
Normally, generic processor does not have any SubtargetFeature. And it
can just generate most basic instructions which have no Predicates to
guard.

But it needs to enbale predicate for the btsti16 instruction as one of the most basic instructions.
Or the generic processor can't finish codegen process. So Add FeatureBTST16 SubtargetFeature to generic ProcessorModel.
2022-07-27 17:39:15 +08:00
Zi Xuan Wu (Zeson) 08db089124 [CSKY] Fix the testcase error due to the verifyInstructionPredicates
- Test cases for arch only has 16-bit instruction such as ck801/ck802 need
compile with -mattr=+btst16
- Fix the GPR copy instruction with MOV16 for 16-bit only arch.
2022-07-21 15:53:50 +08:00
Zi Xuan Wu 27c18558e6 [CSKY] Add missing codegen pattern for 16-bit instruction
In generic cpu model, there are only low 16 registers and little 32-bit instruction. CK801 is the cpu
family with least basic features like generic model.

Add test run and check for generic cpu model in original test case to cover basic LLVM IR functionality.
2022-03-29 16:05:30 +08:00
Zi Xuan Wu 9566cf16ad [CSKY] Add codegen of select/br/cmp instruction and some frame lowering infra
Add basic integer codegen of select/br/cmp instruction. It also includes frame lowering code
such as prologue/epilogue.
2022-01-05 15:59:03 +08:00