OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
125,692 Commits 31 Branches 0 Tags 2.2 GiB
Commit Graph

4 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen b28ee4115d Transfer implicit operands in NEONMoveFixPass. 
Later passes /are/ using this information when running the register
scavenger.

This fixes the second problem in PR10520.

llvm-svn: 136440
 2011-07-29 00:27:35 +00:00
Jakob Stoklund Olesen 9c3badceba Add -verify-arm-pseudo-expand. 
This hidden llc option runs the machine code verifier after expanding
ARM pseudo-instructions, but before if-conversion.

The machine code verifier is much better at pointing out liveness errors
that can trip up the register scavenger.

llvm-svn: 136439
 2011-07-29 00:27:32 +00:00
Jakob Stoklund Olesen b16081ce8c Handle REG_SEQUENCE with implicitly defined operands. 
Code like that would only be produced by bugpoint, but we should still
handle it correctly.

When a register is defined by a REG_SEQUENCE of undefs, the register
itself is undef. Previously, we would create a register with uses but no
defs.

Fixes part of PR10520.

llvm-svn: 136401
 2011-07-28 21:38:51 +00:00
Bill Wendling 748265b0da Simplify test and move into a generic "crash" ll file. 
llvm-svn: 116130
 2010-10-09 00:29:04 +00:00