Commit Graph

4255 Commits

Author SHA1 Message Date
Adrian Prantl db4c86f953 Update for LLVM global variable debug info API change.
llvm-svn: 289921
2016-12-16 04:26:15 +00:00
Adrian Prantl ed4eb86531 Revert "Update for LLVM global variable debug info API change."
This reverts commit 289901 while investigating bot breakage.

llvm-svn: 289908
2016-12-16 01:01:40 +00:00
Adrian Prantl 35bbcefb4b Update for LLVM global variable debug info API change.
llvm-svn: 289901
2016-12-16 00:35:42 +00:00
Mehdi Amini 9f10f34a6b Fix printf specifier handling: invalid specifier should not be marked as "consuming data arguments"
Reviewers: rsmith, bruno, dexonsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D27796

llvm-svn: 289850
2016-12-15 18:54:00 +00:00
Alexey Bataev 3da2619b6f Revert "[TESTS] Initial commit of tests, by Andrew Tischenko"
This reverts commit 5898c713bee5e96aae87c73e11f3f4a7d19c74ed.

llvm-svn: 289812
2016-12-15 12:24:20 +00:00
Alexey Bataev 70f090d568 [TESTS] Initial commit of tests, by Andrew Tischenko
llvm-svn: 289809
2016-12-15 12:06:27 +00:00
Mehdi Amini ba80a837ab Revert "Fix printf specifier handling: invalid specifier should not be marked as "consuming data arguments""
This reverts commit r289762, wasn't ready to be pushed, it broke the printf tests.

llvm-svn: 289763
2016-12-15 04:58:51 +00:00
Mehdi Amini 0dcbcb7eb8 Fix printf specifier handling: invalid specifier should not be marked as "consuming data arguments"
llvm-svn: 289762
2016-12-15 04:51:22 +00:00
Mehdi Amini ab11d83048 Fix os_log formating with arbitrary precision and field width
llvm-svn: 289761
2016-12-15 04:02:31 +00:00
David Gross ff06759ffb [DebugInfo] Restore test case for long double constants.
Summary:
D27549 (partial fix for PR26619) emits a constant value in the debug
metadata for a floating-point static const that does not exceed 64
bits in size.  Whether or not a long double exceeds 64 bits in size
depends on the target.  Modify the test case so that it expects a
constant value for long double if and only if the long double is no
larger than 64 bits.

Reviewers: cfe-commits, probinson

Differential Revision: https://reviews.llvm.org/D27597

llvm-svn: 289686
2016-12-14 18:52:33 +00:00
Reid Kleckner 34a0f3dc2f Improve our handling of tag decls in function prototypes
r289225 broke AST invariants by reparenting enumerators into function
decl contexts. This improves things by only reparenting TagDecls while
also attempting to preserve the lexical declcontext chain. The
interesting example here is:
  int f(struct S { enum E { a = 1 } b; } c);

The semantic contexts of E and S should be f, and the lexical context of
S should be f and the lexical context of E should be S. We didn't do
that with r289225, but now we should.

This change should also improve our behavior on this example:
  void f() {
    extern void ext(struct S { } o);
    // S injected here
  }

Before r289225 we would only remove 'S' from the surrounding tag
injection context if it was the TU, but now we properly reparent S from
f to ext.

Fixes PR31366

llvm-svn: 289678
2016-12-14 17:44:11 +00:00
Peter Collingbourne 1a0720e8c4 LTO: Add support for multi-module bitcode files.
Differential Revision: https://reviews.llvm.org/D27313

llvm-svn: 289621
2016-12-14 01:17:59 +00:00
Evandro Menezes ba17775c84 Add support for Samsung Exynos M3 (NFC)
llvm-svn: 289614
2016-12-13 23:31:57 +00:00
Craig Topper 678b07fe3c [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.

llvm-svn: 289351
2016-12-11 01:26:52 +00:00
Craig Topper cdd3603c04 [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a version without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.

llvm-svn: 289345
2016-12-10 23:09:52 +00:00
Craig Topper 5391c98341 [AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with select and the avx unmasked builtins.
llvm-svn: 289338
2016-12-10 20:27:39 +00:00
David Gross bcc6cea748 [DebugInfo] Relax test case for long double constants.
Summary:
D27549 (partial fix for PR26619) emits a constant value in the debug
metadata for a floating-point static const that does not exceed 64
bits in size.  The regression test accompanying that fix assumes that
a long double exceeds 64 bits in size and hence does not get a
constant value in the debug metadata.  However, for some targets --
such as "--target=hexagon-unknown-elf" -- a long double does not
exceed 64 bits in size, and hence the test fails.

As a temporary fix, modify the regression test to no longer inspect
the debug metadata for a long double.

Reviewers: cfe-commits, probinson

Differential Revision: https://reviews.llvm.org/D27589

llvm-svn: 289103
2016-12-08 21:15:17 +00:00
David Gross 1118d591dc [DebugInfo] Add support for __fp16, float, and double constants.
Summary:
Partial fix for PR26619.

Prior to this change, a DIGlobalVariable corresponding to a static
const was marked with an expression corresponding to its constant
value only if it is of integral type.  With this change, we now do the
same if it is of __fp16, float, or double type (that is,
floating-point types that do not exceed 64 bits in size, and hence are
supported easily by the existing LLVM machinery for creating constant
expressions in debug info).

Reviewers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27549

llvm-svn: 289094
2016-12-08 20:02:46 +00:00
Reid Kleckner fec0f32ea9 Use ${:uid} to generate unique MS asm labels, not {:uid}
llvm-svn: 288093
2016-11-29 00:39:37 +00:00
Reid Kleckner 08ebbcebb9 [MS] Mangle a unique ID into all MS inline asm labels
This solves PR23715 in a way that is compatible with LTO.

MSVC supports jumping to source-level labels and between inline asm
blocks, but we don't.

Also revert the old solution, r255201, which was to mark these calls as
noduplicate.

llvm-svn: 288059
2016-11-28 20:52:19 +00:00
Ehsan Amiri 85f5bfcf0d [PPC] support for arithmetic builtins in the FE
(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287872
2016-11-24 12:40:04 +00:00
Ehsan Amiri 9cce1ee88c [PPC] revert r287795
A test that passed locally is failing on one of the build bots.

llvm-svn: 287796
2016-11-23 18:55:17 +00:00
Ehsan Amiri 9b91cfa0b0 [PPC] support for arithmetic builtins in the FE
(commit again after fixing the buildbot failures)
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287795
2016-11-23 18:36:29 +00:00
Ehsan Amiri ac10595b0d [PPC] Reverting r287772
Due to buildbot failure, I revert. Will recommit after investigation.

llvm-svn: 287775
2016-11-23 16:56:03 +00:00
Ehsan Amiri 5ea1054dab [PPC] support for arithmetic builtins in the FE
This adds various overloads of the following builtins to altivec.h:

    vec_neg
    vec_nabs
    vec_adde
    vec_addec
    vec_sube
    vec_subec
    vec_subc

Note that for vec_sub builtins on 32 bit integers, the semantics is similar to
what ISA describes for instructions like vsubecuq that work on quadwords: the
first operand is added to the one's complement of the second operand. (As
opposed to two's complement which I expected).

llvm-svn: 287772
2016-11-23 16:32:05 +00:00
Simon Pilgrim b243bbc87d [X86][AVX512VL] Add missing _mm256_maskz_alignr_epi64 shufflevector check
Missed in rL287733

llvm-svn: 287755
2016-11-23 11:38:52 +00:00
Craig Topper 6aefe00ccf [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector.
llvm-svn: 287733
2016-11-23 01:47:12 +00:00
Craig Topper 37bf5c6a3f [AVX-512] Replace masked 16-bit element variable shift builtins with new unmasked versions and selects.
llvm-svn: 287313
2016-11-18 05:04:51 +00:00
Pekka Jaaskelainen 6aa07ee410 target-data test update for TCE and TCELE
llvm-svn: 287115
2016-11-16 16:21:59 +00:00
Simon Pilgrim 698528d83b [X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with generic IR
Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen.

This patch removes the clang builtins and their use in the headers - a future patch will deal with removing the llvm intrinsics.

This is an extension patch to D20528 which dealt with the equivalent sse/avx cases.

Differential Revision: https://reviews.llvm.org/D26686

llvm-svn: 287088
2016-11-16 09:27:40 +00:00
Mehdi Amini dc9bf8fab6 Improve handling of __FUNCTION__ and other predefined expression for Objective-C Blocks
Instead of always displaying the mangled name, try to do better
and get something closer to regular functions.

Recommit r287039 (that was reverted in r287039) with a tweak to
be more generic, and test fixes!

Differential Revision: https://reviews.llvm.org/D26522

llvm-svn: 287085
2016-11-16 07:07:28 +00:00
Mehdi Amini f5f37ee546 Revert "Improve handling of __FUNCTION__ and other predefined expression for Objective-C Blocks"
This reverts commit r287039, tests are broken.

llvm-svn: 287043
2016-11-15 22:19:50 +00:00
Mehdi Amini 26168ad5c5 Improve handling of __FUNCTION__ and other predefined expression for Objective-C Blocks
Instead of always displaying the mangled name, try to do better
and get something closer to regular functions.

Differential Revision: https://reviews.llvm.org/D26522

llvm-svn: 287039
2016-11-15 21:47:11 +00:00
Zaara Syeda c1d2952388 vector load store with length (left justified) clang portion
llvm-svn: 286994
2016-11-15 18:04:13 +00:00
Tony Jiang 6a49aad177 [PowerPC] Implement BE VSX load/store builtins - clang portion.
This patch implements all the overloads for vec_xl_be and vec_xst_be. On BE,
they behaves exactly the same with vec_xl and vec_xst, therefore they are
simply implemented by defining a matching macro. On LE, they are implemented
by defining new builtins and intrinsics. For int/float/long long/double, it
is just a load (lxvw4x/lxvd2x) or store(stxvw4x/stxvd2x). For char/char/short,
we also need some extra shuffling before or after call the builtins to get the
desired BE order. For int128, simply call vec_xl or vec_xst.

llvm-svn: 286971
2016-11-15 14:30:56 +00:00
Sean Fertile a9548937d6 [PPC] altivec.h functions for converting half precision to single precision.
Adds 2 vector functions for converting from a vector of unsigned short to a
vector of float. One converts the low 4 halfwords and one converts the high
4 halfwords.

Differential Revision: https://reviews.llvm.org/D26534

llvm-svn: 286863
2016-11-14 18:47:15 +00:00
Sean Fertile 193430fe51 [PPC] add extract sig/exp test data class for vec float and vec double.
Add vector extract exponent/significand functions to altivec.h, as well as
 functions (and related constants) to test the data class of vector float
 and vector double.

 Differential Revision: https://reviews.llvm.org/D26271

llvm-svn: 286830
2016-11-14 14:43:27 +00:00
Craig Topper 5e0709d60b [AVX-512] Replace masked dword and qword variable shift builtins with unmasked builtins and a select.
This is part of a set of changes to allow InstCombine in the backend to optimize variable shifts without having to know about masking.

llvm-svn: 286757
2016-11-13 07:26:34 +00:00
Craig Topper 2c8f49e67b [AVX-512] Use scalar vfmsub/vfnmsub mask3 intrinsics instead of inverting the mask argument of a vfmadd intrinsic.
Summary: Inverting the mask argument does not reflect the intended semantics of the intrinsic.

Reviewers: igorb, delena

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D26019

llvm-svn: 286733
2016-11-12 23:24:34 +00:00
Craig Topper 1a44193afd [AVX-512] Convert the rest of the masked shift by immediate and by single element builtins over to the newly added unmasked builtins and a select.
This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend.

llvm-svn: 286714
2016-11-12 07:16:59 +00:00
Anna Zaks bcd35a8ec1 [tsan][clang] Introduce a function attribute to disable TSan checking at run time
This introduces a function annotation that disables TSan checking for the
function at run time. The benefit over attribute((no_sanitize("thread")))
is that the accesses within the callees will also be suppressed.

The motivation for this attribute is a guarantee given by the objective C
language that the calls to the reference count decrement and object
deallocation will be synchronized. To model this properly, we would need to
intercept all ref count decrement calls (which are very common in ObjC due
to use of ARC) and also every single message send. Instead, we propose to
just ignore all accesses made from within dealloc at run time. The main
downside is that this still does not introduce any synchronization, which
means we might still report false positives if the code that relies on this
synchronization is not executed from within dealloc. However, we have not
seen this in practice so far and think these cases will be very rare.

(This problem is similar in nature to https://reviews.llvm.org/D21609;
unfortunately, the same solution does not apply here.)

Differential Revision: https://reviews.llvm.org/D25857

llvm-svn: 286672
2016-11-11 23:22:44 +00:00
Nemanja Ivanovic 4de0011b5c [PowerPC] Implement remaining permute builtins in altivec.h - Clang portion
This patch corresponds to review:
https://reviews.llvm.org/D26479

It adds the remaining vector permute/rotate builtins to altivec.h.

llvm-svn: 286650
2016-11-11 22:34:44 +00:00
Nemanja Ivanovic 4079fc8188 [PowerPC] Add vector conversion builtins to altivec.h - clang portion
This patch corresponds to review:
https://reviews.llvm.org/D26308

It adds a number of vector type conversion builtins to altivec.h.

llvm-svn: 286627
2016-11-11 19:56:17 +00:00
Tony Jiang 7723f97d6a [PowerPC] Implement plain VSX load/store builtins.
Implement all the different 24 overloads for vec_xl and vec_xst.

llvm-svn: 286455
2016-11-10 14:39:56 +00:00
Douglas Katzman 0f5cc9b6df [Sparc] Unbreak test
llvm-svn: 286380
2016-11-09 17:02:07 +00:00
Douglas Katzman 13f4a91a1f [Sparc] LLONG is not lock-free atomic on v8
Differential Revision: https://reviews.llvm.org/D26286

llvm-svn: 286376
2016-11-09 15:43:51 +00:00
Adrian Prantl 338ef7a82c Emit debug info for global constants whose address is taken exactly once.
Add a check to the DeclCache before emitting debug info for a
GlobalVariable a second time and just attach the previsously created one to it.

<rdar://problem/26721101>

llvm-svn: 286322
2016-11-09 00:42:03 +00:00
Ayman Musa e60a41ca28 [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and int2mask/mask2int intrinsics.
Differential Revision: https://reviews.llvm.org/D26021

llvm-svn: 286229
2016-11-08 12:00:30 +00:00
Tony Jiang c6ddd7221c [PowerPC] Implement remaining vector comparison builtins.
vector bool char vec_cmpeq (vector bool char, vector bool char);
vector bool int vec_cmpeq (vector bool int, vector bool int);
vector bool long long vec_cmpeq (vector bool long long, vector bool long lon
vector bool short vec_cmpeq (vector bool short, vector bool short);

llvm-svn: 286205
2016-11-08 04:15:45 +00:00
Erich Keane 757d317c24 regcall: Implement regcall Calling Conv in clang
This patch implements the register call calling convention, which ensures
as many values as possible are passed in registers. CodeGen changes
were committed in https://reviews.llvm.org/rL284108.

Differential Revision: https://reviews.llvm.org/D25204

llvm-svn: 285849
2016-11-02 18:29:35 +00:00
Nemanja Ivanovic 05ce4ca0dd [PowerPC] Implement vector shift builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D26092.
Committing on behalf of Tony Jiang.

llvm-svn: 285694
2016-11-01 14:46:20 +00:00
Michael Zuckerman 62f516f590 [x86][inline-asm][clang] accept 'v' constraint
Commit on behalf of: Coby Tayree

1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
LLVM patch: https://reviews.llvm.org/D25005

Differential Revision: https://reviews.llvm.org/D25005

llvm-svn: 285688
2016-11-01 13:16:44 +00:00
Nemanja Ivanovic 251f6dd93d [PPC] Add vec_absd functions to altivec.h
This patch corresponds to review https://reviews.llvm.org/D26073.
Committing on behalf of Sean Fertile.

llvm-svn: 285679
2016-11-01 08:39:56 +00:00
Craig Topper 08bf53ffda [AVX-512] Remove masked vector insert builtins and replace with native shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285667
2016-11-01 05:47:56 +00:00
Evgeniy Stepanov f75430963d [cfi] Fix missing !type annotation.
CFI (only in the cross-dso mode) fails to set !type annotations when
a function is used before it is defined.

llvm-svn: 285650
2016-10-31 22:28:10 +00:00
Victor Leschuk 0df19037c4 DebugInfo: support for DW_TAG_atomic_type
Mark C11 _Atomic variables with DW_TAG_atomic_type tag.

Differential Revision: https://reviews.llvm.org/D26145

llvm-svn: 285625
2016-10-31 19:09:47 +00:00
Nemanja Ivanovic e5b62c83be NFC - Reorder test case names in a PPC test case
A few recent commits have messed up the order of some tests
in a PPC test case. This just reorders them in a sensible way.

llvm-svn: 285623
2016-10-31 19:02:54 +00:00
Michael Zuckerman b3147e80a6 Fixing problem with CodeGen/avx512-kconstraints-att_inline_asm.c
llvm-svn: 285617
2016-10-31 18:40:17 +00:00
Michael Zuckerman 849a6a5e5a [x86][inline-asm][AVX512][clang][PART-1] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.
Commit on behalf of mharoush

Extending inline assembly support, compatible with GCC as folowing:
 "k" constraint hints the compiler to select any of AVX512 k0-k7 registers.
 "Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask.

Reviewer: 1. rnk

Differential Revision: https://reviews.llvm.org/D25063

llvm-svn: 285604
2016-10-31 17:23:52 +00:00
Michael Zuckerman 2460bada56 [x86][inline-asm] Add support for curly brackets escape using "%" in extended inline asm.
Commit on behalf of mharoush

After LGTM and check all:

This patch is a compatibility fix for clang, matching GCC support for charter escape when using extended in-line assembly (i.e, "%{" ,"%}" --> "{" ,"}" ).
 It is meant to enable support for advanced features such as AVX512 conditional\masked vector instructions/broadcast assembly syntax.

Reviewer: 1. rnk

Differential Revision: https://reviews.llvm.org/D25012

llvm-svn: 285585
2016-10-31 15:27:54 +00:00
Ulrich Weigand 30354ebb00 [SystemZ] Add -march=archX aliases
For compatibility with other compilers on the platform, allow specifying
levels of the z/Architecture instead of model names with -march.  In
particular, the following aliases are now supported:

  -march=arch8   equals  -march=z10
  -march=arch9   equals  -march=z196
  -march=arch10  equals  -march=zEC12
  -march=arch11  equals  -march=z13

This parallels the equivalent (and prerequisite) LLVM change in r285577.

llvm-svn: 285578
2016-10-31 14:38:05 +00:00
Michael Zuckerman 15604b996f second attempt at r285565.
llvm-svn: 285573
2016-10-31 14:16:57 +00:00
Michael Zuckerman 7beec2e8bf revert r285563 fail in test CodeGen/avx512-inline-asm-kregisters-basics.c
llvm-svn: 285565
2016-10-31 12:49:36 +00:00
Michael Zuckerman 0d26eea609 [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
Commit on behalf of mharoush

 After LGTM and check all:
 This patch enables usage of k registers in inline assembly syntax.
 Adding triple

 Reviewer: 1. rnk
           2. delena

 Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285563
2016-10-31 12:05:41 +00:00
Michael Zuckerman 56c85d2119 Revert reviosion 285555
llvm-svn: 285556
2016-10-31 10:12:36 +00:00
Michael Zuckerman 4fe34fa2ec [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
Commit on behalf of mharoush 

After LGTM and check all: 
This patch enables usage of k registers in inline assembly syntax.

Reviewer: 1. rnk
          2. delena 

Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285555
2016-10-31 09:37:59 +00:00
Craig Topper cc012b3a37 [AVX-512] Add a regular expression to a test that was missed in r285540.
llvm-svn: 285547
2016-10-31 06:24:00 +00:00
Craig Topper 350729627a [AVX-512] Use selectd instead of selectps for _mm256_mask_extracti32x4_epi32.
llvm-svn: 285545
2016-10-31 05:49:11 +00:00
David Majnemer 5116993f8e Add support for __builtin_alloca_with_align
__builtin_alloca always uses __BIGGEST_ALIGNMENT__ for the alignment of
the allocation.  __builtin_alloca_with_align allows the programmer to
specify the alignment of the allocation.

This fixes PR30658.

llvm-svn: 285544
2016-10-31 05:37:48 +00:00
Craig Topper 93ffabd28d [AVX-512] Remove masked vector extract builtins and replace with native shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.

llvm-svn: 285540
2016-10-31 04:30:56 +00:00
Craig Topper 66b2fd1209 [AVX-512] Remove many of the masked 128/256-bit shift builtins and replace them with unmasked builtins and selects.
llvm-svn: 285539
2016-10-31 04:30:51 +00:00
Michael Zuckerman d343697f1e Fixing "type" issue for (epi32)
and replaceing hardcoded inf with clang builtin inf "__builtin_inff()" for float ({max|min}_{pd|ps})

llvm-svn: 285519
2016-10-30 14:54:05 +00:00
Craig Topper 312ff9d19d [AVX-512] Remove masked 128/256-bit builtins for vpmaddwd and vpmaddubsw. Replace with unmasked builtins and select.
llvm-svn: 285516
2016-10-30 07:11:34 +00:00
Craig Topper 4caf76bee2 [AVX-512] Remove 128/256-bit masked pmulhrsw/pmulhuw/pmulhw builtins and use unmasked builtins and select instead.
llvm-svn: 285505
2016-10-29 19:02:14 +00:00
Craig Topper 2eadf1b67e [AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with unmasked builtins and a select.
llvm-svn: 285504
2016-10-29 19:02:10 +00:00
Craig Topper 09e94007be [AVX-512] Remove masked 128/256-bit pmuludq/pmuldq builtins and replace them with unmasked builtins and a select.
llvm-svn: 285503
2016-10-29 19:02:07 +00:00
Craig Topper 160ca8420d [AVX-512] Remove masked 128/256-bit floating point max/min builtins. Use unmasked builtins with select instead.
llvm-svn: 285502
2016-10-29 19:02:03 +00:00
Michael Zuckerman 25eb420233 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (max|min) intrinsics to Clang .
After LGTM and Check-all 

Vector-reduction arithmetic accepts vectors as inputs and produces 
scalars as outputs.This class of vector operation forms the basis 
of many scientific computations. In vector-reduction arithmetic, 
the evaluation off is independent of the order of the input elements of V.

Reviewer: 1. craig.topper 
          2. igorb

Differential Revision: https://reviews.llvm.org/D25988

llvm-svn: 285493
2016-10-29 10:29:20 +00:00
Nemanja Ivanovic 931bc548e6 [PPC] add float and double overloads for vec_orc and vec_nand in altivec.h
This patch corresponds to review https://reviews.llvm.org/D25950.
Committing on behalf of Sean Fertile.

llvm-svn: 285439
2016-10-28 20:04:53 +00:00
Nemanja Ivanovic 4f69f924df Implement vector count leading/trailing bytes with zero lsb and vector parity
builtins - clang portion

This patch corresponds to review: https://reviews.llvm.org/D26002
Committing on behalf of Zaara Syeda.

llvm-svn: 285436
2016-10-28 19:49:03 +00:00
Michael Zuckerman 22a03e435a Fixing small problem with avx512-reduceIntrin.c test on some OS.
llvm-svn: 285419
2016-10-28 17:25:26 +00:00
Michael Zuckerman edd99eb07a 1. Fixing small types issue (PD|PS) (reduce) .
2. Cosmetic changes

llvm-svn: 285405
2016-10-28 15:16:03 +00:00
David Majnemer 1878da43ea [CodeGen] Provide an appropriate alignment for dynamic allocas
GCC documents __builtin_alloca as aligning the storage to at least
__BIGGEST_ALIGNMENT__.

MSVC documents essentially the same for the x64 ABI:
https://msdn.microsoft.com/en-us/library/x9sx5da1.aspx

The 32-bit ABI follows the same rule: it emits a call to _alloca_probe_16

Differential Revision: https://reviews.llvm.org/D24378

llvm-svn: 285316
2016-10-27 17:18:24 +00:00
Nemanja Ivanovic 09dd423a7d [PPC] add vector byte reverse functions to altivec.h
This patch corresponds to review https://reviews.llvm.org/D25915.
Committing on behalf of Sean Fertile.

llvm-svn: 285268
2016-10-27 06:23:57 +00:00
Nemanja Ivanovic 3de0a385c9 [PowerPC] Implement vector_insert_exp builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D25956.
Committing on behalf of Zaara Syeda.

llvm-svn: 285229
2016-10-26 19:27:11 +00:00
Nemanja Ivanovic 85a28dcc5d [PPC] Implement vector reverse elements builtins (vec_reve)
This patch corresponds to review https://reviews.llvm.org/D25906.
Committing on behalf of Tony Jiang.

llvm-svn: 285218
2016-10-26 18:25:45 +00:00
Vitaly Buka 64c80b4e39 [CodeGen] Don't emit lifetime intrinsics for some local variables
Summary:
Current generation of lifetime intrinsics does not handle cases like:

```
  {
    char x;
  l1:
    bar(&x, 1);
  }
  goto l1;

```
We will get code like this:

```
  %x = alloca i8, align 1
  call void @llvm.lifetime.start(i64 1, i8* nonnull %x)
  br label %l1
l1:
  %call = call i32 @bar(i8* nonnull %x, i32 1)
  call void @llvm.lifetime.end(i64 1, i8* nonnull %x)
  br label %l1
```

So the second time bar was called for x which is marked as dead.
Lifetime markers here are misleading so it's better to remove them at all.
This type of bypasses are rare, e.g. code detects just 8 functions building
clang (2329 targets).

PR28267

Reviewers: eugenis

Subscribers: beanz, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D24693

llvm-svn: 285176
2016-10-26 05:42:30 +00:00
Michael Zuckerman facb37cabf [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (Operators: +,*,&&,||) intrinsics to Clang
Committed after LGTM and check-all

 
Vector-reduction arithmetic accepts vectors as inputs and produces scalars as outputs.
This class of vector operation forms the basis of many scientific computations.
In vector-reduction arithmetic, the evaluation off is independent of the order of the input elements of V.
 
Used bisection method. At each step, we partition the vector with previous
step in half, and the operation is performed on its two halves.
This takes log2(n) steps where n is the number of elements in the vector.
 
Reviwer: 1. igorb
         2. craig.topper    
Differential Revision: https://reviews.llvm.org/D25527

llvm-svn: 285054
2016-10-25 07:56:04 +00:00
Mehdi Amini 9825ab0433 Fix handling of %% format specifier in os_log builtins.
Returning `false` was stopping the parsing of further arguments,
which wasn't intended.

llvm-svn: 285047
2016-10-25 00:48:48 +00:00
Mehdi Amini ebff247d41 test/CodeGen/builtins.c: reinstate #ifdef __x86_64__ around __builtin_longjmp
Unadvertently removed in r285019

llvm-svn: 285041
2016-10-24 23:38:24 +00:00
Mehdi Amini 58567d71d0 Fix test on non-X86 platforms
This is a fixup for r285019, adding an `#ifdef __x86_64__` since
the os_log builtin is platform specific.

llvm-svn: 285027
2016-10-24 21:22:01 +00:00
Mehdi Amini 06d367c6c6 Add support for __builtin_os_log_format[_buffer_size]
This reverts commit r285007 and reapply r284990, with a fix for the
opencl test that I broke. Original commit message follows:

These new builtins support a mechanism for logging OS events, using a
printf-like format string to specify the layout of data in a buffer.
The _buffer_size version of the builtin can be used to determine the size
of the buffer to allocate to hold the data, and then __builtin_os_log_format
can write data into that buffer. This implements format checking to report
mismatches between the format string and the data arguments. Most of this
code was written by Chris Willmore.

Differential Revision: https://reviews.llvm.org/D25888

llvm-svn: 285019
2016-10-24 20:39:34 +00:00
Mehdi Amini 9c39fdceda Revert "Add support for __builtin_os_log_format[_buffer_size]"
This reverts commit r284990, two opencl test are broken

llvm-svn: 285007
2016-10-24 19:41:36 +00:00
Mandeep Singh Grang be2ad8f36b [clang] Remove redundant --check-prefix=CHECK from tests
Reviewers: mkuper, rengolin, hans

Subscribers: cfe-commits

Tags: #clang-c

Differential Revision: https://reviews.llvm.org/D25893

llvm-svn: 285001
2016-10-24 18:53:43 +00:00
Mehdi Amini 29034362ae Add support for __builtin_os_log_format[_buffer_size]
These new builtins support a mechanism for logging OS events, using a
printf-like format string to specify the layout of data in a buffer.
The _buffer_size version of the builtin can be used to determine the size
of the buffer to allocate to hold the data, and then __builtin_os_log_format
can write data into that buffer. This implements format checking to report
mismatches between the format string and the data arguments. Most of this
code was written by Chris Willmore.

Differential Revision: https://reviews.llvm.org/D25888

llvm-svn: 284990
2016-10-24 16:56:23 +00:00
Michael Zuckerman 33bd5b235b revert r284963
because new test file is failing in some OS.
test/CodeGen/avx512-reduceIntrin.c

llvm-svn: 284967
2016-10-24 11:30:23 +00:00
Michael Zuckerman 98cb041891 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (Operators: +,*,&&,||) intrinsics to Clang
Committed after LGTM and check-all

Vector-reduction arithmetic accepts vectors as inputs and produces scalars as outputs.
This class of vector operation forms the basis of many scientific computations.
In vector-reduction arithmetic, the evaluation off is independent of the order of the input elements of V.

Used bisection method. At each step, we partition the vector with previous
step in half, and the operation is performed on its two halves.
This takes log2(n) steps where n is the number of elements in the vector.

Differential Revision: https://reviews.llvm.org/D25527

llvm-svn: 284963
2016-10-24 10:53:20 +00:00
Craig Topper 531ce28311 [AVX-512] Replace 64-bit element and 512-bit vector pmin/pmax builtins with native IR like we do for 128/256-bit, but with the addition of masking.
llvm-svn: 284956
2016-10-24 04:04:24 +00:00
Craig Topper eee7c0520c [AVX-512] Replace masked 128/256-bit byte, word, and dword min/max builtins with selects and the older unmasked builtins.
llvm-svn: 284954
2016-10-23 23:57:30 +00:00
Craig Topper 0c5da26572 [AVX-512] Replace 512-bit pmovzx/sx builtins with native IR.
llvm-svn: 284936
2016-10-23 07:35:47 +00:00
Craig Topper 4ef879ac2c [AVX-512] Remove masked 128/256-bit packss/packus builtins and replace with selects and the older unmasked builtins.
llvm-svn: 284935
2016-10-23 07:35:39 +00:00
Craig Topper 4d63dfc286 [AVX-512] Replace masked 128/256-bit pavg builtins and replace with select and older unmasked builtins.
llvm-svn: 284929
2016-10-22 21:24:56 +00:00
Craig Topper 622c63614d [AVX-512] Replace masked 128/256-bit saturating add/sub builtins with select and older unmasked builtins.
llvm-svn: 284928
2016-10-22 21:24:52 +00:00
Craig Topper 11dda92405 [AVX-512] Replace masked 128/256-bit vpmovzx/vpmovsx builtins with native IR.
llvm-svn: 284927
2016-10-22 21:24:48 +00:00
Craig Topper f742445eb4 [AVX-512] Remove duplicate test cases from the avx512vlbw intrinsic test. These tests already exist in the avx512vl test and represent avx512vl instructions.
llvm-svn: 284926
2016-10-22 21:24:44 +00:00
Craig Topper eb1c0afa90 [AVX-512] Remove masked 128/256-bit pshufb builtins. Replace with a select and the older unmaksed builtins.
llvm-svn: 284925
2016-10-22 21:24:42 +00:00
Craig Topper 78a9c40326 [AVX-512] Remove builtins for 128/256-bit pabsb/pabsw. We can use a select and the older non-masked versions instead.
llvm-svn: 284924
2016-10-22 21:24:38 +00:00
Reid Kleckner 2e1538f282 Remove 24 instances of 'REQUIRES: shell'
Tests fall into one of the following categories:

- The requirement was unnecessary

- Additional quoting was required for backslashes in paths (see "sed -e
  's/\\/\\\\/g'") in the sanitizer tests.

- OpenMP used 'REQUIRES: shell' as a proxy for the test failing on
  Windows. Those tests fail there reliably, so use XFAIL instead.

I tried not to remove shell requirements that were added to suppress
flaky test failures, but if I screwed up, we can add it back as needed.

llvm-svn: 284793
2016-10-20 23:11:45 +00:00
Reid Kleckner afd7b69658 Revert "Disable swiftcall test on windows: More brutal way to appease windows bots"
This reverts commit r284174. The tests pass for me locally. It must have
been a 2015 only crash.

Fixes PR30699

llvm-svn: 284781
2016-10-20 21:17:28 +00:00
Victor Leschuk a7ece03b32 DebugInfo: pass alignment value only if it was forced
Preparation to implement DW_AT_alignment support:
 - We pass non-zero align value to DIBuilder only when alignment was forced
 - Modify tests to match this change

Differential Revision: https://reviews.llvm.org/D24426

llvm-svn: 284679
2016-10-20 00:13:19 +00:00
Simon Dardis 1f90f2d33f [mips][msa] Range check MSA intrinsics with immediates
This patch teaches clang to range check immediates for MIPS MSA instrinsics.
This checking is done strictly in comparison to some existing GCC
implementations. E.g. msa_andvi_b(var, 257) does not result in andvi $wX, 1.
Similarily msa_ldi_b takes a range of -128 to 127.

As part of this effort, correct the existing MSA test as it has both illegal
types and immediates.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25017

llvm-svn: 284620
2016-10-19 17:50:52 +00:00
Andrey Bokhanko 9941ca8af6 [Sema] Gcc compatibility of vector shift
Gcc prints error if elements of left and right parts of a shift have different
sizes. This patch is provided the GCC compatibility.

Patch by Vladimir Yakovlev.

Differential Revision: https://reviews.llvm.org/D24669

llvm-svn: 284579
2016-10-19 12:06:10 +00:00
Adrian Prantl fac32f3f6a Explicitly pass an isysroot to avoid the SDKROOT overriding the deployment target.
This fixes the green dragon builders after r284416.

llvm-svn: 284423
2016-10-17 20:37:56 +00:00
Davide Italiano 877428dee1 [Coverage] Update test after r284418.
We now strip coverage metadata if debug info are not present.

llvm-svn: 284419
2016-10-17 20:06:32 +00:00
Adrian Prantl 119a998ae3 Update testcase for r284416.
llvm-svn: 284417
2016-10-17 19:46:26 +00:00
Arnold Schwaighofer b715eb4504 Add more swift calling convention tests
llvm-svn: 284285
2016-10-14 21:55:56 +00:00
Douglas Katzman 3ed0f643fc Implement no_sanitize_address for global vars
llvm-svn: 284272
2016-10-14 19:55:09 +00:00
Albert Gutowski 1deab38717 Implement __stosb intrinsic as a volatile memset
Summary: We need `__stosb` to be an intrinsic, because SecureZeroMemory function uses it without including intrin.h. Implementing it as a volatile memset is not consistent with MSDN specification, but it gives us target-independent IR while keeping the most important properties of `__stosb`.

Reviewers: rnk, hans, thakis, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25334

llvm-svn: 284253
2016-10-14 17:33:05 +00:00
Michael Zuckerman 387530ffe3 [x86][ms-inline-asm] use of "jmp short" in asm is not supported
Test linked to: https://reviews.llvm.org/D24957

Committing in the name of Ziv Izhar: After check-all and LGTM .

Differential Revision: https://reviews.llvm.org/D24958

llvm-svn: 284213
2016-10-14 08:13:27 +00:00
Arnold Schwaighofer 18fad46fe3 Disable swiftcall test on windows: More brutal way to appease windows bots
The backtrace on the bot does not give me any indication what is wrong.
The test case interestingly passes in stage2 of the build.
I don't have a way of debugging this.

Disable the test on windows and hope if there is truly a bug in the code that
was causing we will eventually run into this on other platforms.

llvm-svn: 284174
2016-10-13 22:47:03 +00:00
Albert Gutowski 5e08df0266 Add 64-bit MS _Interlocked functions as builtins again
Summary: Previously global 64-bit versions of _Interlocked functions broke buildbots on i386, so now I'm adding them as builtins for x86-64 and ARM only (should they be also on AArch64? I had problems with testing it for AArch64, so I left it)

Reviewers: hans, majnemer, mstorsjo, rnk

Subscribers: cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25576

llvm-svn: 284172
2016-10-13 22:35:07 +00:00
Arnold Schwaighofer c45025e763 Add required targets to tests to (hopefully) appease bots
llvm-svn: 284162
2016-10-13 20:59:23 +00:00
Arnold Schwaighofer 3d01ad116c Swift Calling Convention: Fix out of bounds access
Use iterator instead of address of element in vector

It is not valid to access one after the last element.

rdar://28759508

llvm-svn: 284150
2016-10-13 19:19:37 +00:00
Arnold Schwaighofer 2d556f2d06 Add more 64bit swiftcall convention tests
llvm-svn: 284133
2016-10-13 17:17:36 +00:00
Albert Gutowski 397d81bb9a Implement MS _ReturnAddress and _AddressOfReturnAddress intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25540

llvm-svn: 284131
2016-10-13 16:03:42 +00:00
Albert Gutowski 1255c19656 fix ms-intrinsics labels code to work with builds with assertions
llvm-svn: 284083
2016-10-12 23:52:38 +00:00
Albert Gutowski 85d54d6bcb fix regexes for label names in ms-intrinsics test
llvm-svn: 284062
2016-10-12 22:22:34 +00:00
Albert Gutowski 2a0621e58a Implement MS _BitScan intrinsics
Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin.

Reviewers: hans, thakis, rnk, majnemer

Subscribers: RKSimon, cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25264

llvm-svn: 284060
2016-10-12 22:01:05 +00:00
Arnold Schwaighofer b574b07564 Remove basic block label in test case
Another attempt to make a bot happy

llvm-svn: 284055
2016-10-12 21:36:15 +00:00
Arnold Schwaighofer bcb927a2ad Specify a target cpu in test case
Hopefully, this makes the bots happy

llvm-svn: 284048
2016-10-12 20:30:24 +00:00
Arnold Schwaighofer 4fc955e669 Declare WinX86_64ABIInfo to satisfy SwiftABI info
This is minimal support that allows swift's test cases on non windows platforms
to pass.

rdar://28738985

llvm-svn: 284032
2016-10-12 18:59:24 +00:00
Albert Gutowski 0fd6e9608e Move x86-64 builtins from SemaChecking.cpp to BuiltinsX86_64.def
Summary: Follow-up to https://reviews.llvm.org/D24598 (separating builtins for x84-64 and i386).

Reviewers: hans, thakis, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25494

llvm-svn: 284026
2016-10-12 17:28:44 +00:00
Hal Finkel 8f96e82cb8 Add an option to save the backend-produced YAML optimization record to a file
The backend now has the capability to save information from optimizations, the
same information that can be used to generate optimization diagnostics but in
machine-consumable form, into an output file. This can be enabled when using
opt (see r282539), and this change enables it when using clang. The idea is
that other tools will be able to consume these files, and perhaps in
combination with the original source code, produce various kinds of
optimization reports for users (and for compiler developers).

We now have at-least two tools that can consume these files:
  * tools/llvm-opt-report
  * utils/opt-viewer

Using the flag -fsave-optimization-record will cause the YAML file to be
generated; the file name will be based on the output file name (if we're using
-c or -S and have an output name), or the input file name. When we're using
CUDA, or some other offloading mechanism, separate files are generated for each
backend target. The output file name can be specified by the user using
-foptimization-record-file=filename.

Differential Revision: https://reviews.llvm.org/D25225

llvm-svn: 283834
2016-10-11 00:26:09 +00:00
Albert Gutowski fcea61c563 Implement MS read/write barriers and __faststorefence intrinsic
Reviewers: hans, rnk, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25442

llvm-svn: 283793
2016-10-10 19:40:51 +00:00
Albert Gutowski 7216f17653 Implement __emul, __emulu, _mul128 and _umul128 MS intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25353

llvm-svn: 283785
2016-10-10 18:09:27 +00:00
Daniel Jasper 1eb779b5ae Revert "[x86][inline-asm][clang] accept 'v' constraint"
This reverts commit r283716.

Breaks buildbot:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/

llvm-svn: 283743
2016-10-10 11:40:28 +00:00
Michael Zuckerman fe2b9b4fbf [x86][inline-asm][clang] accept 'v' constraint
Commit in the name of: Coby Tayree 

1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
 LLVM patch: https://reviews.llvm.org/D25005

Differential Revision: D25004 

llvm-svn: 283716
2016-10-10 05:45:54 +00:00
Nemanja Ivanovic 06d550b85a Removing optimization from the RUN lines and adjusting the checks
to not rely on optimization.

llvm-svn: 283363
2016-10-05 19:11:36 +00:00
Michael Zuckerman 9e43ccfe68 [Clang][AVX512][BuiltIn]Adding missing intrinsics move_{sd|ss} to clang
Differential Revision: http://reviews.llvm.org/D21021

llvm-svn: 283314
2016-10-05 12:56:06 +00:00
Albert Gutowski f3a0bce155 Separate builtins for x84-64 and i386; implement __mulh and __umulh
Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386.

Reviewers: thakis, majnemer, hans, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24598

llvm-svn: 283264
2016-10-04 22:29:49 +00:00
Sanjay Patel 0bb72c1424 [clang] make reciprocal estimate codegen a function attribute
The motivation for the change is that we can't have pseudo-global settings
for codegen living in TargetOptions because that doesn't work with LTO.

Ideally, these reciprocal attributes will be moved to the instruction-level
via FMF, metadata, or something else. But making them function attributes is
at least an improvement over the current state.

I'm committing this patch ahead of the related LLVM patch to avoid bot failures,
but if that patch needs to be reverted, then this should be reverted too.

Differential Revision: https://reviews.llvm.org/D24815

llvm-svn: 283251
2016-10-04 20:44:05 +00:00
Craig Topper c4a8228bcc [AVX-512] Use native IR for masked 512-bit add/sub/mul/div ps/pd intrinsics when rounding mode isn't used.
llvm-svn: 283073
2016-10-02 17:43:00 +00:00
Hal Finkel 415c2a38f2 [PowerPC] Enable soft-float for PPC64, and +soft-float -> -hard-float
Enable soft-float support on PPC64, as the backend now supports it. Also, the
backend now uses -hard-float instead of +soft-float, so set the target features
accordingly.

Fixes PR26970.

llvm-svn: 283061
2016-10-02 02:10:45 +00:00
Craig Topper 4910755107 [AVX-512] Add _MM_FROUND_NO_EXC to test cases that pass a rounding mode intrinsics. This is preparation for a follow up commit that will check validity of rounding mode argument.
llvm-svn: 283053
2016-10-01 21:03:46 +00:00
Martin Storsjo ed95a08ea4 [MS] Implement __iso_volatile loads/stores as builtins
These are supposed to produce the same as normal volatile
pointer loads/stores. When -volatile:ms is specified,
normal volatile pointers are forced to have atomic semantics
(as is the default on x86 in MSVC mode). In that case,
these builtins should still produce non-atomic volatile
loads/stores without acquire/release semantics, which
the new test verifies.

These are only available on ARM (and on AArch64,
although clang doesn't support AArch64/Windows yet).

This implements what is missing for PR30394, making it possible
to compile C++ for ARM in MSVC mode with MSVC headers.

Differential Revision: https://reviews.llvm.org/D24986

llvm-svn: 282900
2016-09-30 19:13:46 +00:00
Artem Belevich fda9905062 [CUDA] added __nvvm_atom_{sys|cta}_* builtins.
These builtins are available on sm_60+ GPU only.

Differential Revision: https://reviews.llvm.org/D24944

llvm-svn: 282609
2016-09-28 17:47:35 +00:00
Elad Cohen b107a22afb [X86] Remove the mm_malloc.h include guard hack from the X86 builtins tests
The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.

Differential Revision: https://reviews.llvm.org/D24825

llvm-svn: 282581
2016-09-28 11:59:09 +00:00
Ayman Musa 2e250e8845 [avx512] Add aliases to some missing avx512 intrinsics.
Differential Revision:https: //reviews.llvm.org/D24961

llvm-svn: 282488
2016-09-27 14:06:32 +00:00
Nemanja Ivanovic 10e2b5dcaa [Power9] Builtins for ELF v.2 ABI conformance - front end portion
This patch corresponds to review:
https://reviews.llvm.org/D24397

It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with
a number of altivec.h functions (refer to the code review for a list).

llvm-svn: 282481
2016-09-27 10:45:22 +00:00
Richard Smith 9e67b9922b P0145R3 (C++17 evaluation order tweaks): consistently emit the LHS of array
subscripting before the RHS, regardless of which is the base and which is the
index.

llvm-svn: 282453
2016-09-26 23:49:47 +00:00
Renato Golin fa007aeef4 Revert "set the underlying value of “#pragma STDC FP_CONTRACT” on by default"
This reverts commit r282259, as it broke the AArch64 test-suite bots.

llvm-svn: 282289
2016-09-23 20:32:52 +00:00
Sebastian Pop 6919ae5abc set the underlying value of “#pragma STDC FP_CONTRACT” on by default
Clang has the default FP contraction setting of “-ffp-contract=on”, which
doesn't really mean “on” in the conventional sense of the word, but rather
really means “according to the per-statement effective value of the relevant
pragma”.

Before this patch, Clang has that pragma defaulting to “off”. Since the
“-ffp-contract=on” mode is really an AND of two booleans and the second of them
defaults to “off”, the whole thing effectively defaults to “off”. This patch
changes the default value of the pragma to “on”, thus making the default pair of
booleans (on, on) rather than (on, off). This makes FP optimization slightly
more aggressive than before when not using either “-Ofast”, “-ffast-math”, or
“-ffp-contract=fast”. Even with this patch the compiler still respects
“-ffp-contract=off”.

As per a suggestion by Steve Canon, the added code does _not_ require “-O3” or
higher. This is so as to try our best to preserve identical floating-point
results for unchanged source code compiling for an unchanged target when only
changing from any optimization level in the set (“-O0”, “-O1”, “-O2”, “-O3”) to
any other optimization level in that set. “-Os” and “-Oz” seem to be behaving
identically, i.e. should probably be considered a part of the aforementioned
set, but I have not reviewed this rigorously. “-Ofast” is explicitly _not_ a
member of that set.

Patch authored by Abe Skolnik [a.skolnik@samsung.com] and Stephen Canon [scanon@apple.com].

Differential Revision: https://reviews.llvm.org/D24481

llvm-svn: 282259
2016-09-23 16:16:25 +00:00
Craig Topper 5fbabd77c7 [X86] Fix some illegal rounding modes in some builtin test cases to ones that would properly compile to valid assembly.
llvm-svn: 282137
2016-09-22 06:13:33 +00:00
Simon Dardis 3d9c763816 [mips] MSA intrinsics header file
This patch adds the msa.h header file containing the shorter names for the
MSA instrinsics, e.g. msa_sll_b for builtin_msa_sll_b.

Reviewers: vkalintiris, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D24674

llvm-svn: 281975
2016-09-20 15:07:36 +00:00
Dehao Chen dd6f8cab08 Remove InstructionCombining and its related pass from sample pgo passes as we can handle "invoke" correctly.
Summary: We previously relies on InstructionCombining pass to remove invoke instructions. Now that we can inline invoke instructions correctly, we do not need these passes any more.

Reviewers: dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24730

llvm-svn: 281910
2016-09-19 16:02:52 +00:00
Dean Michael Berris eeee3b17f3 [XRay] ARM 32-bit no-Thumb support in Clang
Just a test for now, adapted from x86_64 tests of XRay.
This is one of 3 commits to different repositories of XRay ARM port. The other 2 are:

https://reviews.llvm.org/D23931 (LLVM)
https://reviews.llvm.org/D23933 (compiler-rt)

Differential Revision: https://reviews.llvm.org/D23932

llvm-svn: 281879
2016-09-19 00:59:19 +00:00
Peter Collingbourne 96dd3635bf Add REQUIRES line.
llvm-svn: 281796
2016-09-16 22:56:12 +00:00
Peter Collingbourne 0a3ede0a14 Add target triples to fix test on non-x86.
llvm-svn: 281790
2016-09-16 22:26:45 +00:00
Peter Collingbourne e1b7d2520d CodeGen: Add more checks to nobuiltin.c test, add a negative test.
llvm-svn: 281785
2016-09-16 22:05:53 +00:00
Akira Hatanaka 819867191f [Sema] Allow shifting a scalar operand by a vector operand.
r278501 inadvertently introduced a bug in which it disallowed shifting
scalar operands by vector operands when not compiling for OpenCL. This
commit fixes it.

Patch by Vladimir Yakovlev.

Differential Revision: https://reviews.llvm.org/D24467

llvm-svn: 281669
2016-09-15 22:19:25 +00:00
Wei Mi 6582669aa9 Update clang unittests for rL281586.
The change in rL281586 is in llvm component and tests updated here are
in clang component, so I have to commit them consecutively.

llvm-svn: 281587
2016-09-15 06:31:30 +00:00
Albert Gutowski 727ab8a803 Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: alexshap, cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281540
2016-09-14 21:19:43 +00:00
Dehao Chen 5d4f0be5b8 Convert finite to builtin
Summary: This patch converts finite/__finite to builtin functions so that it will be inlined by compiler.

Reviewers: hfinkel, davidxl, efriedma

Subscribers: efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D24483

llvm-svn: 281509
2016-09-14 17:34:14 +00:00
Albert Gutowski fc19fa3721 Temporary fix for MS _Interlocked intrinsics
llvm-svn: 281401
2016-09-13 21:51:37 +00:00
Albert Gutowski 9918cb6573 Reverse commit 281375 (breaks building Chromium)
llvm-svn: 281399
2016-09-13 21:24:51 +00:00
Albert Gutowski ce7a9a47b2 Add bunch of _Interlocked builtins
Reviewers: compnerd, thakis, Prazek, majnemer, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24153

llvm-svn: 281378
2016-09-13 19:43:33 +00:00
Albert Gutowski ae3fb3113f Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281375
2016-09-13 19:26:42 +00:00
Peter Collingbourne eeb56abe64 Update Clang for D20147 ("DebugInfo: New metadata representation for global variables.")
Differential Revision: http://reviews.llvm.org/D20415

llvm-svn: 281285
2016-09-13 01:13:19 +00:00
George Burgess IV f8f6324983 [Sema] Fix PR30346: relax __builtin_object_size checks.
This patch makes us act more conservatively when trying to determine
the objectsize for an array at the end of an object. This is in
response to code like the following:

```
struct sockaddr {
  /* snip */
  char sa_data[14];
};

void foo(const char *s) {
  size_t slen = strlen(s) + 1;
  size_t added_len = slen <= 14 ? 0 : slen - 14;
  struct sockaddr *sa = malloc(sizeof(struct sockaddr) + added_len);
  strcpy(sa->sa_data, s);
  // ...
}
```

`__builtin_object_size(sa->sa_data, 1)` would return 14, when there
could be more than 14 bytes at `sa->sa_data`.

Code like this is apparently not uncommon. FreeBSD's manual even
explicitly mentions this pattern:
https://www.freebsd.org/doc/en/books/developers-handbook/sockets-essential-functions.html
(section 7.5.1.1.2).

In light of this, we now just give up on any array at the end of an
object if we can't find the object's initial allocation.

I lack numbers for how much more conservative we actually become as a
result of this change, so I chose the fix that would make us as
compatible with GCC as possible. If we want to be more aggressive, I'm
happy to consider some kind of whitelist or something instead.

llvm-svn: 281277
2016-09-12 23:50:35 +00:00
Adrian Prantl 432d3d2619 Debug info: Bump the default DWARF version on Darwin to 4.
This is a spiritual re-commit of r201375 with only a brief delay
for upgrading the green dragon builders.

llvm-svn: 281094
2016-09-09 21:10:35 +00:00
Albert Gutowski b6a11acb53 Implement MS _rot intrinsics
Reviewers: thakis, Prazek, compnerd, rnk

Subscribers: majnemer, cfe-commits

Differential Revision: https://reviews.llvm.org/D24311

llvm-svn: 280997
2016-09-08 22:32:19 +00:00
Renato Golin 0f1fcd6fc6 Revert "[XRay] ARM 32-bit no-Thumb support in Clang"
This reverts commit r280889, as the original LLVM commits broke the thumb
buildbots.

llvm-svn: 280968
2016-09-08 17:12:32 +00:00
Dean Michael Berris 6f2622e253 [XRay] ARM 32-bit no-Thumb support in Clang
Just a test for now, adapted from x86_64 tests of XRay.
This is one of 3 commits to different repositories of XRay ARM port. The
other 2 are:

1. https://reviews.llvm.org/D23931 (LLVM)
2. https://reviews.llvm.org/D23933 (compiler-rt)

Differential Review: https://reviews.llvm.org/D23932

llvm-svn: 280889
2016-09-08 00:23:28 +00:00
George Burgess IV 2da19a5a08 Move CHECK right before the function it describes.
llvm-svn: 280852
2016-09-07 20:15:03 +00:00
George Burgess IV fbad5b2f1b [Sema] Compare bad conversions in overload resolution.
r280553 introduced an issue where we'd emit ambiguity errors for code
like:

```
void foo(int *, int);
void foo(unsigned int *, unsigned int);

void callFoo() {
  unsigned int i;
  foo(&i, 0); // ambiguous: int->unsigned int is worse than int->int,
              // but unsigned int*->unsigned int* is better than
              // int*->int*.
}
```

This patch fixes this issue by changing how we handle ill-formed (but
valid) implicit conversions. Candidates with said conversions now always
rank worse than candidates without them, and two candidates are
considered to be equally bad if they both have these conversions for
the same argument.

Additionally, this fixes a case in C++11 where we'd complain about an
ambiguity in a case like:

```
void f(char *, int);
void f(const char *, unsigned);
void g() { f("abc", 0); }
```

...Since conversion to char* from a string literal is considered
ill-formed in C++11 (and deprecated in C++03), but we accept it as an
extension.

llvm-svn: 280847
2016-09-07 20:03:19 +00:00
Craig Topper 2dfab63bb3 [AVX-512] Remove 128-bit and 256-bit masked floating point add/sub/mul/div builtins and replace with native operations.
We can't do the 512-bit ones because they take a rounding mode argument that we can't represent.

llvm-svn: 280635
2016-09-04 18:30:17 +00:00
Craig Topper f43e4a1728 [AVX-512] Remove masked integer mullo builtins and replace with native IR.
llvm-svn: 280597
2016-09-03 19:19:49 +00:00
Craig Topper 0e18976b8d [AVX-512] Remove masked integer add/sub builtins and replace with native IR.
llvm-svn: 280596
2016-09-03 18:29:35 +00:00
Yunzhong Gao f4903a3675 (clang part) Implement MASM-flavor intel syntax behavior for inline MS asm block.
Clang tests for verifying the following syntaxes:
1. 0xNN and NNh are accepted as valid hexadecimal numbers, but 0xNNh is not.     
   0xNN and NNh may come with optional U or L suffix.                            
2. NNb is accepted as a valid binary (base-2) number, but 0bNN is not.           
   NNb may come with optional U or L suffix.                                     
                                                                                 
Differential Revision: https://reviews.llvm.org/D22112

llvm-svn: 280556
2016-09-02 23:16:06 +00:00
George Burgess IV 2099b54102 [Sema] Relax overloading restrictions in C.
This patch allows us to perform incompatible pointer conversions when
resolving overloads in C. So, the following code will no longer fail to
compile (though it will still emit warnings, assuming the user hasn't
opted out of them):

```
void foo(char *) __attribute__((overloadable));
void foo(int) __attribute__((overloadable));

void callFoo() {
  unsigned char bar[128];
  foo(bar); // selects the char* overload.
}
```

These conversions are ranked below all others, so:

  A. Any other viable conversion will win out
  B. If we had another incompatible pointer conversion in the example
     above (e.g. `void foo(int *)`), we would complain about
     an ambiguity.

Differential Revision: https://reviews.llvm.org/D24113

llvm-svn: 280553
2016-09-02 22:59:57 +00:00
Honggyu Kim 2b0e424b2f [Frontend] Fix mcount inlining bug
Since some profiling tools, such as gprof, ftrace, and uftrace, use
-pg option to generate a mcount function call at the entry of each
function. Function invocation can be detected by this hook function.

But mcount insertion is done before function inlining phase in clang,
sometime a function that already has a mcount call can be inlined in the
middle of another function.

This patch adds an attribute "counting-function" to each function
rather than emitting the mcount call directly in frontend so that this
attribute can be processed in backend. Then the mcount calls can be
properly inserted in backend after all the other optimizations are
completed.

Link: https://llvm.org/bugs/show_bug.cgi?id=28660

Reviewers: hans, rjmccall, hfinkel, rengolin, compnerd

Subscribers: shenhan, cfe-commits

Differential Revision: https://reviews.llvm.org/D22666

llvm-svn: 280355
2016-09-01 11:29:21 +00:00
Nick Lewycky 97e49ac59e Add -fprofile-dir= to clang.
-fprofile-dir=path allows the user to specify where .gcda files should be
emitted when the program is run. In particular, this is the first flag that
causes the .gcno and .o files to have different paths, LLVM is extended to
support this. -fprofile-dir= does not change the file name in the .gcno (and
thus where lcov looks for the source) but it does change the name in the .gcda
(and thus where the runtime library writes the .gcda file). It's different from
a GCOV_PREFIX because a user can observe that the GCOV_PREFIX_STRIP will strip
paths off of -fprofile-dir= but not off of a supplied GCOV_PREFIX.

To implement this we split -coverage-file into -coverage-data-file and
-coverage-notes-file to specify the two different names. The !llvm.gcov
metadata node grows from a 2-element form {string coverage-file, node dbg.cu}
to 3-elements, {string coverage-notes-file, string coverage-data-file, node
dbg.cu}. In the 3-element form, the file name is already "mangled" with
.gcno/.gcda suffixes, while the 2-element form left that to the middle end
pass.

llvm-svn: 280306
2016-08-31 23:04:32 +00:00
Craig Topper a815f488d5 [AVX-512] Implement masked floating point logical operations with native IR and remove the builtins.
llvm-svn: 280197
2016-08-31 05:38:58 +00:00
Craig Topper d0681d528d [X86] Use v2i64 vectors to implement _mm_and/andn/or/xor_pd.
These will be reused when removing some builtins from avx512vldqintrin.h and this will make the tests for that change show a better number of vector elements.

llvm-svn: 280196
2016-08-31 05:38:55 +00:00
Sjoerd Meijer 0a8d4216ad This adds new options -fdenormal-fp-math and passes through option -ffast-math
to CC1, which are translated to function attributes and can e.g. be mapped on
build attributes FP_exceptions and FP_denormal. Setting these build attributes
allows better selection of floating point libraries.

Differential Revision: https://reviews.llvm.org/D23840

llvm-svn: 280064
2016-08-30 08:09:45 +00:00
Hal Finkel 84832a7a79 [PowerPC] Update the DWARF register-size table
The PPC64 DWARF register-size table did not match the ABI specification (or
GCC, for that matter). Fix that, and add a regression test.

Fixes PR27931.

llvm-svn: 280053
2016-08-30 02:38:34 +00:00
Reid Kleckner b04449d97a [MS] Win64 va_arg should expect large arguments to be passed indirectly
Fixes PR20569

llvm-svn: 279774
2016-08-25 20:42:26 +00:00
David Blaikie a45c31a5b4 DebugInfo: Add flag to CU to disable emission of inline debug info into the skeleton CU
In cases where .dwo/.dwp files are guaranteed to be available, skipping
the extra online (in the .o file) inline info can save a substantial
amount of space - see the original r221306 for more details there.

llvm-svn: 279651
2016-08-24 18:29:58 +00:00
Reid Kleckner 66e7717b46 Revert "[X86] Add xgetbv/x[X86] Add xgetbv xsetbv intrinsics to non-windows platforms"
This reverts commit r278783.  It breaks usage of _xgetbv on Windows.

llvm-svn: 278814
2016-08-16 16:04:14 +00:00
James Molloy 5980232178 Left shifts of negative values are defined if -fwrapv is set
This means we shouldn't emit ubsan detection code or warn.
Fixes PR25552.

llvm-svn: 278786
2016-08-16 09:45:36 +00:00
Marina Yatsina 197b65f833 [X86] Add xgetbv/x[X86] Add xgetbv xsetbv intrinsics to non-windows platforms
commit on behalf of guyblank

Differential Revision: https://reviews.llvm.org/D21959

llvm-svn: 278783
2016-08-16 08:13:36 +00:00
David Majnemer b439dfe6ba [CodeGen] Ignore unnamed bitfields before handling vector fields
We processed unnamed bitfields after our logic for non-vector field
elements in records larger than 128 bits.  The vector logic would
determine that the bit-field disqualifies the record from occupying a
register despite the unnamed bit-field not participating in the record
size nor its alignment.

N.B. This behavior matches GCC and ICC.

llvm-svn: 278656
2016-08-15 07:20:40 +00:00
David Majnemer b229cb0a43 [CodeGen] Correctly implement the AVX512 psABI rules
An __m512 vector type wrapped in a structure should be passed in a
vector register.

Our prior implementation was based on a draft version of the psABI.

This fixes PR28975.

N.B. The update to the ABI was made here:
https://github.com/hjl-tools/x86-psABI/commit/30f9c9

llvm-svn: 278655
2016-08-15 06:39:18 +00:00
Lama Saba 5d01f224cf [X86][AVX512] lower __mm512_andnot_ps/__mm512_andnot_pd to IR
Differential revision: https://reviews.llvm.org/D23262
 

llvm-svn: 278209
2016-08-10 10:34:45 +00:00
Simon Pilgrim ebaabc7b99 [X86][AVX] Ensure we only match against 1-byte alignment
llvm-svn: 278208
2016-08-10 09:59:49 +00:00
Chandler Carruth 4c5e8ccf74 [x86] Fix a really nasty bug introduced in r276417 where alignment
constraints were added to _mm256_broadcast_{pd,ps} intel intrinsics.

The spec for these intrinics is ... pretty much silent on alignment.
This is especially frustrating considering the amount of discussion of
alignment in the load and store instrinsics. So I was forced to rely on
the specification for the VBROADCASTF128 instruction.

That instruction's spec is *also* completely silent on alignment.
Fortunately, when it comes to the instruction's spec, silence is enough.
There is no #GP fault option for an underaligned address so this
instruction, and by inference the intrinsic, can read any alignment.

As it happens, the old code worked exactly this way and in fact we have
plenty of code that hands pointers with less than 16-byte alignment to
these intrinsics. This code broke pretty spectacularly with this commit.

Fortunately, the fix is super simple! Change a 16 to a 1, and ta da!

Anyways, a lot of debugging for a really boring fix. =]

llvm-svn: 278202
2016-08-10 07:32:47 +00:00
Charles Davis 0e37911334 Revert "[Attr] Add support for the `ms_hook_prologue` attribute."
This reverts commit r278050. It depends on r278048, which will be
reverted.

llvm-svn: 278052
2016-08-08 21:19:08 +00:00
Charles Davis 3e43970d71 [Attr] Add support for the `ms_hook_prologue` attribute.
Summary:
Based on a patch by Michael Mueller.

This attribute specifies that a function can be hooked or patched. This
mechanism was originally devised by Microsoft for hotpatching their
binaries (which they're constantly updating to stay ahead of crackers,
script kiddies, and other ne'er-do-wells on the Internet), but it's now
commonly abused by Windows programs that want to hook API functions. It
is for this reason that this attribute was added to GCC--hence the name,
`ms_hook_prologue`.

Depends on D19908.

Reviewers: rnk, aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D19909

llvm-svn: 278050
2016-08-08 21:03:39 +00:00
Asaf Badouh 2f344b788c [AVX512] integer comparisions enumeration.
fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842

Differential Revision: https://reviews.llvm.org/D22212

 

llvm-svn: 277955
2016-08-07 10:43:04 +00:00
Eric Christopher abb2b54ad3 After PR28761 use -Wall with -Werror in builtins tests to identify
possible problems in headers.

llvm-svn: 277696
2016-08-04 06:02:50 +00:00
Saleem Abdulrasool 4a7130a8fb CodeGen: simplify the CC handling for TLS wrappers
Use the calling convention of the wrapper directly to set the calling convention
to ensure that the calling convention matches.  Incorrectly setting the calling
convention results in the code path being entirely nullified as InstCombine +
SimplifyCFG will prune the mismatched CC calls.

llvm-svn: 277390
2016-08-01 21:31:24 +00:00
Evandro Menezes ec133b3d20 [AArch64] Add support for Samsung Exynos M2 (NFC).
llvm-svn: 277365
2016-08-01 18:39:55 +00:00
Saleem Abdulrasool 369f4d64a2 CodeGen: try harder to make the CFString structure RW
The previous change was insufficient to mark the content as read-write as the
structure itself was marked constant.  Adjust this and add tests to ensure that
the section is marked appropriately as being read-write.

llvm-svn: 277200
2016-07-29 19:15:51 +00:00
Nirav Dave 2e46f720fa Replace preserve-as-comments CodeGen test with driver test
llvm-svn: 276947
2016-07-28 00:36:34 +00:00
Nirav Dave 574a886e75 Add target triple in test
llvm-svn: 276915
2016-07-27 20:48:39 +00:00
Nirav Dave 993a139847 Add flags to toggle preservation of assembly comments
Summary: Add -fpreserve-as-comments and -fno-preserve-as-comments.

Reviewers: echristo, rnk

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D22883

llvm-svn: 276907
2016-07-27 19:57:40 +00:00
Pirama Arumuga Nainar bb846a32e4 Adjust coercion of aggregates on RenderScript
Summary:
In RenderScript, the size of the argument or return value emitted in the
IR is expected to be the same as the size of corresponding qualified
type.  For ARM and AArch64, the coercion performed by Clang can
change the parameter or return value to a type whose size is different
(usually larger) than the original aggregate type.  Specifically, this
can happen in the following cases:
    - Aggregate parameters of size <= 64 bytes and return values smaller
      than 4 bytes on ARM
    - Aggregate parameters and return values smaller than bytes on
      AArch64

This patch coerces the cases above to an integer array that is the same
size and alignment as the original aggregate.  A new field is added to
TargetInfo to detect a RenderScript target and limit this coercion just
to that case.

Tests added to test/CodeGen/renderscript.c

Reviewers: rsmith

Subscribers: aemerson, srhines, llvm-commits

Differential Revision: https://reviews.llvm.org/D22822

llvm-svn: 276904
2016-07-27 19:01:51 +00:00
David Majnemer 3f5a4354db Update for LLVM changes
InstSimplify has gained the ability to remove needless bitcasts which
perturbed some clang codegen tests.

llvm-svn: 276756
2016-07-26 15:21:18 +00:00
David Majnemer 12b9e76b62 Update for LLVM changes
InstSimplify has gained the ability to remove needless bitcasts which
perturbed some clang codegen tests.

llvm-svn: 276728
2016-07-26 05:52:37 +00:00
Pirama Arumuga Nainar 98eaa62e36 Add .rgba syntax extension to ext_vector_type types
Summary:
This patch enables .rgba accessors to ext_vector_type types and adds
tests for syntax validation and code generation.

'a' and 'b' can appear either in the point access mode or the numeric
access mode (for indices 10 and 11).  To disambiguate between the two
usages, the accessor type is explicitly passed to relevant methods.

Reviewers: rsmith

Subscribers: Anastasia, bader, srhines, cfe-commits

Differential Revision: http://reviews.llvm.org/D20602

llvm-svn: 276455
2016-07-22 18:49:43 +00:00
Simon Pilgrim 2d8517303c [X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128 with generic IR
As discussed on D22460, I've updated the vbroadcastf128 pd256/ps256 builtins to map directly to generic IR - load+splat a 128-bit vector to both lanes of a 256-bit vector.

Fix for PR28657.

llvm-svn: 276417
2016-07-22 13:58:56 +00:00
Wolfgang Pieb 24e03341af Reverting r275115 which caused PR28634.
When empty (forwarding) basic blocks that are referenced by user labels
are removed, incorrect code may be generated.

llvm-svn: 276361
2016-07-21 23:28:18 +00:00
Craig Topper fe22d59a84 [Sema,X86] Add explicit check to ensure that builtins that require x86-64 target throw an error if used on 32-bit target.
If these builtins are allowed to go through on a 32-bit target they will fire assertions in the backend.

Fixes PR28635.

llvm-svn: 276250
2016-07-21 07:38:43 +00:00
Craig Topper 45db56c375 [X86] Add missing __x86_64__ qualifiers on a bunch of intrinsics that assume 64-bit GPRs are available.
Usages of these intrinsics in a 32-bit build results in assertions in the backend.

llvm-svn: 276249
2016-07-21 07:38:39 +00:00
Simon Pilgrim e3b9ee0645 [X86][SSE] Reimplement SSE fp2si conversion intrinsics instead of using generic IR
D20859 and D20860 attempted to replace the SSE (V)CVTTPS2DQ and VCVTTPD2DQ truncating conversions with generic IR instead.

It turns out that the behaviour of these intrinsics is different enough from generic IR that this will cause problems, INF/NAN/out of range values are guaranteed to result in a 0x80000000 value - which plays havoc with constant folding which converts them to either zero or UNDEF. This is also an issue with the scalar implementations (which were already generic IR and what I was trying to match).

This patch changes both scalar and packed versions back to using x86-specific builtins.

It also deals with the other scalar conversion cases that are runtime rounding mode dependent and can have similar issues with constant folding.

Differential Revision: https://reviews.llvm.org/D22105

llvm-svn: 276102
2016-07-20 10:18:01 +00:00
David Majnemer 24547108d6 Let FuncAttrs infer the 'returned' argument attribute
This reverts commit r275756.

llvm-svn: 276014
2016-07-19 19:59:24 +00:00
Daniel Sanders 6a73883c48 [mips] Correct label prefixes for N32 and N64.
Summary:
N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own
($).

This fixes the majority of object differences between -fintegrated-as and
-fno-integrated-as.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22412

llvm-svn: 275967
2016-07-19 10:49:03 +00:00
NAKAMURA Takumi 966bde50c3 Revert r275678, "Revert "Revert r275027 - Let FuncAttrs infer the 'returned' argument attribute""
This reverts also r275029, "Update Clang tests after adding inference for the returned argument attribute"

It broke LTO build. Seems miscompilation.

llvm-svn: 275756
2016-07-18 03:23:25 +00:00
Hal Finkel 81cdef31e6 Revert "Revert r275029 - Update Clang tests after adding inference for the returned argument attribute"
This reverts commit r275043 after reapplying the underlying LLVM commit.

llvm-svn: 275679
2016-07-16 07:22:09 +00:00
Aaron Ballman 7d2aecbc76 Add XRay flags to Clang. We implement two flags to control the XRay behaviour:
-fxray-instrument: enables XRay annotation of IR
-fxray-instruction-threshold: configures the threshold for function size (looking at IR instructions), and allow LLVM to decide whether to add the nop sleds later on in the process.

Also implements the related xray_always_instrument and xray_never_instrument function attributes.

Patch by Dean Michael Berris.

llvm-svn: 275330
2016-07-13 22:32:15 +00:00
Wolfgang Pieb 002df71dd3 Correcting the previous fix for test submitted with r275115.
llvm-svn: 275128
2016-07-11 23:27:19 +00:00
Wolfgang Pieb c72930dba5 Fix test submitted with r275115 (failed on ppc64 buildbots).
llvm-svn: 275127
2016-07-11 23:20:28 +00:00
Wolfgang Pieb 5675c96987 Prevent the creation of empty (forwarding) blocks resulting from nested ifs.
Summary:
Nested if statements can generate empty BBs whose terminator branches 
unconditionally to its successor. These branches are not eliminated
to help generate better line number information in some cases, but there
is no reason to keep the empty blocks that result from nested ifs.

Reviewers: mehdi_amini, dblaikie, echristo

Subscribers: mehdi_amini, cfe-commits

Differential review: http://reviews.llvm.org/D11360
 

llvm-svn: 275115
2016-07-11 22:22:23 +00:00
Craig Topper 4d61a3c2d8 [AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove the builtins.
llvm-svn: 275049
2016-07-11 06:14:18 +00:00
Hal Finkel 9a17d7ac6e Revert r275029 - Update Clang tests after adding inference for the returned argument attribute
The associated backend change is causing miscompiles from the AArch64 backend.

llvm-svn: 275043
2016-07-11 04:52:07 +00:00
Hal Finkel 617c962752 Update Clang tests after adding inference for the returned argument attribute
Adjusting tests after r275027.

llvm-svn: 275029
2016-07-10 22:26:52 +00:00
Craig Topper 6e76fb61a7 [X86] Use __butilin_shufflevector for 512-bit shufps intrinsics.
llvm-svn: 275012
2016-07-10 05:57:21 +00:00
Craig Topper 95b61b0544 [X86] Use __builtin_ia32_vec_ext_v4hi and __builtin_ia32_vec_set_v4hi to implement pextrw/pinsertw MMX intrinsics instead of trying to use native IR.
Without this we end up generating code that doesn't use mmx registers and probably doesn't work well with other mmx intrinsics.

llvm-svn: 274968
2016-07-09 05:30:41 +00:00
Craig Topper 83c65d7889 [X86] Uncomment the _mm_extract_ps test and add checks.
llvm-svn: 274965
2016-07-09 04:38:17 +00:00
Saleem Abdulrasool 0295f8ce39 CodeGen: tweak CFString section for COFF, ELF
Place the structure data into `cfstring`.  This both isolates the structures to
permit coalescing in the future (by the linker) as well as ensures that it
doesnt get marked as read-only data.  The structures themselves are not
read-only, only the string contents.

llvm-svn: 274956
2016-07-09 01:59:51 +00:00
Craig Topper a1bee4398c [X86] Remove dead builtins that don't exist in the backend intrinsic file and don't have custom handling in CGBuiltins.cpp either.
llvm-svn: 274825
2016-07-08 05:11:47 +00:00
Chad Rosier 4c077aaabb [AArch64] Change the preferred alignment for char and short.
This reinstates commits r273280 and r273289.

Original Review: http://reviews.llvm.org/D21414.

llvm-svn: 274791
2016-07-07 20:02:25 +00:00
Justin Lebar 495f1a22af [CUDA] Rename the __nvvm_bar0 builtin back to __syncthreads.
The builtin was renamed in r274770.  But __syncthreads is part of our
user-facing API, so we need to keep the name as-is.

Patch by Justin Bogner.

llvm-svn: 274780
2016-07-07 18:15:03 +00:00
Justin Bogner 2d5de7e568 NVPTX: Use the nvvm builtins to read SRegs rather than the legacy ptx ones
The ptx spellings were removed from LLVM in r274769.

llvm-svn: 274770
2016-07-07 16:41:08 +00:00
Chad Rosier 5ba1d11b5c Revert "[aarch64] Update datalayout for aarch64 tests"
This reverts commit r273289, which was a follow to r273280, which was
reverted because the change was not properly approved.

llvm-svn: 274767
2016-07-07 16:37:21 +00:00
Roger Ferrer Ibanez c487614bc0 Add negative test for TBAA
Revision r178818 added tests for TBAA but was missing negative tests to ensure
that TBAA markers are not emitted when TBAA is off.

Differential Revision: http://reviews.llvm.org/D21295

llvm-svn: 274610
2016-07-06 07:13:49 +00:00
Craig Topper 425d02d33e [X86] Use native IR for immediate values 0-7 of packed fp cmp builtins. This makes them the same as what is done when using the SSE builtins for these same encodings.
llvm-svn: 274608
2016-07-06 06:27:31 +00:00
Craig Topper 46e7555d4b [AVX512] Use the generic ctlz intrinsic to implement the vplzcntd/q builtins.
llvm-svn: 274603
2016-07-06 04:24:29 +00:00
Michael Zuckerman b920665493 [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clang
Differential Revision: http://reviews.llvm.org/D21792

llvm-svn: 274559
2016-07-05 15:56:03 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
llvm-svn: 274544
2016-07-05 12:59:33 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
2016-07-05 12:24:14 +00:00
Michael Zuckerman 7dac6fbdf8 [Clang][BuiltIn][AVX512] adding _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics
Differential Revision: http://reviews.llvm.org/D21729

llvm-svn: 274532
2016-07-05 08:08:01 +00:00
Craig Topper 2a383c9273 [X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
llvm-svn: 274525
2016-07-04 22:18:01 +00:00
Simon Pilgrim 427154db2a [X86][AVX512] Converted the VSHUFPD intrinsics to generic IR
llvm-svn: 274523
2016-07-04 21:30:47 +00:00
Simon Pilgrim 30db811526 [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR
llvm-svn: 274502
2016-07-04 13:34:44 +00:00
Simon Pilgrim 17388f2569 [X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IR
llvm-svn: 274492
2016-07-04 11:06:15 +00:00
Craig Topper ac1823f6e9 [AVX512] Modify what indices we emit for the zero vector we use for zero extension of the result of a v2i1 or v4i1 masked compare. This way we emit something that the backend easily interprets as a concatenation rather than a true shuffle. This delivers slightly better codegen with the current backend capabilities.
llvm-svn: 274484
2016-07-04 07:09:46 +00:00
Simon Pilgrim 275d721485 [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
llvm companion patch imminent

llvm-svn: 274442
2016-07-02 17:16:25 +00:00
Craig Topper b3a4477b13 [X86] Replace 128-bit and 256 masked vpermilps/vpermilpd builtins with native IR.
llvm-svn: 274425
2016-07-02 05:36:43 +00:00
Pirama Arumuga Nainar 54a213d280 Add TargetInfo for 32-bit and 64-bit RenderScript
Summary:
The TargetInfo for 'renderscript32' and 'renderscript64' ArchTypes are
subclasses of ARMleTargetInfo and AArch64leTargetInfo respectively.

RenderScript32TargetInfo modifies the ARM ABI to set LongWidth and
LongAlign to be 64-bits.  Other than this modification, the underlying
TargetInfo base classes is initialized as if they have "armv7" and
"aarch64" architecture type respectively.

Reviewers: rsmith, echristo

Subscribers: aemerson, tberghammer, cfe-commits, danalbert, mehdi_amini, srhines

Differential Revision: http://reviews.llvm.org/D21334

llvm-svn: 274409
2016-07-02 00:05:42 +00:00
Tim Shen 53547d95ca Removes CHECKs for symbolic label names (as Debug Clang will generate).
Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274396
2016-07-01 22:50:00 +00:00
Tim Shen ff12edbff4 Remove unncessary CHECKs from r274385
llvm-svn: 274387
2016-07-01 21:16:58 +00:00
Tim Shen 421119fd89 [Temporary, Lifetime] Add lifetime marks for temporaries
With all MaterializeTemporaryExprs coming with a ExprWithCleanups, it's
easy to add correct lifetime.end marks into the right RunCleanupsScope.

Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274385
2016-07-01 21:08:47 +00:00
Matt Arsenault f652caea65 Emit more intrinsics for builtin functions
This is important for building libclc. Since r273039 tests are failing
due to now emitting calls to these functions instead of emitting the
DAG node. The libm function names are implemented for OpenCL, and should
call the locally defined versions, so -fno-builtin is used. The IR
Some functions use the __builtins and expect the intrinsics to be
emitted. Without this we end up with nobuiltin calls to intrinsics
or to unsupported library calls.

llvm-svn: 274370
2016-07-01 17:38:14 +00:00
Michael Zuckerman 3f316abdce [Clang][Intrinsics][AVX512][BuiltIn] adding intrinsics for vrangesd instruction set
Differential Revision: http://reviews.llvm.org/D21734

llvm-svn: 274218
2016-06-30 08:05:46 +00:00
David Majnemer b4b671e4a8 [CodeView] Implement support for bitfields in Clang
Emit the underlying storage offset in addition to the starting bit
position of the field.

This fixes PR28162.

Differential Revision: http://reviews.llvm.org/D21783

llvm-svn: 274201
2016-06-30 03:01:59 +00:00
Simon Pilgrim 6350054017 [X86][SSE2] Updated tests to match llvm\test\CodeGen\X86\sse2-intrinsics-fast-isel-x86_64.ll
llvm-svn: 274126
2016-06-29 14:04:08 +00:00
Igor Breger 2c880cf9b1 [AVX512] Zero extend cmp intrinsic return value.
Differential Revision: http://reviews.llvm.org/D21746

llvm-svn: 274110
2016-06-29 08:14:17 +00:00
Artur Pilipenko 70d4bb566c Update the expected masked load/store intrinsics names in tests
The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.

llvm-svn: 274044
2016-06-28 18:28:45 +00:00
Chris Dewhurst 7cc4cfe4fc [SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.
The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit).

llvm-svn: 274012
2016-06-28 12:55:55 +00:00
Asaf Badouh 57819aa185 [X86] add _mm_loadu_si64
Differential Revision: http://reviews.llvm.org/D21504

llvm-svn: 273812
2016-06-26 13:51:54 +00:00
Craig Topper 50e3dfe9d0 [X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates larger than 16. This was accidentally broken in r272246.
llvm-svn: 273775
2016-06-25 07:31:14 +00:00
Rafael Espindola 0fa668072f Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273735
2016-06-24 21:35:06 +00:00
Peter Collingbourne 8dd14da0dc CodeGen: Update Clang to use the new type metadata.
Differential Revision: http://reviews.llvm.org/D21054

llvm-svn: 273730
2016-06-24 21:21:46 +00:00
Strahinja Petrovic 7ba5bf5dc7 Fix make-check issues
Fixing build issue for test test/CodeGen/struct-union-BE.c.

llvm-svn: 273675
2016-06-24 13:11:15 +00:00
Strahinja Petrovic 515a1eb44c This patch fixes problem with passing structures and unions
smaller than register as argument in variadic functions on
big endian architectures.
Differential Revision: http://reviews.llvm.org/D21611

llvm-svn: 273665
2016-06-24 12:12:41 +00:00
Dehao Chen bd3ed3c55b Invoke simplifycfg and sroa before instcombine.
Summary: InstCombine needs to be performed after simplifycfg and sroa, otherwise it may make bad optimization decisions.

Reviewers: davidxl, wmi, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21568

llvm-svn: 273606
2016-06-23 20:13:10 +00:00
Saleem Abdulrasool 6e9e88b30a CodeGen: support linker options on Windows ARM
We would incorrectly emit the directive sections due to the missing overridden
methods.  We now emit the expected "/DEFAULTLIB" rather than "-l" options for
requested linkage

llvm-svn: 273558
2016-06-23 13:45:33 +00:00
Craig Topper 79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects.
llvm-svn: 273533
2016-06-23 06:36:42 +00:00
Hans Wennborg 44d061a471 Add support for /Ob1 and -finline-hint-functions flags
Add support for /Ob1 (and equivalent -finline-hint-functions), which enable
inlining only for functions marked inline, either explicitly (via inline
keyword, for example), or implicitly (function definition in class body,
for example).

This works by enabling inlining pass, and adding noinline attribute to
every function not marked inline.

Patch by Rudy Pons <rudy.pons@ilod.org>!

Differential Revision: http://reviews.llvm.org/D20647

llvm-svn: 273440
2016-06-22 16:56:16 +00:00
Hans Wennborg 9565cf581e Widen EHScope::ClenupBitFields::FixupDepth to avoid overflowing it (PR23490)
It currently only takes 2048 gotos to overflow the FixupDepth bitfield,
causing silent miscompilation. Apparently some parser generators run into
this (see PR).

I don't know that that data structure is terribly size sensitive anyway,
and since there's no room to widen the bitfield, let's just use a separate
word in EHCatchScope for it.

Differential Revision: http://reviews.llvm.org/D21566

llvm-svn: 273434
2016-06-22 16:21:14 +00:00
Michael Zuckerman 716859aa64 [Clang][bmi][intrinsics] Adding _mm_tzcnt_64 _mm_tzcnt_32 intrinsics to clang.
Differential Revision: http://reviews.llvm.org/D21373

llvm-svn: 273401
2016-06-22 12:32:43 +00:00
Craig Topper 08181f795f [AVX512] Fix _mm_setzero_di to not require avx512vl since its used by the avx512dqintrin.h. Also update the avx512dq test to not enable avx512vl feature so we can ensure correct dependencies.
llvm-svn: 273388
2016-06-22 06:36:21 +00:00
Craig Topper d1691c7026 [AVX512] Replace masked integer cmp and ucmp builtins with native IR.
llvm-svn: 273378
2016-06-22 04:47:58 +00:00
Craig Topper c56f0f8485 [AVX512] Use correct types for mask parameters in avx512vlbw cmp builtin tests.
llvm-svn: 273377
2016-06-22 04:47:55 +00:00
Peter Collingbourne aa463c2a18 Require an x86 target for the thinlto_backend.ll test.
llvm-svn: 273361
2016-06-22 01:40:47 +00:00
Peter Collingbourne 2ff9c25d93 Specify a target triple to fix the test on non-Linux.
llvm-svn: 273356
2016-06-22 01:17:30 +00:00
Peter Collingbourne 91227f2195 CodeGen: Replace test/CodeGen/thinlto_backend.c with a functional test.
This new test tests that functions are capable of being imported, rather than
that the import pass is run. This new test is compatible with the approach
being developed in D20268 which runs the importer on its own rather than in
a pass.

Differential Revision: http://reviews.llvm.org/D21542

llvm-svn: 273347
2016-06-22 00:57:26 +00:00
Pirama Arumuga Nainar a7484c9180 Emit the DWARF tag for the RenderScript language
Summary:
If the RenderScript LangOpt is set, either via '-x renderscript' or the '.rs'
file extension, set the DWARF language tag to be that of RenderScript.

Reviewers: rsmith

Subscribers: cfe-commits, srhines

Differential Revision: http://reviews.llvm.org/D21451

llvm-svn: 273321
2016-06-21 21:35:11 +00:00
Sanjay Patel a4d156980e [x86] AVX FP compare builtins should require AVX target feature (PR28112)
This is a fix for PR28112:
https://llvm.org/bugs/show_bug.cgi?id=28112

The FP comparison intrinsics that take an immediate parameter (rather than specifying
a comparison predicate in the function name) were added with AVX; these are macros in
avxintrin.h. This patch makes clang behavior match gcc (error if a program tries to use 
these without -mavx) and matches the Intel documentation, eg:
VCMPPS: m128 _mm_cmp_ps(m128 a, __m128 b, const int imm)

'V' means this is intended to only work with the AVX form of the instruction.

Differential Revision: http://reviews.llvm.org/D21306

llvm-svn: 273311
2016-06-21 20:22:55 +00:00
Dehao Chen 1997d8684f Invoke PruneEH pass before Sample Profile pass.
Summary: We need to call PruneEH pass before AutoFDO pass so that some EH-related calls can get inlined in Sample Profile pass.

Reviewers: davidxl, dnovillo

Subscribers: junbuml, llvm-commits

Differential Revision: http://reviews.llvm.org/D21197

llvm-svn: 273298
2016-06-21 19:16:41 +00:00
Artem Belevich 4987dc85b4 [aarch64] Update datalayout for aarch64 tests
This brings the tests in sync with the changes in r273280.

llvm-svn: 273289
2016-06-21 17:35:31 +00:00
Craig Topper 879b0978f4 [AVX512] Move the 128-bit and 256-bit lzcnt intrinsics to avx512vlcdintrin.h where they belong.
llvm-svn: 273249
2016-06-21 06:53:58 +00:00
Simon Pilgrim 03a899957f [X86][XOP] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273090
2016-06-18 18:20:14 +00:00
Simon Pilgrim c44a3b9599 [X86][TBM] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273086
2016-06-18 17:09:40 +00:00
David Majnemer 3370c20c7e [CodeGen] Use pointer-sized integers for ptrtoint sources
Given something like:
void *v = (void *)100;

We need to synthesize a ptrtoint operation from 100.  During constant
emission, we choose i64 as the type for our constant because it
guaranteed not to drop any bits from our CharUnits representation of the
value.  However, this is suboptimal for 32-bit targets: LLVM passes like
GlobalOpt will get confused by these sorts of casts resulting in
pessimization.

Instead, make sure the ptrtoint operand has a pointer-sized integer
type.

llvm-svn: 273020
2016-06-17 17:47:24 +00:00
Simon Pilgrim d39d026324 [X86][SSE4A] Use native IR for mask movntsd/movntss intrinsics.
Depends on llvm side commit r273002.

llvm-svn: 273003
2016-06-17 14:28:16 +00:00
Ranjeet Singh ca2b3e7b5c [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Reapplying patch in r272777 which was reverted
because the llvm patch which added support
for generating the mcrr/mcrr2 instructions
from the intrinsic was causing an assertion
failure. This has now been fixed in llvm.

llvm-svn: 272983
2016-06-17 00:59:41 +00:00
George Burgess IV 419996ccb5 [CodeGen] Fix a segfault caused by pass_object_size.
This patch fixes a bug where we'd segfault (in some cases) if we saw a
variadic function with one or more pass_object_size arguments.

Differential Revision: http://reviews.llvm.org/D17462

llvm-svn: 272971
2016-06-16 23:06:04 +00:00
Sanjay Patel dbd68dd09d [x86] generate IR for AVX2 integer min/max builtins
Sibling patch to r272932:
http://reviews.llvm.org/rL272932

llvm-svn: 272933
2016-06-16 18:45:01 +00:00
Marcin Koscielnicki a46fade624 [Builtin] Make __builtin_thread_pointer target-independent.
This is now supported for ARM, AArch64, PowerPC, SystemZ, SPARC, Mips.

Differential Revision: http://reviews.llvm.org/D19589

llvm-svn: 272893
2016-06-16 13:41:54 +00:00
Sanjay Patel 280cfd1a69 [x86] translate SSE packed FP comparison builtins to IR
As noted in the code comment, a potential follow-on would be to remove
the builtins themselves. Other than ord/unord, this already works as 
expected. Eg:

  typedef float v4sf __attribute__((__vector_size__(16)));
  v4sf fcmpgt(v4sf a, v4sf b) { return a > b; }

Differential Revision: http://reviews.llvm.org/D21268

llvm-svn: 272840
2016-06-15 21:20:04 +00:00
Sanjay Patel 7495ec026e [x86] generate IR for SSE integer min/max builtins
Sibling patch to r272806:
http://reviews.llvm.org/rL272806

llvm-svn: 272807
2016-06-15 17:18:50 +00:00
Ranjeet Singh d48760da64 Reverting r272777 because one of the tests
added in the llvm patch is causing an assertion
to fail.

llvm-svn: 272790
2016-06-15 14:21:28 +00:00
Craig Topper a54c21e742 [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics.
llvm-svn: 272787
2016-06-15 14:06:34 +00:00
Ranjeet Singh 8d5ad5bdf2 [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Patch adds intrinsics for mrrc/mrrc2. The
intrinsics for mrrc/mrrc2 return a single
uint64_t to represent two 32 bit values.

The mcrr/mcrr2 intrinsic was changed to
accept a single uint64_t instead of two
32 bit values as the input for consistency.

Differential Revision: http://reviews.llvm.org/D21179

llvm-svn: 272777
2016-06-15 11:32:18 +00:00
Peter Collingbourne bcf909d737 Update clang for D20348
Differential Revision: http://reviews.llvm.org/D20339

llvm-svn: 272710
2016-06-14 21:02:05 +00:00
Hans Wennborg f8b91f8336 s/Intrin.h/intrin.h/, trying to fix the build after r272701
llvm-svn: 272702
2016-06-14 20:14:24 +00:00
Michael Zuckerman c49f6ce3e1 [Clang][avx512][Intrinsics] adding prefetch gather intrinsics
Differential Revision: http://reviews.llvm.org/D21322

llvm-svn: 272667
2016-06-14 13:45:17 +00:00
Michael Zuckerman 223676d2cc [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
Differential Revision: http://reviews.llvm.org/D20626

llvm-svn: 272658
2016-06-14 12:38:58 +00:00