Commit Graph

4255 Commits

Author SHA1 Message Date
Renato Golin fa007aeef4 Revert "set the underlying value of “#pragma STDC FP_CONTRACT” on by default"
This reverts commit r282259, as it broke the AArch64 test-suite bots.

llvm-svn: 282289
2016-09-23 20:32:52 +00:00
Sebastian Pop 6919ae5abc set the underlying value of “#pragma STDC FP_CONTRACT” on by default
Clang has the default FP contraction setting of “-ffp-contract=on”, which
doesn't really mean “on” in the conventional sense of the word, but rather
really means “according to the per-statement effective value of the relevant
pragma”.

Before this patch, Clang has that pragma defaulting to “off”. Since the
“-ffp-contract=on” mode is really an AND of two booleans and the second of them
defaults to “off”, the whole thing effectively defaults to “off”. This patch
changes the default value of the pragma to “on”, thus making the default pair of
booleans (on, on) rather than (on, off). This makes FP optimization slightly
more aggressive than before when not using either “-Ofast”, “-ffast-math”, or
“-ffp-contract=fast”. Even with this patch the compiler still respects
“-ffp-contract=off”.

As per a suggestion by Steve Canon, the added code does _not_ require “-O3” or
higher. This is so as to try our best to preserve identical floating-point
results for unchanged source code compiling for an unchanged target when only
changing from any optimization level in the set (“-O0”, “-O1”, “-O2”, “-O3”) to
any other optimization level in that set. “-Os” and “-Oz” seem to be behaving
identically, i.e. should probably be considered a part of the aforementioned
set, but I have not reviewed this rigorously. “-Ofast” is explicitly _not_ a
member of that set.

Patch authored by Abe Skolnik [a.skolnik@samsung.com] and Stephen Canon [scanon@apple.com].

Differential Revision: https://reviews.llvm.org/D24481

llvm-svn: 282259
2016-09-23 16:16:25 +00:00
Craig Topper 5fbabd77c7 [X86] Fix some illegal rounding modes in some builtin test cases to ones that would properly compile to valid assembly.
llvm-svn: 282137
2016-09-22 06:13:33 +00:00
Simon Dardis 3d9c763816 [mips] MSA intrinsics header file
This patch adds the msa.h header file containing the shorter names for the
MSA instrinsics, e.g. msa_sll_b for builtin_msa_sll_b.

Reviewers: vkalintiris, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D24674

llvm-svn: 281975
2016-09-20 15:07:36 +00:00
Dehao Chen dd6f8cab08 Remove InstructionCombining and its related pass from sample pgo passes as we can handle "invoke" correctly.
Summary: We previously relies on InstructionCombining pass to remove invoke instructions. Now that we can inline invoke instructions correctly, we do not need these passes any more.

Reviewers: dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24730

llvm-svn: 281910
2016-09-19 16:02:52 +00:00
Dean Michael Berris eeee3b17f3 [XRay] ARM 32-bit no-Thumb support in Clang
Just a test for now, adapted from x86_64 tests of XRay.
This is one of 3 commits to different repositories of XRay ARM port. The other 2 are:

https://reviews.llvm.org/D23931 (LLVM)
https://reviews.llvm.org/D23933 (compiler-rt)

Differential Revision: https://reviews.llvm.org/D23932

llvm-svn: 281879
2016-09-19 00:59:19 +00:00
Peter Collingbourne 96dd3635bf Add REQUIRES line.
llvm-svn: 281796
2016-09-16 22:56:12 +00:00
Peter Collingbourne 0a3ede0a14 Add target triples to fix test on non-x86.
llvm-svn: 281790
2016-09-16 22:26:45 +00:00
Peter Collingbourne e1b7d2520d CodeGen: Add more checks to nobuiltin.c test, add a negative test.
llvm-svn: 281785
2016-09-16 22:05:53 +00:00
Akira Hatanaka 819867191f [Sema] Allow shifting a scalar operand by a vector operand.
r278501 inadvertently introduced a bug in which it disallowed shifting
scalar operands by vector operands when not compiling for OpenCL. This
commit fixes it.

Patch by Vladimir Yakovlev.

Differential Revision: https://reviews.llvm.org/D24467

llvm-svn: 281669
2016-09-15 22:19:25 +00:00
Wei Mi 6582669aa9 Update clang unittests for rL281586.
The change in rL281586 is in llvm component and tests updated here are
in clang component, so I have to commit them consecutively.

llvm-svn: 281587
2016-09-15 06:31:30 +00:00
Albert Gutowski 727ab8a803 Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: alexshap, cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281540
2016-09-14 21:19:43 +00:00
Dehao Chen 5d4f0be5b8 Convert finite to builtin
Summary: This patch converts finite/__finite to builtin functions so that it will be inlined by compiler.

Reviewers: hfinkel, davidxl, efriedma

Subscribers: efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D24483

llvm-svn: 281509
2016-09-14 17:34:14 +00:00
Albert Gutowski fc19fa3721 Temporary fix for MS _Interlocked intrinsics
llvm-svn: 281401
2016-09-13 21:51:37 +00:00
Albert Gutowski 9918cb6573 Reverse commit 281375 (breaks building Chromium)
llvm-svn: 281399
2016-09-13 21:24:51 +00:00
Albert Gutowski ce7a9a47b2 Add bunch of _Interlocked builtins
Reviewers: compnerd, thakis, Prazek, majnemer, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24153

llvm-svn: 281378
2016-09-13 19:43:33 +00:00
Albert Gutowski ae3fb3113f Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281375
2016-09-13 19:26:42 +00:00
Peter Collingbourne eeb56abe64 Update Clang for D20147 ("DebugInfo: New metadata representation for global variables.")
Differential Revision: http://reviews.llvm.org/D20415

llvm-svn: 281285
2016-09-13 01:13:19 +00:00
George Burgess IV f8f6324983 [Sema] Fix PR30346: relax __builtin_object_size checks.
This patch makes us act more conservatively when trying to determine
the objectsize for an array at the end of an object. This is in
response to code like the following:

```
struct sockaddr {
  /* snip */
  char sa_data[14];
};

void foo(const char *s) {
  size_t slen = strlen(s) + 1;
  size_t added_len = slen <= 14 ? 0 : slen - 14;
  struct sockaddr *sa = malloc(sizeof(struct sockaddr) + added_len);
  strcpy(sa->sa_data, s);
  // ...
}
```

`__builtin_object_size(sa->sa_data, 1)` would return 14, when there
could be more than 14 bytes at `sa->sa_data`.

Code like this is apparently not uncommon. FreeBSD's manual even
explicitly mentions this pattern:
https://www.freebsd.org/doc/en/books/developers-handbook/sockets-essential-functions.html
(section 7.5.1.1.2).

In light of this, we now just give up on any array at the end of an
object if we can't find the object's initial allocation.

I lack numbers for how much more conservative we actually become as a
result of this change, so I chose the fix that would make us as
compatible with GCC as possible. If we want to be more aggressive, I'm
happy to consider some kind of whitelist or something instead.

llvm-svn: 281277
2016-09-12 23:50:35 +00:00
Adrian Prantl 432d3d2619 Debug info: Bump the default DWARF version on Darwin to 4.
This is a spiritual re-commit of r201375 with only a brief delay
for upgrading the green dragon builders.

llvm-svn: 281094
2016-09-09 21:10:35 +00:00
Albert Gutowski b6a11acb53 Implement MS _rot intrinsics
Reviewers: thakis, Prazek, compnerd, rnk

Subscribers: majnemer, cfe-commits

Differential Revision: https://reviews.llvm.org/D24311

llvm-svn: 280997
2016-09-08 22:32:19 +00:00
Renato Golin 0f1fcd6fc6 Revert "[XRay] ARM 32-bit no-Thumb support in Clang"
This reverts commit r280889, as the original LLVM commits broke the thumb
buildbots.

llvm-svn: 280968
2016-09-08 17:12:32 +00:00
Dean Michael Berris 6f2622e253 [XRay] ARM 32-bit no-Thumb support in Clang
Just a test for now, adapted from x86_64 tests of XRay.
This is one of 3 commits to different repositories of XRay ARM port. The
other 2 are:

1. https://reviews.llvm.org/D23931 (LLVM)
2. https://reviews.llvm.org/D23933 (compiler-rt)

Differential Review: https://reviews.llvm.org/D23932

llvm-svn: 280889
2016-09-08 00:23:28 +00:00
George Burgess IV 2da19a5a08 Move CHECK right before the function it describes.
llvm-svn: 280852
2016-09-07 20:15:03 +00:00
George Burgess IV fbad5b2f1b [Sema] Compare bad conversions in overload resolution.
r280553 introduced an issue where we'd emit ambiguity errors for code
like:

```
void foo(int *, int);
void foo(unsigned int *, unsigned int);

void callFoo() {
  unsigned int i;
  foo(&i, 0); // ambiguous: int->unsigned int is worse than int->int,
              // but unsigned int*->unsigned int* is better than
              // int*->int*.
}
```

This patch fixes this issue by changing how we handle ill-formed (but
valid) implicit conversions. Candidates with said conversions now always
rank worse than candidates without them, and two candidates are
considered to be equally bad if they both have these conversions for
the same argument.

Additionally, this fixes a case in C++11 where we'd complain about an
ambiguity in a case like:

```
void f(char *, int);
void f(const char *, unsigned);
void g() { f("abc", 0); }
```

...Since conversion to char* from a string literal is considered
ill-formed in C++11 (and deprecated in C++03), but we accept it as an
extension.

llvm-svn: 280847
2016-09-07 20:03:19 +00:00
Craig Topper 2dfab63bb3 [AVX-512] Remove 128-bit and 256-bit masked floating point add/sub/mul/div builtins and replace with native operations.
We can't do the 512-bit ones because they take a rounding mode argument that we can't represent.

llvm-svn: 280635
2016-09-04 18:30:17 +00:00
Craig Topper f43e4a1728 [AVX-512] Remove masked integer mullo builtins and replace with native IR.
llvm-svn: 280597
2016-09-03 19:19:49 +00:00
Craig Topper 0e18976b8d [AVX-512] Remove masked integer add/sub builtins and replace with native IR.
llvm-svn: 280596
2016-09-03 18:29:35 +00:00
Yunzhong Gao f4903a3675 (clang part) Implement MASM-flavor intel syntax behavior for inline MS asm block.
Clang tests for verifying the following syntaxes:
1. 0xNN and NNh are accepted as valid hexadecimal numbers, but 0xNNh is not.     
   0xNN and NNh may come with optional U or L suffix.                            
2. NNb is accepted as a valid binary (base-2) number, but 0bNN is not.           
   NNb may come with optional U or L suffix.                                     
                                                                                 
Differential Revision: https://reviews.llvm.org/D22112

llvm-svn: 280556
2016-09-02 23:16:06 +00:00
George Burgess IV 2099b54102 [Sema] Relax overloading restrictions in C.
This patch allows us to perform incompatible pointer conversions when
resolving overloads in C. So, the following code will no longer fail to
compile (though it will still emit warnings, assuming the user hasn't
opted out of them):

```
void foo(char *) __attribute__((overloadable));
void foo(int) __attribute__((overloadable));

void callFoo() {
  unsigned char bar[128];
  foo(bar); // selects the char* overload.
}
```

These conversions are ranked below all others, so:

  A. Any other viable conversion will win out
  B. If we had another incompatible pointer conversion in the example
     above (e.g. `void foo(int *)`), we would complain about
     an ambiguity.

Differential Revision: https://reviews.llvm.org/D24113

llvm-svn: 280553
2016-09-02 22:59:57 +00:00
Honggyu Kim 2b0e424b2f [Frontend] Fix mcount inlining bug
Since some profiling tools, such as gprof, ftrace, and uftrace, use
-pg option to generate a mcount function call at the entry of each
function. Function invocation can be detected by this hook function.

But mcount insertion is done before function inlining phase in clang,
sometime a function that already has a mcount call can be inlined in the
middle of another function.

This patch adds an attribute "counting-function" to each function
rather than emitting the mcount call directly in frontend so that this
attribute can be processed in backend. Then the mcount calls can be
properly inserted in backend after all the other optimizations are
completed.

Link: https://llvm.org/bugs/show_bug.cgi?id=28660

Reviewers: hans, rjmccall, hfinkel, rengolin, compnerd

Subscribers: shenhan, cfe-commits

Differential Revision: https://reviews.llvm.org/D22666

llvm-svn: 280355
2016-09-01 11:29:21 +00:00
Nick Lewycky 97e49ac59e Add -fprofile-dir= to clang.
-fprofile-dir=path allows the user to specify where .gcda files should be
emitted when the program is run. In particular, this is the first flag that
causes the .gcno and .o files to have different paths, LLVM is extended to
support this. -fprofile-dir= does not change the file name in the .gcno (and
thus where lcov looks for the source) but it does change the name in the .gcda
(and thus where the runtime library writes the .gcda file). It's different from
a GCOV_PREFIX because a user can observe that the GCOV_PREFIX_STRIP will strip
paths off of -fprofile-dir= but not off of a supplied GCOV_PREFIX.

To implement this we split -coverage-file into -coverage-data-file and
-coverage-notes-file to specify the two different names. The !llvm.gcov
metadata node grows from a 2-element form {string coverage-file, node dbg.cu}
to 3-elements, {string coverage-notes-file, string coverage-data-file, node
dbg.cu}. In the 3-element form, the file name is already "mangled" with
.gcno/.gcda suffixes, while the 2-element form left that to the middle end
pass.

llvm-svn: 280306
2016-08-31 23:04:32 +00:00
Craig Topper a815f488d5 [AVX-512] Implement masked floating point logical operations with native IR and remove the builtins.
llvm-svn: 280197
2016-08-31 05:38:58 +00:00
Craig Topper d0681d528d [X86] Use v2i64 vectors to implement _mm_and/andn/or/xor_pd.
These will be reused when removing some builtins from avx512vldqintrin.h and this will make the tests for that change show a better number of vector elements.

llvm-svn: 280196
2016-08-31 05:38:55 +00:00
Sjoerd Meijer 0a8d4216ad This adds new options -fdenormal-fp-math and passes through option -ffast-math
to CC1, which are translated to function attributes and can e.g. be mapped on
build attributes FP_exceptions and FP_denormal. Setting these build attributes
allows better selection of floating point libraries.

Differential Revision: https://reviews.llvm.org/D23840

llvm-svn: 280064
2016-08-30 08:09:45 +00:00
Hal Finkel 84832a7a79 [PowerPC] Update the DWARF register-size table
The PPC64 DWARF register-size table did not match the ABI specification (or
GCC, for that matter). Fix that, and add a regression test.

Fixes PR27931.

llvm-svn: 280053
2016-08-30 02:38:34 +00:00
Reid Kleckner b04449d97a [MS] Win64 va_arg should expect large arguments to be passed indirectly
Fixes PR20569

llvm-svn: 279774
2016-08-25 20:42:26 +00:00
David Blaikie a45c31a5b4 DebugInfo: Add flag to CU to disable emission of inline debug info into the skeleton CU
In cases where .dwo/.dwp files are guaranteed to be available, skipping
the extra online (in the .o file) inline info can save a substantial
amount of space - see the original r221306 for more details there.

llvm-svn: 279651
2016-08-24 18:29:58 +00:00
Reid Kleckner 66e7717b46 Revert "[X86] Add xgetbv/x[X86] Add xgetbv xsetbv intrinsics to non-windows platforms"
This reverts commit r278783.  It breaks usage of _xgetbv on Windows.

llvm-svn: 278814
2016-08-16 16:04:14 +00:00
James Molloy 5980232178 Left shifts of negative values are defined if -fwrapv is set
This means we shouldn't emit ubsan detection code or warn.
Fixes PR25552.

llvm-svn: 278786
2016-08-16 09:45:36 +00:00
Marina Yatsina 197b65f833 [X86] Add xgetbv/x[X86] Add xgetbv xsetbv intrinsics to non-windows platforms
commit on behalf of guyblank

Differential Revision: https://reviews.llvm.org/D21959

llvm-svn: 278783
2016-08-16 08:13:36 +00:00
David Majnemer b439dfe6ba [CodeGen] Ignore unnamed bitfields before handling vector fields
We processed unnamed bitfields after our logic for non-vector field
elements in records larger than 128 bits.  The vector logic would
determine that the bit-field disqualifies the record from occupying a
register despite the unnamed bit-field not participating in the record
size nor its alignment.

N.B. This behavior matches GCC and ICC.

llvm-svn: 278656
2016-08-15 07:20:40 +00:00
David Majnemer b229cb0a43 [CodeGen] Correctly implement the AVX512 psABI rules
An __m512 vector type wrapped in a structure should be passed in a
vector register.

Our prior implementation was based on a draft version of the psABI.

This fixes PR28975.

N.B. The update to the ABI was made here:
https://github.com/hjl-tools/x86-psABI/commit/30f9c9

llvm-svn: 278655
2016-08-15 06:39:18 +00:00
Lama Saba 5d01f224cf [X86][AVX512] lower __mm512_andnot_ps/__mm512_andnot_pd to IR
Differential revision: https://reviews.llvm.org/D23262
 

llvm-svn: 278209
2016-08-10 10:34:45 +00:00
Simon Pilgrim ebaabc7b99 [X86][AVX] Ensure we only match against 1-byte alignment
llvm-svn: 278208
2016-08-10 09:59:49 +00:00
Chandler Carruth 4c5e8ccf74 [x86] Fix a really nasty bug introduced in r276417 where alignment
constraints were added to _mm256_broadcast_{pd,ps} intel intrinsics.

The spec for these intrinics is ... pretty much silent on alignment.
This is especially frustrating considering the amount of discussion of
alignment in the load and store instrinsics. So I was forced to rely on
the specification for the VBROADCASTF128 instruction.

That instruction's spec is *also* completely silent on alignment.
Fortunately, when it comes to the instruction's spec, silence is enough.
There is no #GP fault option for an underaligned address so this
instruction, and by inference the intrinsic, can read any alignment.

As it happens, the old code worked exactly this way and in fact we have
plenty of code that hands pointers with less than 16-byte alignment to
these intrinsics. This code broke pretty spectacularly with this commit.

Fortunately, the fix is super simple! Change a 16 to a 1, and ta da!

Anyways, a lot of debugging for a really boring fix. =]

llvm-svn: 278202
2016-08-10 07:32:47 +00:00
Charles Davis 0e37911334 Revert "[Attr] Add support for the `ms_hook_prologue` attribute."
This reverts commit r278050. It depends on r278048, which will be
reverted.

llvm-svn: 278052
2016-08-08 21:19:08 +00:00
Charles Davis 3e43970d71 [Attr] Add support for the `ms_hook_prologue` attribute.
Summary:
Based on a patch by Michael Mueller.

This attribute specifies that a function can be hooked or patched. This
mechanism was originally devised by Microsoft for hotpatching their
binaries (which they're constantly updating to stay ahead of crackers,
script kiddies, and other ne'er-do-wells on the Internet), but it's now
commonly abused by Windows programs that want to hook API functions. It
is for this reason that this attribute was added to GCC--hence the name,
`ms_hook_prologue`.

Depends on D19908.

Reviewers: rnk, aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D19909

llvm-svn: 278050
2016-08-08 21:03:39 +00:00
Asaf Badouh 2f344b788c [AVX512] integer comparisions enumeration.
fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842

Differential Revision: https://reviews.llvm.org/D22212

 

llvm-svn: 277955
2016-08-07 10:43:04 +00:00
Eric Christopher abb2b54ad3 After PR28761 use -Wall with -Werror in builtins tests to identify
possible problems in headers.

llvm-svn: 277696
2016-08-04 06:02:50 +00:00
Saleem Abdulrasool 4a7130a8fb CodeGen: simplify the CC handling for TLS wrappers
Use the calling convention of the wrapper directly to set the calling convention
to ensure that the calling convention matches.  Incorrectly setting the calling
convention results in the code path being entirely nullified as InstCombine +
SimplifyCFG will prune the mismatched CC calls.

llvm-svn: 277390
2016-08-01 21:31:24 +00:00
Evandro Menezes ec133b3d20 [AArch64] Add support for Samsung Exynos M2 (NFC).
llvm-svn: 277365
2016-08-01 18:39:55 +00:00
Saleem Abdulrasool 369f4d64a2 CodeGen: try harder to make the CFString structure RW
The previous change was insufficient to mark the content as read-write as the
structure itself was marked constant.  Adjust this and add tests to ensure that
the section is marked appropriately as being read-write.

llvm-svn: 277200
2016-07-29 19:15:51 +00:00
Nirav Dave 2e46f720fa Replace preserve-as-comments CodeGen test with driver test
llvm-svn: 276947
2016-07-28 00:36:34 +00:00
Nirav Dave 574a886e75 Add target triple in test
llvm-svn: 276915
2016-07-27 20:48:39 +00:00
Nirav Dave 993a139847 Add flags to toggle preservation of assembly comments
Summary: Add -fpreserve-as-comments and -fno-preserve-as-comments.

Reviewers: echristo, rnk

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D22883

llvm-svn: 276907
2016-07-27 19:57:40 +00:00
Pirama Arumuga Nainar bb846a32e4 Adjust coercion of aggregates on RenderScript
Summary:
In RenderScript, the size of the argument or return value emitted in the
IR is expected to be the same as the size of corresponding qualified
type.  For ARM and AArch64, the coercion performed by Clang can
change the parameter or return value to a type whose size is different
(usually larger) than the original aggregate type.  Specifically, this
can happen in the following cases:
    - Aggregate parameters of size <= 64 bytes and return values smaller
      than 4 bytes on ARM
    - Aggregate parameters and return values smaller than bytes on
      AArch64

This patch coerces the cases above to an integer array that is the same
size and alignment as the original aggregate.  A new field is added to
TargetInfo to detect a RenderScript target and limit this coercion just
to that case.

Tests added to test/CodeGen/renderscript.c

Reviewers: rsmith

Subscribers: aemerson, srhines, llvm-commits

Differential Revision: https://reviews.llvm.org/D22822

llvm-svn: 276904
2016-07-27 19:01:51 +00:00
David Majnemer 3f5a4354db Update for LLVM changes
InstSimplify has gained the ability to remove needless bitcasts which
perturbed some clang codegen tests.

llvm-svn: 276756
2016-07-26 15:21:18 +00:00
David Majnemer 12b9e76b62 Update for LLVM changes
InstSimplify has gained the ability to remove needless bitcasts which
perturbed some clang codegen tests.

llvm-svn: 276728
2016-07-26 05:52:37 +00:00
Pirama Arumuga Nainar 98eaa62e36 Add .rgba syntax extension to ext_vector_type types
Summary:
This patch enables .rgba accessors to ext_vector_type types and adds
tests for syntax validation and code generation.

'a' and 'b' can appear either in the point access mode or the numeric
access mode (for indices 10 and 11).  To disambiguate between the two
usages, the accessor type is explicitly passed to relevant methods.

Reviewers: rsmith

Subscribers: Anastasia, bader, srhines, cfe-commits

Differential Revision: http://reviews.llvm.org/D20602

llvm-svn: 276455
2016-07-22 18:49:43 +00:00
Simon Pilgrim 2d8517303c [X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128 with generic IR
As discussed on D22460, I've updated the vbroadcastf128 pd256/ps256 builtins to map directly to generic IR - load+splat a 128-bit vector to both lanes of a 256-bit vector.

Fix for PR28657.

llvm-svn: 276417
2016-07-22 13:58:56 +00:00
Wolfgang Pieb 24e03341af Reverting r275115 which caused PR28634.
When empty (forwarding) basic blocks that are referenced by user labels
are removed, incorrect code may be generated.

llvm-svn: 276361
2016-07-21 23:28:18 +00:00
Craig Topper fe22d59a84 [Sema,X86] Add explicit check to ensure that builtins that require x86-64 target throw an error if used on 32-bit target.
If these builtins are allowed to go through on a 32-bit target they will fire assertions in the backend.

Fixes PR28635.

llvm-svn: 276250
2016-07-21 07:38:43 +00:00
Craig Topper 45db56c375 [X86] Add missing __x86_64__ qualifiers on a bunch of intrinsics that assume 64-bit GPRs are available.
Usages of these intrinsics in a 32-bit build results in assertions in the backend.

llvm-svn: 276249
2016-07-21 07:38:39 +00:00
Simon Pilgrim e3b9ee0645 [X86][SSE] Reimplement SSE fp2si conversion intrinsics instead of using generic IR
D20859 and D20860 attempted to replace the SSE (V)CVTTPS2DQ and VCVTTPD2DQ truncating conversions with generic IR instead.

It turns out that the behaviour of these intrinsics is different enough from generic IR that this will cause problems, INF/NAN/out of range values are guaranteed to result in a 0x80000000 value - which plays havoc with constant folding which converts them to either zero or UNDEF. This is also an issue with the scalar implementations (which were already generic IR and what I was trying to match).

This patch changes both scalar and packed versions back to using x86-specific builtins.

It also deals with the other scalar conversion cases that are runtime rounding mode dependent and can have similar issues with constant folding.

Differential Revision: https://reviews.llvm.org/D22105

llvm-svn: 276102
2016-07-20 10:18:01 +00:00
David Majnemer 24547108d6 Let FuncAttrs infer the 'returned' argument attribute
This reverts commit r275756.

llvm-svn: 276014
2016-07-19 19:59:24 +00:00
Daniel Sanders 6a73883c48 [mips] Correct label prefixes for N32 and N64.
Summary:
N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own
($).

This fixes the majority of object differences between -fintegrated-as and
-fno-integrated-as.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22412

llvm-svn: 275967
2016-07-19 10:49:03 +00:00
NAKAMURA Takumi 966bde50c3 Revert r275678, "Revert "Revert r275027 - Let FuncAttrs infer the 'returned' argument attribute""
This reverts also r275029, "Update Clang tests after adding inference for the returned argument attribute"

It broke LTO build. Seems miscompilation.

llvm-svn: 275756
2016-07-18 03:23:25 +00:00
Hal Finkel 81cdef31e6 Revert "Revert r275029 - Update Clang tests after adding inference for the returned argument attribute"
This reverts commit r275043 after reapplying the underlying LLVM commit.

llvm-svn: 275679
2016-07-16 07:22:09 +00:00
Aaron Ballman 7d2aecbc76 Add XRay flags to Clang. We implement two flags to control the XRay behaviour:
-fxray-instrument: enables XRay annotation of IR
-fxray-instruction-threshold: configures the threshold for function size (looking at IR instructions), and allow LLVM to decide whether to add the nop sleds later on in the process.

Also implements the related xray_always_instrument and xray_never_instrument function attributes.

Patch by Dean Michael Berris.

llvm-svn: 275330
2016-07-13 22:32:15 +00:00
Wolfgang Pieb 002df71dd3 Correcting the previous fix for test submitted with r275115.
llvm-svn: 275128
2016-07-11 23:27:19 +00:00
Wolfgang Pieb c72930dba5 Fix test submitted with r275115 (failed on ppc64 buildbots).
llvm-svn: 275127
2016-07-11 23:20:28 +00:00
Wolfgang Pieb 5675c96987 Prevent the creation of empty (forwarding) blocks resulting from nested ifs.
Summary:
Nested if statements can generate empty BBs whose terminator branches 
unconditionally to its successor. These branches are not eliminated
to help generate better line number information in some cases, but there
is no reason to keep the empty blocks that result from nested ifs.

Reviewers: mehdi_amini, dblaikie, echristo

Subscribers: mehdi_amini, cfe-commits

Differential review: http://reviews.llvm.org/D11360
 

llvm-svn: 275115
2016-07-11 22:22:23 +00:00
Craig Topper 4d61a3c2d8 [AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove the builtins.
llvm-svn: 275049
2016-07-11 06:14:18 +00:00
Hal Finkel 9a17d7ac6e Revert r275029 - Update Clang tests after adding inference for the returned argument attribute
The associated backend change is causing miscompiles from the AArch64 backend.

llvm-svn: 275043
2016-07-11 04:52:07 +00:00
Hal Finkel 617c962752 Update Clang tests after adding inference for the returned argument attribute
Adjusting tests after r275027.

llvm-svn: 275029
2016-07-10 22:26:52 +00:00
Craig Topper 6e76fb61a7 [X86] Use __butilin_shufflevector for 512-bit shufps intrinsics.
llvm-svn: 275012
2016-07-10 05:57:21 +00:00
Craig Topper 95b61b0544 [X86] Use __builtin_ia32_vec_ext_v4hi and __builtin_ia32_vec_set_v4hi to implement pextrw/pinsertw MMX intrinsics instead of trying to use native IR.
Without this we end up generating code that doesn't use mmx registers and probably doesn't work well with other mmx intrinsics.

llvm-svn: 274968
2016-07-09 05:30:41 +00:00
Craig Topper 83c65d7889 [X86] Uncomment the _mm_extract_ps test and add checks.
llvm-svn: 274965
2016-07-09 04:38:17 +00:00
Saleem Abdulrasool 0295f8ce39 CodeGen: tweak CFString section for COFF, ELF
Place the structure data into `cfstring`.  This both isolates the structures to
permit coalescing in the future (by the linker) as well as ensures that it
doesnt get marked as read-only data.  The structures themselves are not
read-only, only the string contents.

llvm-svn: 274956
2016-07-09 01:59:51 +00:00
Craig Topper a1bee4398c [X86] Remove dead builtins that don't exist in the backend intrinsic file and don't have custom handling in CGBuiltins.cpp either.
llvm-svn: 274825
2016-07-08 05:11:47 +00:00
Chad Rosier 4c077aaabb [AArch64] Change the preferred alignment for char and short.
This reinstates commits r273280 and r273289.

Original Review: http://reviews.llvm.org/D21414.

llvm-svn: 274791
2016-07-07 20:02:25 +00:00
Justin Lebar 495f1a22af [CUDA] Rename the __nvvm_bar0 builtin back to __syncthreads.
The builtin was renamed in r274770.  But __syncthreads is part of our
user-facing API, so we need to keep the name as-is.

Patch by Justin Bogner.

llvm-svn: 274780
2016-07-07 18:15:03 +00:00
Justin Bogner 2d5de7e568 NVPTX: Use the nvvm builtins to read SRegs rather than the legacy ptx ones
The ptx spellings were removed from LLVM in r274769.

llvm-svn: 274770
2016-07-07 16:41:08 +00:00
Chad Rosier 5ba1d11b5c Revert "[aarch64] Update datalayout for aarch64 tests"
This reverts commit r273289, which was a follow to r273280, which was
reverted because the change was not properly approved.

llvm-svn: 274767
2016-07-07 16:37:21 +00:00
Roger Ferrer Ibanez c487614bc0 Add negative test for TBAA
Revision r178818 added tests for TBAA but was missing negative tests to ensure
that TBAA markers are not emitted when TBAA is off.

Differential Revision: http://reviews.llvm.org/D21295

llvm-svn: 274610
2016-07-06 07:13:49 +00:00
Craig Topper 425d02d33e [X86] Use native IR for immediate values 0-7 of packed fp cmp builtins. This makes them the same as what is done when using the SSE builtins for these same encodings.
llvm-svn: 274608
2016-07-06 06:27:31 +00:00
Craig Topper 46e7555d4b [AVX512] Use the generic ctlz intrinsic to implement the vplzcntd/q builtins.
llvm-svn: 274603
2016-07-06 04:24:29 +00:00
Michael Zuckerman b920665493 [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clang
Differential Revision: http://reviews.llvm.org/D21792

llvm-svn: 274559
2016-07-05 15:56:03 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
llvm-svn: 274544
2016-07-05 12:59:33 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
2016-07-05 12:24:14 +00:00
Michael Zuckerman 7dac6fbdf8 [Clang][BuiltIn][AVX512] adding _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics
Differential Revision: http://reviews.llvm.org/D21729

llvm-svn: 274532
2016-07-05 08:08:01 +00:00
Craig Topper 2a383c9273 [X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
llvm-svn: 274525
2016-07-04 22:18:01 +00:00
Simon Pilgrim 427154db2a [X86][AVX512] Converted the VSHUFPD intrinsics to generic IR
llvm-svn: 274523
2016-07-04 21:30:47 +00:00
Simon Pilgrim 30db811526 [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR
llvm-svn: 274502
2016-07-04 13:34:44 +00:00
Simon Pilgrim 17388f2569 [X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IR
llvm-svn: 274492
2016-07-04 11:06:15 +00:00
Craig Topper ac1823f6e9 [AVX512] Modify what indices we emit for the zero vector we use for zero extension of the result of a v2i1 or v4i1 masked compare. This way we emit something that the backend easily interprets as a concatenation rather than a true shuffle. This delivers slightly better codegen with the current backend capabilities.
llvm-svn: 274484
2016-07-04 07:09:46 +00:00
Simon Pilgrim 275d721485 [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
llvm companion patch imminent

llvm-svn: 274442
2016-07-02 17:16:25 +00:00
Craig Topper b3a4477b13 [X86] Replace 128-bit and 256 masked vpermilps/vpermilpd builtins with native IR.
llvm-svn: 274425
2016-07-02 05:36:43 +00:00
Pirama Arumuga Nainar 54a213d280 Add TargetInfo for 32-bit and 64-bit RenderScript
Summary:
The TargetInfo for 'renderscript32' and 'renderscript64' ArchTypes are
subclasses of ARMleTargetInfo and AArch64leTargetInfo respectively.

RenderScript32TargetInfo modifies the ARM ABI to set LongWidth and
LongAlign to be 64-bits.  Other than this modification, the underlying
TargetInfo base classes is initialized as if they have "armv7" and
"aarch64" architecture type respectively.

Reviewers: rsmith, echristo

Subscribers: aemerson, tberghammer, cfe-commits, danalbert, mehdi_amini, srhines

Differential Revision: http://reviews.llvm.org/D21334

llvm-svn: 274409
2016-07-02 00:05:42 +00:00
Tim Shen 53547d95ca Removes CHECKs for symbolic label names (as Debug Clang will generate).
Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274396
2016-07-01 22:50:00 +00:00
Tim Shen ff12edbff4 Remove unncessary CHECKs from r274385
llvm-svn: 274387
2016-07-01 21:16:58 +00:00
Tim Shen 421119fd89 [Temporary, Lifetime] Add lifetime marks for temporaries
With all MaterializeTemporaryExprs coming with a ExprWithCleanups, it's
easy to add correct lifetime.end marks into the right RunCleanupsScope.

Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274385
2016-07-01 21:08:47 +00:00
Matt Arsenault f652caea65 Emit more intrinsics for builtin functions
This is important for building libclc. Since r273039 tests are failing
due to now emitting calls to these functions instead of emitting the
DAG node. The libm function names are implemented for OpenCL, and should
call the locally defined versions, so -fno-builtin is used. The IR
Some functions use the __builtins and expect the intrinsics to be
emitted. Without this we end up with nobuiltin calls to intrinsics
or to unsupported library calls.

llvm-svn: 274370
2016-07-01 17:38:14 +00:00
Michael Zuckerman 3f316abdce [Clang][Intrinsics][AVX512][BuiltIn] adding intrinsics for vrangesd instruction set
Differential Revision: http://reviews.llvm.org/D21734

llvm-svn: 274218
2016-06-30 08:05:46 +00:00
David Majnemer b4b671e4a8 [CodeView] Implement support for bitfields in Clang
Emit the underlying storage offset in addition to the starting bit
position of the field.

This fixes PR28162.

Differential Revision: http://reviews.llvm.org/D21783

llvm-svn: 274201
2016-06-30 03:01:59 +00:00
Simon Pilgrim 6350054017 [X86][SSE2] Updated tests to match llvm\test\CodeGen\X86\sse2-intrinsics-fast-isel-x86_64.ll
llvm-svn: 274126
2016-06-29 14:04:08 +00:00
Igor Breger 2c880cf9b1 [AVX512] Zero extend cmp intrinsic return value.
Differential Revision: http://reviews.llvm.org/D21746

llvm-svn: 274110
2016-06-29 08:14:17 +00:00
Artur Pilipenko 70d4bb566c Update the expected masked load/store intrinsics names in tests
The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.

llvm-svn: 274044
2016-06-28 18:28:45 +00:00
Chris Dewhurst 7cc4cfe4fc [SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.
The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit).

llvm-svn: 274012
2016-06-28 12:55:55 +00:00
Asaf Badouh 57819aa185 [X86] add _mm_loadu_si64
Differential Revision: http://reviews.llvm.org/D21504

llvm-svn: 273812
2016-06-26 13:51:54 +00:00
Craig Topper 50e3dfe9d0 [X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates larger than 16. This was accidentally broken in r272246.
llvm-svn: 273775
2016-06-25 07:31:14 +00:00
Rafael Espindola 0fa668072f Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273735
2016-06-24 21:35:06 +00:00
Peter Collingbourne 8dd14da0dc CodeGen: Update Clang to use the new type metadata.
Differential Revision: http://reviews.llvm.org/D21054

llvm-svn: 273730
2016-06-24 21:21:46 +00:00
Strahinja Petrovic 7ba5bf5dc7 Fix make-check issues
Fixing build issue for test test/CodeGen/struct-union-BE.c.

llvm-svn: 273675
2016-06-24 13:11:15 +00:00
Strahinja Petrovic 515a1eb44c This patch fixes problem with passing structures and unions
smaller than register as argument in variadic functions on
big endian architectures.
Differential Revision: http://reviews.llvm.org/D21611

llvm-svn: 273665
2016-06-24 12:12:41 +00:00
Dehao Chen bd3ed3c55b Invoke simplifycfg and sroa before instcombine.
Summary: InstCombine needs to be performed after simplifycfg and sroa, otherwise it may make bad optimization decisions.

Reviewers: davidxl, wmi, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21568

llvm-svn: 273606
2016-06-23 20:13:10 +00:00
Saleem Abdulrasool 6e9e88b30a CodeGen: support linker options on Windows ARM
We would incorrectly emit the directive sections due to the missing overridden
methods.  We now emit the expected "/DEFAULTLIB" rather than "-l" options for
requested linkage

llvm-svn: 273558
2016-06-23 13:45:33 +00:00
Craig Topper 79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects.
llvm-svn: 273533
2016-06-23 06:36:42 +00:00
Hans Wennborg 44d061a471 Add support for /Ob1 and -finline-hint-functions flags
Add support for /Ob1 (and equivalent -finline-hint-functions), which enable
inlining only for functions marked inline, either explicitly (via inline
keyword, for example), or implicitly (function definition in class body,
for example).

This works by enabling inlining pass, and adding noinline attribute to
every function not marked inline.

Patch by Rudy Pons <rudy.pons@ilod.org>!

Differential Revision: http://reviews.llvm.org/D20647

llvm-svn: 273440
2016-06-22 16:56:16 +00:00
Hans Wennborg 9565cf581e Widen EHScope::ClenupBitFields::FixupDepth to avoid overflowing it (PR23490)
It currently only takes 2048 gotos to overflow the FixupDepth bitfield,
causing silent miscompilation. Apparently some parser generators run into
this (see PR).

I don't know that that data structure is terribly size sensitive anyway,
and since there's no room to widen the bitfield, let's just use a separate
word in EHCatchScope for it.

Differential Revision: http://reviews.llvm.org/D21566

llvm-svn: 273434
2016-06-22 16:21:14 +00:00
Michael Zuckerman 716859aa64 [Clang][bmi][intrinsics] Adding _mm_tzcnt_64 _mm_tzcnt_32 intrinsics to clang.
Differential Revision: http://reviews.llvm.org/D21373

llvm-svn: 273401
2016-06-22 12:32:43 +00:00
Craig Topper 08181f795f [AVX512] Fix _mm_setzero_di to not require avx512vl since its used by the avx512dqintrin.h. Also update the avx512dq test to not enable avx512vl feature so we can ensure correct dependencies.
llvm-svn: 273388
2016-06-22 06:36:21 +00:00
Craig Topper d1691c7026 [AVX512] Replace masked integer cmp and ucmp builtins with native IR.
llvm-svn: 273378
2016-06-22 04:47:58 +00:00
Craig Topper c56f0f8485 [AVX512] Use correct types for mask parameters in avx512vlbw cmp builtin tests.
llvm-svn: 273377
2016-06-22 04:47:55 +00:00
Peter Collingbourne aa463c2a18 Require an x86 target for the thinlto_backend.ll test.
llvm-svn: 273361
2016-06-22 01:40:47 +00:00
Peter Collingbourne 2ff9c25d93 Specify a target triple to fix the test on non-Linux.
llvm-svn: 273356
2016-06-22 01:17:30 +00:00
Peter Collingbourne 91227f2195 CodeGen: Replace test/CodeGen/thinlto_backend.c with a functional test.
This new test tests that functions are capable of being imported, rather than
that the import pass is run. This new test is compatible with the approach
being developed in D20268 which runs the importer on its own rather than in
a pass.

Differential Revision: http://reviews.llvm.org/D21542

llvm-svn: 273347
2016-06-22 00:57:26 +00:00
Pirama Arumuga Nainar a7484c9180 Emit the DWARF tag for the RenderScript language
Summary:
If the RenderScript LangOpt is set, either via '-x renderscript' or the '.rs'
file extension, set the DWARF language tag to be that of RenderScript.

Reviewers: rsmith

Subscribers: cfe-commits, srhines

Differential Revision: http://reviews.llvm.org/D21451

llvm-svn: 273321
2016-06-21 21:35:11 +00:00
Sanjay Patel a4d156980e [x86] AVX FP compare builtins should require AVX target feature (PR28112)
This is a fix for PR28112:
https://llvm.org/bugs/show_bug.cgi?id=28112

The FP comparison intrinsics that take an immediate parameter (rather than specifying
a comparison predicate in the function name) were added with AVX; these are macros in
avxintrin.h. This patch makes clang behavior match gcc (error if a program tries to use 
these without -mavx) and matches the Intel documentation, eg:
VCMPPS: m128 _mm_cmp_ps(m128 a, __m128 b, const int imm)

'V' means this is intended to only work with the AVX form of the instruction.

Differential Revision: http://reviews.llvm.org/D21306

llvm-svn: 273311
2016-06-21 20:22:55 +00:00
Dehao Chen 1997d8684f Invoke PruneEH pass before Sample Profile pass.
Summary: We need to call PruneEH pass before AutoFDO pass so that some EH-related calls can get inlined in Sample Profile pass.

Reviewers: davidxl, dnovillo

Subscribers: junbuml, llvm-commits

Differential Revision: http://reviews.llvm.org/D21197

llvm-svn: 273298
2016-06-21 19:16:41 +00:00
Artem Belevich 4987dc85b4 [aarch64] Update datalayout for aarch64 tests
This brings the tests in sync with the changes in r273280.

llvm-svn: 273289
2016-06-21 17:35:31 +00:00
Craig Topper 879b0978f4 [AVX512] Move the 128-bit and 256-bit lzcnt intrinsics to avx512vlcdintrin.h where they belong.
llvm-svn: 273249
2016-06-21 06:53:58 +00:00
Simon Pilgrim 03a899957f [X86][XOP] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273090
2016-06-18 18:20:14 +00:00
Simon Pilgrim c44a3b9599 [X86][TBM] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273086
2016-06-18 17:09:40 +00:00
David Majnemer 3370c20c7e [CodeGen] Use pointer-sized integers for ptrtoint sources
Given something like:
void *v = (void *)100;

We need to synthesize a ptrtoint operation from 100.  During constant
emission, we choose i64 as the type for our constant because it
guaranteed not to drop any bits from our CharUnits representation of the
value.  However, this is suboptimal for 32-bit targets: LLVM passes like
GlobalOpt will get confused by these sorts of casts resulting in
pessimization.

Instead, make sure the ptrtoint operand has a pointer-sized integer
type.

llvm-svn: 273020
2016-06-17 17:47:24 +00:00
Simon Pilgrim d39d026324 [X86][SSE4A] Use native IR for mask movntsd/movntss intrinsics.
Depends on llvm side commit r273002.

llvm-svn: 273003
2016-06-17 14:28:16 +00:00
Ranjeet Singh ca2b3e7b5c [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Reapplying patch in r272777 which was reverted
because the llvm patch which added support
for generating the mcrr/mcrr2 instructions
from the intrinsic was causing an assertion
failure. This has now been fixed in llvm.

llvm-svn: 272983
2016-06-17 00:59:41 +00:00
George Burgess IV 419996ccb5 [CodeGen] Fix a segfault caused by pass_object_size.
This patch fixes a bug where we'd segfault (in some cases) if we saw a
variadic function with one or more pass_object_size arguments.

Differential Revision: http://reviews.llvm.org/D17462

llvm-svn: 272971
2016-06-16 23:06:04 +00:00
Sanjay Patel dbd68dd09d [x86] generate IR for AVX2 integer min/max builtins
Sibling patch to r272932:
http://reviews.llvm.org/rL272932

llvm-svn: 272933
2016-06-16 18:45:01 +00:00
Marcin Koscielnicki a46fade624 [Builtin] Make __builtin_thread_pointer target-independent.
This is now supported for ARM, AArch64, PowerPC, SystemZ, SPARC, Mips.

Differential Revision: http://reviews.llvm.org/D19589

llvm-svn: 272893
2016-06-16 13:41:54 +00:00
Sanjay Patel 280cfd1a69 [x86] translate SSE packed FP comparison builtins to IR
As noted in the code comment, a potential follow-on would be to remove
the builtins themselves. Other than ord/unord, this already works as 
expected. Eg:

  typedef float v4sf __attribute__((__vector_size__(16)));
  v4sf fcmpgt(v4sf a, v4sf b) { return a > b; }

Differential Revision: http://reviews.llvm.org/D21268

llvm-svn: 272840
2016-06-15 21:20:04 +00:00
Sanjay Patel 7495ec026e [x86] generate IR for SSE integer min/max builtins
Sibling patch to r272806:
http://reviews.llvm.org/rL272806

llvm-svn: 272807
2016-06-15 17:18:50 +00:00
Ranjeet Singh d48760da64 Reverting r272777 because one of the tests
added in the llvm patch is causing an assertion
to fail.

llvm-svn: 272790
2016-06-15 14:21:28 +00:00
Craig Topper a54c21e742 [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics.
llvm-svn: 272787
2016-06-15 14:06:34 +00:00
Ranjeet Singh 8d5ad5bdf2 [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Patch adds intrinsics for mrrc/mrrc2. The
intrinsics for mrrc/mrrc2 return a single
uint64_t to represent two 32 bit values.

The mcrr/mcrr2 intrinsic was changed to
accept a single uint64_t instead of two
32 bit values as the input for consistency.

Differential Revision: http://reviews.llvm.org/D21179

llvm-svn: 272777
2016-06-15 11:32:18 +00:00
Peter Collingbourne bcf909d737 Update clang for D20348
Differential Revision: http://reviews.llvm.org/D20339

llvm-svn: 272710
2016-06-14 21:02:05 +00:00
Hans Wennborg f8b91f8336 s/Intrin.h/intrin.h/, trying to fix the build after r272701
llvm-svn: 272702
2016-06-14 20:14:24 +00:00
Michael Zuckerman c49f6ce3e1 [Clang][avx512][Intrinsics] adding prefetch gather intrinsics
Differential Revision: http://reviews.llvm.org/D21322

llvm-svn: 272667
2016-06-14 13:45:17 +00:00
Michael Zuckerman 223676d2cc [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
Differential Revision: http://reviews.llvm.org/D20626

llvm-svn: 272658
2016-06-14 12:38:58 +00:00
Artem Belevich 6530a3e73f Test fix -- use captured call result instead of hardcoded %2.
llvm-svn: 272573
2016-06-13 18:44:22 +00:00
David Majnemer d423574fde [immintrin] Reimplement _bit_scan_{forward,reverse}
There is no need to use a target-specific intrinsic to implement
_bit_scan_forward or _bit_scan_reverse, reimplementing them using
generic intrinsics makes it more likely that the middle end will
understand what's going on.

llvm-svn: 272564
2016-06-13 17:26:16 +00:00
Asaf Badouh 880f0c252b [X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter
CR: Michael Zuckerman
llvm-svn: 272549
2016-06-13 15:15:57 +00:00
Simon Pilgrim beca5f295c [Clang][X86] Convert non-temporal store builtins to generic __builtin_nontemporal_store in headers
We can now use __builtin_nontemporal_store instead of target specific builtins for naturally aligned nontemporal stores which avoids the need for handling in CGBuiltin.cpp

The scalar integer nontemporal (unaligned) store builtins will have to wait as __builtin_nontemporal_store currently assumes natural alignment and doesn't accept the 'packed struct' trick that we use for normal unaligned load/stores.

The nontemporal loads require further backend support before we can safely convert them to __builtin_nontemporal_load

Differential Revision: http://reviews.llvm.org/D21272

llvm-svn: 272540
2016-06-13 09:57:52 +00:00
Craig Topper fc07498e4a [AVX512] Masked pcmpeqd, pcmpeqq, pcmpgtd, and pcmpgtq don't require avx512bw, just avx512vl.
llvm-svn: 272532
2016-06-13 04:15:11 +00:00
Simon Pilgrim 778a7eddb5 [X86][BMI] Improved bmi intrinsics checks
Ready for matching with llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll (to be added shortly)

llvm-svn: 272490
2016-06-11 22:40:01 +00:00
Craig Topper 46422562f5 [AVX512] Use a regular expression instead of checking for a specific name in a CHECK line in test.
llvm-svn: 272470
2016-06-11 13:35:43 +00:00
Craig Topper 7cc9263ec2 [AVX512] Implement masked and 512-bit pshufd intrinsics directly with __builtin_shufflevector and __builtin_ia32_select.
llvm-svn: 272467
2016-06-11 12:50:19 +00:00
Chandler Carruth c41e081f71 Fix this test to handle NDEBUG builds which don't have a name for the
basic block.

llvm-svn: 272456
2016-06-11 06:32:56 +00:00
Craig Topper 68738332b8 [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version.
llvm-svn: 272452
2016-06-11 03:31:13 +00:00
Craig Topper d4273a425e [AVX512] Add _mm512_bsrli_epi128 and _mm512_bslli_epi128 intrinsics.
llvm-svn: 272451
2016-06-11 03:31:07 +00:00
Pirama Arumuga Nainar 8b788d013c RenderScript support in the Frontend
Summary:

Create a new Frontend LangOpt to specify the renderscript language. It
is enabled by the "-x renderscript" option from the driver.

Add a "kernel" function attribute only for RenderScript (an "ignored
attribute" warning is generated otherwise).

Make the NativeHalfType and NativeHalfArgsAndReturns LangOpts be implied
by the RenderScript LangOpt.

Reviewers: rsmith

Subscribers: cfe-commits, srhines

Differential Revision: http://reviews.llvm.org/D21198

llvm-svn: 272342
2016-06-09 23:34:20 +00:00
Craig Topper 2769bb5753 [X86] Handle AVX2 pslldqi and psrldqi intrinsics shufflevector creation directly in the header file instead of in CGBuiltin.cpp. Simplify the sse2 equivalents as well.
llvm-svn: 272246
2016-06-09 05:15:12 +00:00
Vitaly Buka 9d1b12c091 Specify target in lifetime-asan test.
Summary: Some target platforms -fsanitize=address.

Reviewers: pcc, eugenis

Subscribers: cfe-commits, christof, chapuni, kubabrecka

Differential Revision: http://reviews.llvm.org/D21117

llvm-svn: 272185
2016-06-08 18:18:08 +00:00
Chris Dewhurst ea61147fc7 [Sparc] Complex return value ABI compliance.
According to the Sparc V8 ABI, complex numbers should be passed and returned as pairs of registers:

https://docs.oracle.com/cd/E26502_01/html/E28387/gentextid-2734.html

This fix ensures this is the case. Without this, complex numbers are returned as a struct of two floats, which breaks the ABI rules.

Differential Review: http://reviews.llvm.org/D20955

llvm-svn: 272148
2016-06-08 14:46:05 +00:00
Igor Breger aadb876200 [AVX512] Emit select instruction instead of using x86 specific instrinsics.
This will allow us to remove the x86 instrinics from the backend.

Differential Revision: http://reviews.llvm.org/D21060

llvm-svn: 272141
2016-06-08 13:59:20 +00:00
Michael Zuckerman c4ae8537cf [Clang][AVX512][BUILTIN]Adding intrinsics for range_round_{sd|ss}
Differential Revision: http://reviews.llvm.org/D21002

llvm-svn: 272123
2016-06-08 08:19:27 +00:00
Michael Zuckerman 96d0399658 [clang][AVX512][Intrinsics] Adding intrinsics reduce_[round]_{ss|sd} to clang
Differential Revision: http://reviews.llvm.org/D21014

llvm-svn: 272012
2016-06-07 14:00:20 +00:00
Craig Topper f51cc07719 [AVX512] Convert masked palignr builtins directly to native IR similar to the other palignr builtins, but with a select to handle masking.
llvm-svn: 271873
2016-06-06 06:13:01 +00:00
Michael Zuckerman 95721ac863 [Clang][AVX512]Adding set4 intrinsics
Differential Revision: http://reviews.llvm.org/D20866

llvm-svn: 271835
2016-06-05 15:43:30 +00:00
Michael Zuckerman f36f6eb036 [Clang][AVX512][Intrinsics] Adding two definitions _mm512_setzero and _mm512_setzero_epi32
Differential Revision: http://reviews.llvm.org/D20871

llvm-svn: 271832
2016-06-05 15:12:52 +00:00
Craig Topper 4d302448ae [AVX512] Remove 512-bit andnot tests from the avx512vl test file.
llvm-svn: 271795
2016-06-04 16:37:38 +00:00
NAKAMURA Takumi 7f74dedb39 Suppress clang/test/CodeGen/lifetime-asan.c for targeting mingw.
clang.EXE: error: unsupported option '-fsanitize=address' for target 'x86_64-w64-windows-gnu'

llvm-svn: 271509
2016-06-02 10:54:45 +00:00
Sjoerd Meijer 90df4a7c31 This adds target support and tests for Cortex-A73
Differential Revision: http://reviews.llvm.org/D20864

llvm-svn: 271507
2016-06-02 10:48:37 +00:00
Asaf Badouh 89f657611c [X86][AVX512] add intrinsics of Scalar FP to integer
Differential Revision: http://reviews.llvm.org/D20861

llvm-svn: 271499
2016-06-02 08:11:35 +00:00
Michael Zuckerman 9e7d0a98fa [Clang][AVX512][INTRINSICS] adding round cvt and fix regular cvtps_ph
Differential Revision: http://reviews.llvm.org/D20870

llvm-svn: 271498
2016-06-02 07:44:08 +00:00
Vitaly Buka 9d4eb6f389 [asan] Added -fsanitize-address-use-after-scope flag
Summary:
Also emit lifetime markers for -fsanitize-address-use-after-scope.
Asan uses life-time markers for use-after-scope check.

PR27453

Reviewers: kcc, eugenis, aizatsky

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20759

llvm-svn: 271451
2016-06-02 00:24:20 +00:00
Simon Pilgrim 00880511b1 [X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero) f32/f64 to i32 with generic IR (clang)
The 'cvtt' truncation (round to zero) conversions can be safely represented as generic __builtin_convertvector (fptosi) calls instead of x86 intrinsics. We already do this (implicitly) for the scalar equivalents.

Note: I looked at updating _mm_cvttpd_epi32 as well but this still requires a lot more backend work to correctly lower (both for debug and optimized builds).

Differential Revision: http://reviews.llvm.org/D20859

llvm-svn: 271436
2016-06-01 21:46:51 +00:00
Michael Zuckerman 6170c15fc6 [Clang][Intrinsics][avx512] Continue Adding round cvt to clang
And remove trailing spaces in intrinsic f test
Differential Revision: http://reviews.llvm.org/D20810

llvm-svn: 271398
2016-06-01 14:41:41 +00:00
Michael Zuckerman e54093fcc0 Adding front-end support to several intrinsics (bit scanning, conversion and state reading intrinsics)
Adding LLVM front-end support to two intrinsics dealing with bit scan: _bit_scan_forward and _bit_scan_reverse.
 Their functionality is as described in Intel intrinsics guide:
 https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_forward&expand=371,370
 https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_bit_scan_reverse&expand=371,370

 Furthermore, adding clang front-end support to these conversion intrinsics: _mm256_cvtsd_f64, _mm256_cvtsi256_si32 and _mm256_cvtss_f32.

 Finally, adding tests to all of the above, as well as to the state reading intrinsics _rdpmc and _rdtsc.
  Their functionality is also specified in the Intel intrinsics guide.


Commit on behalf of Omer Paparo Bivas

llvm-svn: 271387
2016-06-01 12:21:00 +00:00
Michael Zuckerman e6aa66a53d [Clang][Intrinsics][avx512] Adding round intrinsics fot max/min/sqrt instruction set to clang
Differential Revision: http://reviews.llvm.org/D20812

llvm-svn: 271373
2016-06-01 08:34:03 +00:00
Michael Zuckerman c301c194ec [Clang][Intrinsics][avx512] Adding round roundscale to clang
Differential Revision: http://reviews.llvm.org/D20815

llvm-svn: 271368
2016-06-01 07:35:44 +00:00
Saleem Abdulrasool 4976634208 CodeGen: tweak CFString emission for COFF targets
The `isa' member was previously not given the correct DLL Storage.  Ensure that
we give the `isa' constant `__CFConstantStringClassReference' the correct DLL
storage.  Default to dllimport unless an explicit specification gives it a
dllexport storage.

llvm-svn: 271361
2016-06-01 04:22:24 +00:00
Matt Arsenault 6dc455fb93 AMDGPU: Update datalayout string
llvm-svn: 271297
2016-05-31 16:58:18 +00:00
Ranjeet Singh 61c47fd86a [ARM] Add load/store co-processor intrinsics.
Differential Revision: http://reviews.llvm.org/D20563

llvm-svn: 271275
2016-05-31 13:31:25 +00:00
Michael Zuckerman 186d86738d [Clang][Intrinsics][avx512] Adding round cvt to clang
Differential Revision: http://reviews.llvm.org/D20790

llvm-svn: 271265
2016-05-31 11:27:34 +00:00
Craig Topper 4b060e31c9 [AVX512] Convert masked load builtins to generic masked load intrinsics instead of the x86 specific ones.
This will allow the x86 intrinsics to be removed from the backend.

llvm-svn: 271253
2016-05-31 06:58:07 +00:00
Craig Topper 6e891fbdd2 [AVX512] Emit generic masked store instrinsics instead of using x86 specific intrinsics.
This will allow us to remove the x86 instrinics from the backend.

llvm-svn: 271246
2016-05-31 01:50:10 +00:00
Simon Pilgrim 0e90936fea [X86] Ensure load/store tests unaligned pointers really are align 1
llvm-svn: 271227
2016-05-30 19:20:55 +00:00
Simon Pilgrim 43439bd33d [X86][SSE] Added missing tests (merge failure)
Differential Revision: http://reviews.llvm.org/D20617

llvm-svn: 271219
2016-05-30 17:58:38 +00:00
Simon Pilgrim 645e1ad33a [X86][SSE] _mm_store1_ps/_mm_store1_pd should require an aligned pointer
According to the gcc headers, intel intrinsics docs and msdn codegen the _mm_store1_pd (and its _mm_store_pd1 equivalent) should use an aligned pointer - the clang headers are the only implementation I can find that assume non-aligned stores (by storing with _mm_storeu_pd).

Additionally, according to the intel intrinsics docs and msdn codegen the _mm_store1_ps (_mm_store_ps1) requires a similarly aligned pointer.

This patch raises the alignment requirements to match the other implementations by calling _mm_store_ps/_mm_store_pd instead.

I've also added the missing _mm_store_pd1 intrinsic (which maps to _mm_store1_pd like _mm_store_ps1 does to _mm_store1_ps).

As a followup I'll update the llvm fast-isel tests to match this codegen.

Differential Revision: http://reviews.llvm.org/D20617

llvm-svn: 271218
2016-05-30 17:55:25 +00:00
Craig Topper 09175dab31 [X86] Replace unaligned store builtins in SSE/AVX intrinsic files with code that will compile to a native unaligned store. Remove the builtins since they are no longer used.
Intrinsics will be removed from llvm in a future commit.

llvm-svn: 271214
2016-05-30 17:10:30 +00:00
Saleem Abdulrasool 2460a36f53 test: add explicit targets for some tests
These tests currently expect MachO section names and do not provide a target.
Explicitly provide one.

llvm-svn: 271212
2016-05-30 16:36:48 +00:00
Saleem Abdulrasool f7444e645b CodeGen: tweak CFConstantStrings for COFF and ELF
Adjust the constant CFString emission to emit into more appropriate sections on
ELF and COFF targets.  It would previously try to use MachO section names
irrespective of the file format.

llvm-svn: 271211
2016-05-30 16:23:07 +00:00
Michael Zuckerman 9fcf3552ad [Clang][avx512][builtin] Adding missing intrinsics for cvt
Differential Revision: http://reviews.llvm.org/D20618

llvm-svn: 271205
2016-05-30 13:22:12 +00:00
Rafael Espindola ab3e10a7a0 Mark test as requiring x86-registered-target.
llvm-svn: 271163
2016-05-29 02:36:16 +00:00
Rafael Espindola f8f01c3d59 Handle -Wa,--mrelax-relocations=[no|yes].
llvm-svn: 271162
2016-05-29 02:01:14 +00:00
Saleem Abdulrasool 442b88b9ec CodeGen: support blocks on COFF targets in DLLs
This extends the blocks support to support blocks with a dynamically linked
blocks runtime.  The previous code generation would work only for static builds
of the blocks runtime.  Mark the block "isa" pointers and functions as dllimport
if no explicit declaration marked with __declspec(dllexport) is found.  This
additional check allows for the use of the functionality in the runtime library
if desired.

llvm-svn: 271138
2016-05-28 19:41:35 +00:00
Craig Topper cbdbbac875 [AVX512] Add masked v16i32 and v8i64 unaligned store tests.
llvm-svn: 271134
2016-05-28 18:59:06 +00:00
Simon Pilgrim 91b77ceaed [X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (clang)
The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics.

This patch removes the clang builtins and their use in the sse2/avx headers - a companion patch will remove/auto-upgrade the llvm intrinsics.

Note: We already did this for SSE41 PMOVSX sometime ago.

Differential Revision: http://reviews.llvm.org/D20684

llvm-svn: 271106
2016-05-28 08:12:45 +00:00
David Majnemer e6abf3d29f [CodeGen] Don't crash when sizeof(long) != 4 for some intrins
_InterlockedIncrement and _InterlockedDecrement have 'long' in their
prototypes.  We assumed 'long' was the same size as an i32 which is
incorrect for other targets.

This fixes PR27892.

llvm-svn: 270953
2016-05-27 02:06:19 +00:00
Michael Zuckerman 22c47e606a Adding missing _mm512_castsi512_si256 intrinsic.
llvm-svn: 270851
2016-05-26 14:32:11 +00:00
Simon Pilgrim 1fdfbf6941 [X86][F16C] Improved f16c intrinsics checks
Added checks for upper elements being zero'd in scalar conversions

llvm-svn: 270836
2016-05-26 10:20:25 +00:00
Simon Pilgrim 57446efaa9 [X86][AVX2] Improved checks for float/double mask generation for non-masked gathers
llvm-svn: 270833
2016-05-26 09:56:50 +00:00
Michael Zuckerman eb5f178c4b Fix instrinsics names:
_mm128_cmp_ps_mask-->_mm_cmp_ps_mask
_mm128_mask_cmp_ps_mask-->_mm_mask_cmp_ps_mask
_mm128_cmp_pd_mask-->_mm_cmp_pd_mask
_mm128_mask_cmp_pd_mask-->_mm_mask_cmp_pd_mask

llvm-svn: 270830
2016-05-26 08:10:12 +00:00
Michael Zuckerman 6f08cebf36 [Clang][AVX512][BUILTIN] Adding intrinsics for set1
Differential Revision: http://reviews.llvm.org/D20562

llvm-svn: 270825
2016-05-26 06:54:52 +00:00
Simon Pilgrim f1ad90d509 [X86][AVX2] Full set of AVX2 intrinsics tests
llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll will be synced to this

llvm-svn: 270708
2016-05-25 15:10:49 +00:00
Benjamin Kramer 1f4381f810 [AVX512] Don't rely on value names. They're different in release builds.
llvm-svn: 270704
2016-05-25 14:30:01 +00:00
Michael Zuckerman d5cc6cd262 [Clang][AVX512][BUILTIN] Add missing intrinsics for cast
Differential Revision: http://reviews.llvm.org/D20523

llvm-svn: 270699
2016-05-25 14:04:21 +00:00
Denis Zobnin eebc4af0ed [ms][dll] #26935 Defining a dllimport function should cause it to be exported
If we have some function with dllimport attribute and then we have the function
definition in the same module but without dllimport attribute we should add
dllexport attribute to this function definition.
The same should be done for variables.

Example:
struct __declspec(dllimport) C3 {
  ~C3();
};
C3::~C3() {;} // we should export this definition.

Patch by Andrew V. Tischenko

Differential revision: http://reviews.llvm.org/D18953

llvm-svn: 270686
2016-05-25 11:32:42 +00:00
Simon Pilgrim 7b365bce6f [X86][SSE] Updated _mm_store_ps1 test to match _mm_store1_ps
llvm-svn: 270679
2016-05-25 09:20:08 +00:00
Craig Topper f70a61ff3f [X86] Update test cases to make sure storeu builtins use the storeu instrinsics. We were previously matching on other stores in the IR from this being an -O0 test.
We should probably look into making the storeu builtins just emit a normal store with an alignment of 1.

llvm-svn: 270664
2016-05-25 05:26:23 +00:00
Hans Wennborg 9464491aa7 Rename test/CodeGen/inline-optim.cc to .c and provide a triple
llvm-svn: 270633
2016-05-24 23:37:56 +00:00
Hans Wennborg 7a00888a08 [Driver] Add support for -finline-functions and /Ob2 flags
-finline-functions and /Ob2 are currently ignored by Clang. The only way to
enable inlining is to use the global O flags, which also enable other options,
or to emit LLVM bitcode using Clang, then running opt by hand with the inline
pass.

This patch allows to simply use the -finline-functions flag (same as GCC) or
/Ob2 in clang-cl mode to enable inlining without other optimizations.

This is the first patch of a serie to improve support for the /Ob flags.

Patch by Rudy Pons <rudy.pons@ilod.org>!

Differential Revision: http://reviews.llvm.org/D20576

llvm-svn: 270609
2016-05-24 20:40:51 +00:00
David Majnemer a38c9f1fa5 [MS Volatile] Don't make volatile loads/stores to underaligned objects atomic
Underaligned atomic LValues require libcalls which MSVC doesn't have.
MSVC doesn't seem to consider such operations as requiring a barrier
anyway.

This fixes PR27843.

llvm-svn: 270576
2016-05-24 16:09:25 +00:00
Jacob Baungard Hansen 13a4937404 [Sparc] Add software float option -msoft-float
Summary:
Following patch D19265 which enable software floating point support in the Sparc backend, this patch enables the option to be enabled in the front-end using the -msoft-float option.

The user should ensure a library (such as the builtins from Compiler-RT) that includes the software floating point routines is provided.

Reviewers: jyknight, lero_chris

Subscribers: jyknight, cfe-commits

Differential Revision: http://reviews.llvm.org/D20419

llvm-svn: 270538
2016-05-24 08:30:08 +00:00
Simon Pilgrim 90770c7c76 [X86][SSE] Replace lossless i32/f32 to f64 conversion intrinsics with generic IR
Both the (V)CVTDQ2PD(Y) (i32 to f64) and (V)CVTPS2PD(Y) (f32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen.

This patch removes the clang builtins and their use in the sse2/avx headers - a future patch will deal with removing the llvm intrinsics, but that will require a bit more work.

Differential Revision: http://reviews.llvm.org/D20528

llvm-svn: 270499
2016-05-23 22:13:02 +00:00
Michael Zuckerman f86eb71616 [clang][AVX512][Builtin] adding missing intrinsics for vpmultishiftqb{128|256|512} instruction set .
Differential Revision: http://reviews.llvm.org/D20521

llvm-svn: 270441
2016-05-23 15:04:39 +00:00
Michael Zuckerman e6542002fc [Clang][AVX512][BUILTIN]adding missing intrinsics for movdaq instruction set
Differential Revision: http://reviews.llvm.org/D20514

llvm-svn: 270401
2016-05-23 08:01:48 +00:00
Simon Pilgrim 28666ce778 [X86][AVX] Ensure zero-extension of _mm256_extract_epi8 and _mm256_extract_epi16
Ensure _mm256_extract_epi8 and _mm256_extract_epi16 zero extend their i8/i16 result to i32. This matches _mm_extract_epi8 and _mm_extract_epi16.

Fix for PR27594

Differential Revision: http://reviews.llvm.org/D20468

llvm-svn: 270330
2016-05-21 21:14:35 +00:00
Simon Pilgrim 8a8c4e1404 [X86][AVX] Added _mm256_testc_si256/_mm256_testnzc_si256/_mm256_testz_si256 tests
llvm-svn: 270227
2016-05-20 15:49:17 +00:00
Benjamin Kramer f4c520d5d2 Add all the avx512 flavors to __builtin_cpu_supports's list.
This is matching what trunk gcc is accepting. Also adds a missing ssse3
case. PR27779. The amount of duplication here is annoying, maybe it
should be factored into a separate .def file?

llvm-svn: 270224
2016-05-20 15:21:08 +00:00
Krzysztof Parzyszek 89fb44147b [Hexagon] Recognize "s" constraint in inline-asm
llvm-svn: 270216
2016-05-20 13:50:32 +00:00
Simon Pilgrim 4fa8250ad0 [X86][AVX] Added _mm256_extract_epi64 test
llvm-svn: 270212
2016-05-20 12:57:21 +00:00
Simon Pilgrim 94b17773e5 [X86][AVX] Full set of AVX intrinsics tests
llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll will be synced to this

llvm-svn: 270210
2016-05-20 12:41:02 +00:00
Justin Lebar 2e4ecfdebe [CUDA] Implement __ldg using intrinsics.
Summary:
Previously it was implemented as inline asm in the CUDA headers.

This change allows us to use the [addr+imm] addressing mode when
executing ld.global.nc instructions.  This translates into a 1.3x
speedup on some benchmarks that call this instruction from within an
unrolled loop.

Reviewers: tra, rsmith

Subscribers: jhen, cfe-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D19990

llvm-svn: 270150
2016-05-19 22:49:13 +00:00
Benjamin Kramer 504c01cc67 Don't rely on value numbers in test, those are fragile and change in Release (no asserts) builds.
llvm-svn: 270085
2016-05-19 17:57:35 +00:00
Artem Belevich ffa5fc51b8 [CUDA] Allow sm_50,52,53 GPUs
LLVM accepts them since r233575.

Differential Revision: http://reviews.llvm.org/D20405

llvm-svn: 270084
2016-05-19 17:47:47 +00:00
Simon Pilgrim 9b3729b043 [X86][SSE] Sync with llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
sse-builtins.c now just covers SSE1 intrinsics

llvm-svn: 270083
2016-05-19 17:11:31 +00:00
Simon Pilgrim bcf8846be5 [X86][SSE2] Fixed shuffle of results in _mm_cmpnge_sd/_mm_cmpngt_sd tests
llvm-svn: 270079
2016-05-19 16:48:59 +00:00
Ranjeet Singh b631aafee3 [ARM] Fix cdp intrinsic
- Fixed cdp intrinsic to only accept compile time
  constant values previously you could pass in a
  variable to the builtin which would result in
  illegal llvm assembly output

Differential Revision: http://reviews.llvm.org/D20394

llvm-svn: 270058
2016-05-19 13:04:34 +00:00
Michael Zuckerman 178113e8cc [Clang][AVX512][intrinsics] continue completing missing set intrinsics
Differential Revision: http://reviews.llvm.org/D20160

llvm-svn: 270047
2016-05-19 12:07:49 +00:00
Simon Pilgrim 97728dfb39 [X86][SSE2] Added _mm_move_* tests
llvm-svn: 270043
2016-05-19 11:18:49 +00:00
Simon Pilgrim cddcd2bd45 [X86][SSE2] Added _mm_cast* and _mm_set* tests
llvm-svn: 270042
2016-05-19 11:03:48 +00:00
Simon Pilgrim 3f64bb9618 [X86][SSE2] Sync with llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm-svn: 270034
2016-05-19 09:52:59 +00:00
Simon Pilgrim 063c57c1f9 Revert r269967 (SSE2 builtin checks) due to failed buildbots
llvm-svn: 269970
2016-05-18 18:22:20 +00:00
Simon Pilgrim 8beed747ce [X86][SSE2] Sync with llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
llvm-svn: 269967
2016-05-18 18:12:34 +00:00
Michael Zuckerman 2cacc35343 [Clang][AVX512] completing missing intrinsics [pandnd].
Differential Revision: http://reviews.llvm.org/D20101

llvm-svn: 269939
2016-05-18 15:25:53 +00:00
Krzysztof Parzyszek e0026e4e21 [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
Clang follow-up to r269933.

llvm-svn: 269934
2016-05-18 14:56:14 +00:00
Simon Pilgrim a090864762 Removed duplicate SSE42 builtin tests from avx-builtins.c
llvm-svn: 269932
2016-05-18 14:32:16 +00:00
Simon Pilgrim 519c78f3ae [X86][SSE42] Sync with llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
llvm-svn: 269931
2016-05-18 14:29:55 +00:00
Simon Pilgrim 7a4d7d47c9 [X86][SSE41] Sync with llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
llvm-svn: 269926
2016-05-18 13:47:16 +00:00
Simon Pilgrim 7e148a94a4 [X86][SSE3] Sync with llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
llvm-svn: 269921
2016-05-18 13:17:39 +00:00
Ashutosh Nema 51c9dd0081 Add new intrinsic support for MONITORX and MWAITX instructions
Summary:
MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and 
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction
execution and enter an implementation-dependent optimized state until
occurrence of a class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper

Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits

Differential Revision: http://reviews.llvm.org/D19796

llvm-svn: 269907
2016-05-18 11:56:23 +00:00
Craig Topper 39c871038a [X86] Add immediate range checks for many of the builtins.
This time allow -128 to 255 for builtins that use a char type immediate."

llvm-svn: 269878
2016-05-18 03:18:12 +00:00
Simon Pilgrim 2d1decf7cb [X86][SSE] Tidied up MMX/SSE/SSE2 builtin tests to the correct test file
llvm-svn: 269852
2016-05-17 22:03:31 +00:00
Filipe Cabecinhas 09fbfcafc3 Revert "[X86] Add immediate range checks for many of the builtins."
This reverts commit r269619.

llvm-svn: 269765
2016-05-17 14:07:43 +00:00
Craig Topper dbbe4a5542 [AVX512] Fix return types in several test cases to match the intrinsic they're testing.
llvm-svn: 269738
2016-05-17 04:41:32 +00:00
Craig Topper 8ca5373c72 [X86] Fix a few intrinsic tests to use the return type that matches the intrinsic they're testing.
llvm-svn: 269735
2016-05-17 03:42:37 +00:00
Michael Zuckerman bf05a4589e [Clang][AVX512] completing missing intrinsics for [vpabs] instruction set
Differential Revision: http://reviews.llvm.org/D20069

llvm-svn: 269680
2016-05-16 18:57:24 +00:00
Nico Weber 379a1952b3 [ms] Reintroduce feature guards in intrinsic headers in Microsoft mode
Visual Studio's C++ standard library headers include intrin.h, so the intrinsic
headers get included a lot more often in Microsoft mode than elsewhere. The
AVX512 intrinsics are a lot of code (0.7 MB, causing 30% compile time overhead
for small programs including e.g. <string> and 6% compile time overhead for
larger projects like e.g. v8). Since multiversioning can't be relied on in
Microsoft mode (cl.exe doesn't support it), having faster compiles seems like
the much better tradeoff until we have a better intrinsic story going forward
(which we'll need for e.g. PR19898).

Actually using intrinsics on Windows already requires the right /arch:
settings, so this patch should have no big behavior change.

See also thread "The intrinsics headers (especially avx512) are too big. What
to do about it?" on cfe-dev.

http://reviews.llvm.org/D20291

llvm-svn: 269675
2016-05-16 18:14:07 +00:00
Michael Zuckerman cb85677471 [Clang][AVX512] completing missing intrinsics [vsqrt|vrsqrt|vrcp14 ].
Differential Revision: http://reviews.llvm.org/D20068

llvm-svn: 269649
2016-05-16 11:42:01 +00:00
Craig Topper 9c6c85f1ad [AVX512] Add typecasts to some intrinsics to avoid doing operations on the __m512/__m512i/__m512d types.
llvm-svn: 269631
2016-05-16 06:38:36 +00:00
Craig Topper e5cc18054a [AVX512] Use correct types in test case.
llvm-svn: 269622
2016-05-16 01:09:19 +00:00
Craig Topper 0f7ea93541 [X86] Add immediate range checks for many of the builtins.
llvm-svn: 269619
2016-05-15 22:18:00 +00:00
Craig Topper dca1f230ae [AVX512] Add intrinsics for 512-bit insertf32x8/insertf32x4/inserti32x4.
llvm-svn: 269617
2016-05-15 21:26:20 +00:00
Oleg Ranevskyy 7232f66051 [CodeGen] Clang does not choose aapcs-vfp calling convention for ARM bare metal target with hard float (EABIHF)
Summary:
Clang does not detect `aapcs-vfp` for the EABIHF environment. The reason is that only GNUEABIHF is considered while choosing calling convention, EABIHF is ignored.

This causes clang to use `aapcs` for EABIHF and add the `arm_aapcscc` specifier to functions in generated IR.

The modified `arm-cc.c` test checks that no calling convention specifier is added to functions for EABIHF, which means the default one is used (`CallingConv::ARM_AAPCS_VFP`).

Reviewers: rengolin, compnerd, t.p.northover

Subscribers: aemerson, rengolin, asl, cfe-commits

Differential Revision: http://reviews.llvm.org/D20219

llvm-svn: 269419
2016-05-13 14:45:57 +00:00
Filipe Cabecinhas ab731f7e86 [ubsan] Add -fsanitize-undefined-strip-path-components=N
Summary:
This option allows the user to control how much of the file name is
emitted by UBSan. Tuning this option allows one to save space in the
resulting binary, which is helpful for restricted execution
environments.

With a positive N, UBSan skips the first N path components.
With a negative N, UBSan only keeps the last N path components.

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19666

llvm-svn: 269309
2016-05-12 16:51:36 +00:00
Michael Zuckerman 13d3c002df [clang][AVX512] completing missing set intrinsics
Differential Revision: http://reviews.llvm.org/D20099

llvm-svn: 269172
2016-05-11 11:41:29 +00:00
Michael Zuckerman 5e2c6b6200 [clang][AVX512] completing missing intrinsics for [vpermt2d|vptestm] instruction set.
Differential Revision: http://reviews.llvm.org/D20096

llvm-svn: 269170
2016-05-11 11:21:18 +00:00
NAKAMURA Takumi d4fbaef2b0 clang/test/CodeGen/avx512f-builtins.c: Fix for -Asserts.
llvm-svn: 269079
2016-05-10 17:16:12 +00:00
Michael Zuckerman e9e8e573e3 [Clang][AVX512] completing missing intrinsics [load/store]
Differential Revision: http://reviews.llvm.org/D20063

llvm-svn: 269056
2016-05-10 13:13:54 +00:00
Michael Zuckerman de860e5585 [Clang][AVX512] completing missing intrinsics [vmin/vmax]{sd|sq|uq|ud}.
Differential Revision: http://reviews.llvm.org/D20064

llvm-svn: 269042
2016-05-10 11:34:19 +00:00
Michael Zuckerman 2564d2f5fe [Clang][AVX512] completing missing intrinsics [vextractf].
Differential Revision: http://reviews.llvm.org/D20061

llvm-svn: 269037
2016-05-10 10:14:50 +00:00
Michael Zuckerman 7360d8a9cc [Clang][AVX512] completing missing intrinsics [roundscale, ceil, floor]
Differential Revision: http://reviews.llvm.org/D20070

llvm-svn: 269022
2016-05-10 07:30:58 +00:00
George Burgess IV 3dc1669133 [Sema] Fix an overload resolution bug with enable_if.
Currently, if clang::isBetterOverloadCandidate encounters an enable_if
attribute on either candidate that it's inspecting, it will ignore all
lower priority attributes (e.g. pass_object_size). This is problematic
in cases like:

```
void foo(char *c) __attribute__((enable_if(1, "")));
void foo(char *c __attribute__((pass_object_size(0))))
    __attribute__((enable_if(1, "")));
```

...Because we would ignore the pass_object_size attribute in the second
`foo`, and consider any call to `foo` to be ambiguous.

This patch makes overload resolution consult further tiebreakers (e.g.
pass_object_size) if two candidates have equally good enable_if
attributes.

llvm-svn: 269005
2016-05-10 01:59:34 +00:00
Michael Zuckerman f9be3bb1d5 [clang][AVX512] completing missing intrinsics [vmin/vmax].
Differential Revision: http://reviews.llvm.org/D20062

llvm-svn: 268910
2016-05-09 12:38:49 +00:00
Michael Zuckerman f15447537f [Clang][AVX512] completing missing intrinsics [CVT]
Differential Revision: http://reviews.llvm.org/D20056

llvm-svn: 268903
2016-05-09 10:32:51 +00:00
Krzysztof Parzyszek 09ba254f10 [Hexagon] Add a testcase for __builtin_HEXAGON_A2_tfrpi
llvm-svn: 268637
2016-05-05 15:55:54 +00:00
Marcin Koscielnicki b31ee6db11 [SystemZ] Add -mbackchain option.
This option, like the corresponding gcc option, is SystemZ-specific and
enables storing frame backchain links, as specified in the ABI.

Differential Revision: http://reviews.llvm.org/D19891

llvm-svn: 268575
2016-05-04 23:37:40 +00:00
Michael Zuckerman e6f7389b5a [Clang][Builtin][AVX512] Adding intrinsics fot cvt{u}si2s{d|s} cvt{sd|ss}2{ss|sd} instruction set
Differential Revision: http://reviews.llvm.org/D19765

llvm-svn: 268481
2016-05-04 08:55:11 +00:00
Reid Kleckner 8195f696e4 [X86] Add -malign-double support
The -malign-double flag causes i64 and f64 types to have alignment 8
instead of 4. On x86-64, the behavior of -malign-double is enabled by default.

Rebases and cleans phosek's work here: http://reviews.llvm.org/D12860

Patch by Sean Klein

Reviewers: rnk

Subscribers: rnk, jfb, dschuff, phosek

Differential Revision: http://reviews.llvm.org/D19734

llvm-svn: 268473
2016-05-04 02:58:24 +00:00
Pete Cooper 71dfcb42eb Change test to use regex instead of explicit value numbers. NFC.
We were seeing an internal failure when running this test.  I can't
see a good reason for the difference, but the simple fix is to use
%{{.*}} instead of %1.

llvm-svn: 268416
2016-05-03 18:32:01 +00:00
Michael Zuckerman c66770313a [clang][AVX512][BuiltIn] Adding intrinsics for cast{pd|ps|si}128_{pd|ps|si}512 and castsi256_si512 instruction set
Differential Revision: http://reviews.llvm.org/D19858

llvm-svn: 268387
2016-05-03 14:26:52 +00:00
Michael Zuckerman e871785eb6 [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19766

llvm-svn: 268385
2016-05-03 14:12:23 +00:00
Michael Zuckerman 8bfb7776e4 [Clang][AVX512][Builtin] Adding intrinsics for vcvt{ph|ps}2{ps|ph} instruction set
Differential Revision: http://reviews.llvm.org/D19767

llvm-svn: 268376
2016-05-03 12:45:04 +00:00
Michael Zuckerman 138fc5b5a8 [Clang][AVX512][Builtin] Adding intrinsics for vcvttpd2udq instruction set
Differential Revision: http://reviews.llvm.org/D19768

llvm-svn: 268373
2016-05-03 11:05:24 +00:00
Michael Zuckerman 708e759b86 [Clang][AVX512][BUILTIN] Adding intrinsics for compressstore{df|di|sf|si} instruction set.
Differential Revision: http://reviews.llvm.org/D19808

llvm-svn: 268372
2016-05-03 10:42:46 +00:00
Reid Kleckner 0404605dda Expand aggregate arguments more often on 32-bit Windows
Before this change, we would pass all non-HFA record arguments on
Windows with byval. Byval often blocks optimizations and results in bad
code generation. Windows now uses the existing workaround that other
x86_32 platforms use.

I also expanded the workaround to handle C++ records with constructors
on Windows. On non-Windows platforms, we have to keep generating the
same LLVM IR prototypes if we want our bitcode to be ABI compatible.
Otherwise we will encounter mismatch issues like PR21573.

Essentially fixes PR27522 in Clang instead of LLVM.

Reviewers: hans

Differential Revision: http://reviews.llvm.org/D19756

llvm-svn: 268261
2016-05-02 17:41:07 +00:00
Derek Schuff dbd24b4593 [WebAssembly] Rename memory_size intrinsic to current_memory
This follows the recent change in the wasm spec.

llvm-svn: 268256
2016-05-02 17:26:19 +00:00
Michael Zuckerman 5f0e96e56a [CLANG][AVX512][BUILTIN]movap{d|s}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17818

llvm-svn: 268230
2016-05-02 14:02:01 +00:00
Michael Zuckerman d6e68ce75f [Clang][AVX512][BuiltIn] Adding intrinsics for cvtps2pd instruction set
Differential Revision: http://reviews.llvm.org/D19774

llvm-svn: 268217
2016-05-02 09:42:31 +00:00
Michael Zuckerman 6a0e0871db [Clang][avx512][builtin] Adding intrinsics for vexpand{d|q|ps|pd} instrctuon set
Differential Revision: http://reviews.llvm.org/D19467

llvm-svn: 268214
2016-05-02 08:36:41 +00:00
Michael Zuckerman c62f27e3f4 [Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction set
Differential Revision: http://reviews.llvm.org/D19580

llvm-svn: 268213
2016-05-02 07:35:27 +00:00
Michael Zuckerman ac1e519944 [clang][Builtin][AVX512] Adding intrinsics for vmovshdup and vmovsldup instruction set
Differential Revision: http://reviews.llvm.org/D19595

llvm-svn: 268196
2016-05-01 14:43:43 +00:00
Michael Zuckerman 0b9d105a16 [clang][BuiltIn][AVX512]Adding intrinsics for cmp{ss|sd} instruction set.
Differential Revision: http://reviews.llvm.org/D19601

llvm-svn: 268028
2016-04-29 11:01:16 +00:00
Michael Zuckerman 41f5a37707 [Clang][AVX512][Builtin] Adding intrinsics for compress instruction set
Differential Revision: http://reviews.llvm.org/D19599

llvm-svn: 268013
2016-04-29 08:52:02 +00:00
Michael Zuckerman de8d3753d3 [clang][AVX512][Builtin] Adding intrinsics for the SAD instruction set.
Differential Revision: http://reviews.llvm.org/D19591

llvm-svn: 267942
2016-04-28 21:21:08 +00:00
Adrian Prantl 06f445d65b Debug info: Apply an artificial debug location to __cyg_profile_func.* calls.
The LLVM Verifier expects all inlinable calls in debuggable functions to
have a location.

rdar://problem/25818489

llvm-svn: 267904
2016-04-28 17:21:56 +00:00
Vassil Vassilev 928c8254a9 Reland r267691 fixing PR27535.
llvm-svn: 267882
2016-04-28 14:13:28 +00:00
Michael Zuckerman 533e065bdc [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
Differential Revision: http://reviews.llvm.org/D19588

llvm-svn: 267876
2016-04-28 12:47:30 +00:00
Silviu Baranga 632fdc5919 PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4
Summary:
According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if
the hardware floating-point architecture supports fused floating-point
multiply-accumulate".

This changes clang's behaviour from emitting this macro for v7-A and v7-R
cores to only emitting it when the target has VFPv4 (and therefore support
for the floating point multiply-accumulate instruction).

Fixes PR27216

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D18963

llvm-svn: 267869
2016-04-28 11:29:08 +00:00
Michael Zuckerman 514f05543f [Clang][Builtin][AVX512] Adding intrisnics for the vpconflict{q|d} instruction set
Differential Revision: http://reviews.llvm.org/D19525

llvm-svn: 267728
2016-04-27 15:35:13 +00:00
Michael Zuckerman 8c2900f44d [Clang][BuiltIn][AVX512] Adding intrinsics without mask for VBROADCAST and VPBROADCAST instruction set .
Differential Revision: http://reviews.llvm.org/D19196

llvm-svn: 267696
2016-04-27 11:43:14 +00:00
Michael Zuckerman 7c85a8cb46 [Clang][BuiltIn][AVX512]Adding intrinsics for vmovntdqa vmovntpd vmovntps instruction set
Differential Revision: http://reviews.llvm.org/D19529

llvm-svn: 267690
2016-04-27 10:44:15 +00:00
Jacques Pienaar e74d91314a [lanai] Update handling of structs in arguments to be passed in registers.
Previously aggregate types were passed byval, change the ABI to pass these in registers instead.

llvm-svn: 267496
2016-04-26 00:09:29 +00:00
Michael Zuckerman fa508e8b6d [Clang][Builtin][AVX512]Adding k-register logic intrinsics KAND, KANDN, KOR, KORTEST, KXNOR, KXOR, KUNPACK instruction set.
Differential Revision: http://reviews.llvm.org/D19466

llvm-svn: 267425
2016-04-25 16:42:29 +00:00
Michael Zuckerman edc82fe3ef [Clang][Builtin][AVX512]Adding intrinsics for vfpclass{sd|ss} vfpclass{pd|ps} instruction set
Differential Revision: http://reviews.llvm.org/D19476

llvm-svn: 267414
2016-04-25 14:48:23 +00:00
Michael Zuckerman fcf32c2f00 [Clang][AVX512][BUILTIN] Adding intrinsics for VSCATTERPF{1|0}{DPS|QPS|DPD|QPD} instruction set
Differential Revision: http://reviews.llvm.org/D19313

llvm-svn: 267398
2016-04-25 13:01:40 +00:00
Michael Zuckerman 8938e836c4 [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW instruction set
Differential Revision: http://reviews.llvm.org/D19195

llvm-svn: 267380
2016-04-25 05:32:35 +00:00
Duncan P. N. Exon Smith 383f8413cf DebugInfo: Adapt to loss of DITypeRef in LLVM r267296
LLVM stopped using MDString-based type references, and DIBuilder no
longer fills 'retainedTypes:' with every DICompositeType that has an
'identifier:' field.   There are just minor changes to keep the same
behaviour in CFE.

Leaving 'retainedTypes:' unfilled has a dramatic impact on the output
order of the IR though.  There are a huge number of testcase changes,
which were unfortunately not really scriptable.

llvm-svn: 267297
2016-04-23 21:08:27 +00:00
Krzysztof Parzyszek 4dde0e352a [Hexagon] Add definitions for circular and bit-reverse loads/stores
llvm-svn: 267159
2016-04-22 14:58:46 +00:00
Michael Zuckerman 743d68c3cb [clang][AVX512][Builtin] adding intrinsics for vf{n}madd{ss|sd} and vf{n}sub{ss|sd} instruction set
Differential Revision: http://reviews.llvm.org/D19320

llvm-svn: 267135
2016-04-22 10:56:24 +00:00
Michael Zuckerman a1ceca20b6 [Clang][AVX512][BUILTIN] Adding scalar intrinsics for rsqrt14 ,rcp14, getexp and getmant instruction set
Differential Revision: http://reviews.llvm.org/D19326

llvm-svn: 267129
2016-04-22 10:06:10 +00:00
Renato Golin 1f04213e98 [x86] Force mixes asm syntax test to check for x86
llvm-svn: 266993
2016-04-21 14:40:06 +00:00
Michael Zuckerman 4fa96af4db [Clang][AVX512][BuiltIn] Adding intrinsics of VGATHER{DPS|DPD} , VPGATHER{QD|QQ|DD|DQ} and VGATHERPF{0|1}{DPS|QPS|DPD|QPD} instruction set .
Differential Revision: http://reviews.llvm.org/D19224

llvm-svn: 266983
2016-04-21 12:47:27 +00:00
Denis Zobnin 628b022a0e Correctly parse GCC-style asm line following MS-style asm line.
Quit parsing MS-style inline assembly if the following statement has GCC style.
Enables compilation of code like

void f() {
  __asm mov ebx, ecx
  __asm__("movl %ecx, %edx");
}

Differential Revision: http://reviews.llvm.org/D18652

llvm-svn: 266976
2016-04-21 10:59:18 +00:00
Mandeep Singh Grang d9d3b21c32 [Clang] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
Summary:
    Removed unwanted --check-prefix=CHECK from the following unit tests:
      test/CXX/special/class.copy/implicit-move-def.cpp
      test/CodeGen/cleanup-destslot-simple.c
      test/CodeGen/inline-asm-immediate-ubsan.c
      test/CodeGen/mips-interrupt-attr.c
      test/CodeGenCXX/cfi-stats.cpp
      test/CodeGenCXX/copy-constructor-elim.cpp
      test/CodeGenCXX/microsoft-templ-uuidof.cpp
      test/CodeGenCXX/vtable-linkage.cpp
      test/CodeGenObjC/messages-2.m
      test/Driver/noinline.c
      test/Index/remap-load.c
      test/Index/retain-comments-from-system-headers.c
      test/OpenMP/task_if_codegen.cpp
      test/Preprocessor/comment_save_macro.c

Patch by:  Mandeep Singh Grang (mgrang)

Reviewers: rafael, ABataev, rengolin

Projects: #clang-c

Differential Revision: http://reviews.llvm.org/D19232

llvm-svn: 266843
2016-04-20 01:02:18 +00:00
Marcin Koscielnicki 4005070e1b [AArch64] Fix D19098 fallout.
The intrinsic is now called llvm.thread.pointer, not
llvm.aarch64.thread.pointer.  Also, the code handling it in CGBuiltin.cpp
is dead - it's already covered by GCCBuiltin.  Remove it.

Differential Revision: http://reviews.llvm.org/D19099

llvm-svn: 266817
2016-04-19 20:51:00 +00:00
Ahmed Bougacha 1d9de10130 [ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.
r259537 added vfma/vfms to armv7, but the builtin was only lowered
on the AArch64 side. Instead of supporting it on ARM, get rid of it.

The vfms builtin lowered to:
  %nb = fsub float -0.0, %b
  %r = @llvm.fma.f32(%a, %nb, %c)

Instead, define the operation in terms of vfma, and swap the
multiplicands. It now lowers to:
  %na = fsub float -0.0, %a
  %r = @llvm.fma.f32(%na, %b, %c)

This matches the instruction more closely, and lets current LLVM
generate the "natural" operand ordering:
  fmls.2s v0, v1, v2
instead of the crooked (but equivalent):
  fmls.2s v0, v2, v1
Except for theses changes, assembly is identical.

LLVM accepts both commutations, and the LLVM tests in:
  test/CodeGen/AArch64/arm64-fmadd.ll
  test/CodeGen/AArch64/fp-dp3.ll
  test/CodeGen/AArch64/neon-fma.ll
  test/CodeGen/ARM/fusedMAC.ll
already check either the new one only, or both.

Also verified against the test-suite unittests.

llvm-svn: 266807
2016-04-19 19:44:45 +00:00
Sanjay Patel 461f2ff445 [builtin_expect] tighten checks, add test, add comments
llvm-svn: 266788
2016-04-19 18:17:34 +00:00
Ahmed Bougacha 40a34c2e2a [CodeGen] Widen non-power-of-2 vector HFA base types.
Currently, for the ppc64--gnu and aarch64 ABIs, we recognize:
  typedef __attribute__((__ext_vector_type__(3))) float v3f32;
  typedef __attribute__((__ext_vector_type__(16))) char v16i8;
  struct HFA {
    v3f32 a;
    v16i8 b;
  };

as an HFA. Since the first type encountered is used as the base type,
we pass the HFA as:
    [2 x <3 x float>]
Which leads to incorrect IR (relying on padding values) when the
second field is used.

Instead, explicitly widen the vector (after size rounding) in
isHomogeneousAggregate.

Differential Revision: http://reviews.llvm.org/D18998

llvm-svn: 266784
2016-04-19 17:54:29 +00:00
Michael Zuckerman 6fa512cecf [Clang][Builtin][AVX512] Adding intrinsics for VGETMANT{PD|PS} and VGETEXP{PD|PS} instruction set
Differential Revision: http://reviews.llvm.org/D19197

llvm-svn: 266763
2016-04-19 17:10:29 +00:00
Michael Zuckerman ef2979af50 [Clang][AVX512][BUILTIN] Adding intrinsics support to VEXTRACT{I|F} and VINSERT{I|F} instruction set
Differential Revision: http://reviews.llvm.org/D19097

llvm-svn: 266745
2016-04-19 15:18:23 +00:00
Krzysztof Parzyszek e2bd2dcc9d [Hexagon] V60/HVX builtin definitions for clang
The builtins already exist in LLVM, but are not exposed to the C/C++
programmers. This patch adds all the information about the builtins
needed for clang, as well as a test for all available intrinsics.

llvm-svn: 266671
2016-04-18 21:27:59 +00:00
Adrian Prantl 80578e7ef0 Update testcase to new debug info metadata format.
llvm-svn: 266447
2016-04-15 16:05:13 +00:00
Adrian Prantl e76bda544b Update to match LLVM changes for PR27284.
(Reverse the ownership between DICompileUnit and DISubprogram.)

http://reviews.llvm.org/D19034
<rdar://problem/25256815>

llvm-svn: 266445
2016-04-15 15:55:45 +00:00
Reid Kleckner e1a16467a3 In vector comparisons, handle scalar LHS just as we handle scalar RHS
Summary: Fixes PR27258

Reviewers: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19123

llvm-svn: 266366
2016-04-14 21:03:38 +00:00
Michael Zuckerman 0a3508a8d3 [Clang][AVX512][BUILTIN] Adding support for intrinsics of vpmov{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19055

llvm-svn: 266280
2016-04-14 07:56:51 +00:00
Michael Zuckerman d871531687 [Clang][AVX512][Builtin] Adding intrinsics of vpmovus{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19050

llvm-svn: 266278
2016-04-14 06:48:09 +00:00
Michael Zuckerman e1680617b0 [Clang][AVX512][Builtin] Adding support to intrinsics of pmovs{d|q}{b|w|d}{128|256|512} instruction set
Differential Revision: http://reviews.llvm.org/D19023

llvm-svn: 266202
2016-04-13 15:02:04 +00:00
Michael Zuckerman c2b6128a8f [Clang][AVX512][Builtin] Adding support for VBROADCAST and VPBROADCASTB/W/D/Q instruction set
Differential Revision: http://reviews.llvm.org/D19012

llvm-svn: 266195
2016-04-13 12:58:01 +00:00
Michael Zuckerman 074edd7c1e [Clang][AVX512][Builtin] Adding supporting to intrinsics of cvt{b|d|q}2mask{128|256|512} and cvtmask2{b|d|q}{128|256|512} instruction set.
Differential Revision: http://reviews.llvm.org/D19009

llvm-svn: 266188
2016-04-13 10:49:37 +00:00
Chuang-Yu Cheng 8eac7ae9ad [PPC64][VSX] Add a couple of new data types for vec_vsx_ld and vec_vsx_st intrinsics and fix incorrect testcases with minor refactoring
New added data types:
  vector double vec_vsx_ld (int, const double *);
  vector float vec_vsx_ld (int, const float *);
  vector bool short vec_vsx_ld (int, const vector bool short *);
  vector bool int vec_vsx_ld (int, const vector bool int *);
  vector signed int vec_vsx_ld (int, const signed int *);
  vector unsigned int vec_vsx_ld (int, const unsigned int *);

  void vec_vsx_st (vector double, int, double *);
  void vec_vsx_st (vector float, int, float *);
  void vec_vsx_st (vector bool short, int, vector bool short *);
  void vec_vsx_st (vector bool short, int, signed short *);
  void vec_vsx_st (vector bool short, int, unsigned short *);
  void vec_vsx_st (vector bool int, int, vector bool int *);
  void vec_vsx_st (vector bool int, int, signed int *);
  void vec_vsx_st (vector bool int, int, unsigned int *);

Also fix testcases which use non-vector argument version of vec_vsx_ld or
vec_vsx_st, but pass incorrect parameter.

llvm-svn: 266166
2016-04-13 05:16:31 +00:00
Eric Christopher d5c75eed44 Add a couple of missing vsx load and store intrinsics.
Patch by Jing Yu!

llvm-svn: 266122
2016-04-12 21:08:54 +00:00
Evgeniy Stepanov b0c887762a Stricter checks in the stack-protector codegen test.
llvm-svn: 266095
2016-04-12 17:51:59 +00:00
Michael Zuckerman 04fb3bc682 [Clang][BuiltIn][avx512] Adding avx512 (shuf,sqrt{ss|sd},rsqrt ) builtin to clang
llvm-svn: 266048
2016-04-12 07:59:39 +00:00
Evgeniy Stepanov 368d3074ba Allow simultaneous safestack and stackprotector attributes.
This is the clang part of http://reviews.llvm.org/D18846.
SafeStack instrumentation pass adds stack protector canaries if both
attributes are present on a function. StackProtector pass will step
back if the function has a safestack attribute.

llvm-svn: 266005
2016-04-11 22:27:55 +00:00
Michael Zuckerman 81f468c859 [Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18926

llvm-svn: 265964
2016-04-11 17:04:21 +00:00
Michael Zuckerman 6b5f4d8ad1 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 265952
2016-04-11 15:46:39 +00:00
Michael Zuckerman 1af947a7b3 [Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18929

llvm-svn: 265935
2016-04-11 12:32:31 +00:00
Michael Zuckerman 07525091e6 [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18924

llvm-svn: 265928
2016-04-11 10:22:07 +00:00
Dmitry Polukhin 85eda12d09 [GCC] Attribute ifunc support in clang
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. LLVM
patch http://reviews.llvm.org/D15525

Differential Revision: http://reviews.llvm.org/D15524

llvm-svn: 265917
2016-04-11 07:48:59 +00:00
Michael Zuckerman d8d2f62107 [Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang.
Differential Revision: http://reviews.llvm.org/D18933

llvm-svn: 265915
2016-04-11 07:15:34 +00:00
Michael Zuckerman 8d16199b7b [Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18932

llvm-svn: 265904
2016-04-10 17:24:03 +00:00
Michael Zuckerman cdd54c83d8 Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18931

llvm-svn: 265896
2016-04-10 12:54:23 +00:00
Michael Zuckerman fa7ccc5bcf [Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18925

llvm-svn: 265895
2016-04-10 10:51:04 +00:00
Sanjay Patel ae7a9df7bf make __builtin_isfinite more efficient (PR27145)
isinf (is infinite) and isfinite should be implemented with the same function
except we change the comparison operator.

See PR27145 for more details:
https://llvm.org/bugs/show_bug.cgi?id=27145

Ref: forked off of the discussion in D18513.

Differential Revision: http://reviews.llvm.org/D18648

llvm-svn: 265675
2016-04-07 14:29:05 +00:00
Tim Northover 1390b4479e Restore slightly less dodgy diagnostic handler for inline asm
Turns out it was there mostly to prevent Clang asking people to report a bug.
This time we report something to Clang's real diagnostics handler so that it
exits with something approximating a real error and tidies up after itself.

llvm-svn: 265592
2016-04-06 19:58:07 +00:00
Manman Ren 29be7e10ca Update testing cases after backend changes.
llvm-svn: 265488
2016-04-05 23:27:51 +00:00
Nirav Dave e585b5c52b Fix broken tests from no-jump-table commit
Summary: Fix failing tests from no-jump-table flag addition

Reviewers: jyknight

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18801

llvm-svn: 265439
2016-04-05 18:59:37 +00:00
Nirav Dave d2f44d8de0 Add -fno-jump-tables and-fjump-tables flags
Add no-jump-tables flag to disable use of jump tables when lowering
switch statements

Reviewers: echristo, hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18407

llvm-svn: 265425
2016-04-05 17:50:43 +00:00
Andrey Turetskiy fd259ff9c4 [X86] Introduction of -march=lakemont.
Differential Revision: http://reviews.llvm.org/D18651

llvm-svn: 265405
2016-04-05 15:04:26 +00:00
Reid Kleckner 2ed6beac71 Fix test failure from r265361
llvm-svn: 265362
2016-04-04 23:14:14 +00:00
John McCall 8cde42c400 Fix an unused-variable warning by using the variable in the place
it was supposed to have been used.

llvm-svn: 265344
2016-04-04 20:39:50 +00:00
John McCall 12f2352152 IRGen-level lowering for the Swift calling convention.
llvm-svn: 265324
2016-04-04 18:33:08 +00:00
Tim Northover 8c824a07ae Diagnostics: remove dodgy handler for bitcode inlineasm diagnostics.
Whatever crash it was there to present appears to have been fixed in the
backend now, and it had the nasty side-effect of causing clang to exit(0) and
leave a .o containing goodness knows what even when an error hit.

llvm-svn: 265038
2016-03-31 19:19:24 +00:00
Jonas Paulsson 3ace74a414 [SystemZ] Specify required features for builtins.
BuiltinsSystemZ.def is extended to include the required processor
features per intrinsic.

New test test/CodeGen/builtins-systemz-error2.c that checks for
expected errors when instrinsics are used with a subtarget that does
not support the required feature (e.g. vector support).

Reviewed by Ulrich Weigand.

llvm-svn: 264873
2016-03-30 15:51:24 +00:00
Teresa Johnson 0c7bb96533 Prepare tests for change to emit Module SourceFileName to LLVM assembly
Modify these tests to ignore the source file name when looking for the
expected string. It was already catching the source file name once via
the ModuleID, and will catch it another time with an impending change to
LLVM to serialize out the module's SourceFileName.

llvm-svn: 264868
2016-03-30 13:59:49 +00:00
Yunzhong Gao 333e69d70f Fixing PR26558: remove the adx target attribute requirement from adc builtins.
The addcarry and subborrow variants of the builtins do not require the adx
target attribute; only the addcarryx variants require them.

Differential Revision: http://reviews.llvm.org/D18533

llvm-svn: 264801
2016-03-29 22:59:20 +00:00
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
2016-03-29 12:46:16 +00:00
Jacques Pienaar d964cc22d1 [lanai] Add Lanai backend to clang driver.
Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002

llvm-svn: 264655
2016-03-28 21:02:54 +00:00
Michael Zuckerman def78750b7 [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}
getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang


Differential Revision: http://reviews.llvm.org/D18215

llvm-svn: 264574
2016-03-28 12:23:09 +00:00
Eric Christopher 4650272310 The time when -faltivec (or, on clang only, -maltivec) will magically
include altivec.h has come and gone.

Rationale: This causes modules, rewrite-includes, etc to be sad and
people should just include altivec.h in their source.

llvm-svn: 264235
2016-03-24 01:26:08 +00:00
Matt Arsenault 08087c52eb Add missing __builtin_bitreverse8
Also add documentation for bitreverse builtins

llvm-svn: 264203
2016-03-23 22:14:43 +00:00
Andrey Turetskiy 5f1cf5fa66 [X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980

llvm-svn: 264149
2016-03-23 11:15:10 +00:00
George Burgess IV 6da4c20f7d [Sema] Allow implicit conversions of &overloaded_fn in C.
Also includes a minor ``enable_if`` docs update.

Currently, our address-of overload machinery will only allow implicit
conversions of overloaded functions to void* in C. For example:

```
void f(int) __attribute__((overloadable));
void f(double) __attribute__((overloadable, enable_if(0, "")));

void *fp = f; // OK. This is C and the target is void*.
void (*fp2)(void) = f; // Error. This is C, but the target isn't void*.
```

This patch makes the assignment of `fp2` select the `f(int)` overload,
rather than emitting an error (N.B. you'll still get a warning about the
`fp2` assignment if you use -Wincompatible-pointer-types).

Differential Revision: http://reviews.llvm.org/D13704

llvm-svn: 264132
2016-03-23 02:33:58 +00:00
Justin Lebar 717d2b0a0d [CUDA] Implement atomicInc and atomicDec builtins
These functions cannot be implemented as atomicrmw or cmpxchg
instructions, so they are implemented as a call to the NVVM intrinsics
@llvm.nvvm.atomic.load.inc.32.p0i32 and
@llvm.nvvm.atomic.load.dec.32.p0i32.

Patch by Jason Henline.

Reviewers: jlebar

Differential Revision: http://reviews.llvm.org/D18322

llvm-svn: 264009
2016-03-22 00:09:28 +00:00
Renato Golin 930de67e6a [ARM] Clang tests for ARM Cortex-A32 support
Patch by Sam Parker.

llvm-svn: 263957
2016-03-21 17:29:51 +00:00
Pirama Arumuga Nainar 8e2e9d6f4c Add -fnative-half-arguments-and-returns
Summary:
r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
handling for OpenCL.  Simlar to OpenCL, RenderScript also handles __fp16
type natively.

This patch adds the -fnative-half-arguments-and-returns command line
flag to allow such languages to skip this coercion of __fp16.

Reviewers: srhines, olista01

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18138

llvm-svn: 263795
2016-03-18 16:58:36 +00:00
Roman Levenstein 35aa5cecf2 Add attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end
Till now, preserve_mostcc/preserve_allcc calling convention attributes were only
available at the LLVM IR level. This patch adds attributes for
preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end.

The code was mostly written by Juergen Ributzka.
I just added support for the AArch64 target and tests.

Differential Revision: http://reviews.llvm.org/D18025

llvm-svn: 263647
2016-03-16 18:00:46 +00:00
Pablo Barrio 2a35ff0687 Add more ARM Cortex-R8 regression tests to Clang.
Summary:
This patch adds Clang tests for Cortex-R8 related to FP capabilities and
hardware integer divide.

Reviewers: rengolin, bsmith

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D18193

llvm-svn: 263632
2016-03-16 10:21:04 +00:00
Marina Yatsina d6d8b315d3 Avoid using LookupResult's implicit copy ctor and assignment operator to avoid warnings
The purpose of this patch is to keep the same functionality without using LookupResult's implicit copy ctor and assignment operator, because they cause warnings when -Wdeprecated is passed.
This patch is meant to help the following review: http://reviews.llvm.org/D18123.
The functionality is covered by the tests in my original commit (255890)
The test case in this patch was added to test a bug caught in the review of the first version of this fix.

Differential Revision: http://reviews.llvm.org/D18175

llvm-svn: 263630
2016-03-16 09:56:58 +00:00
Evgeniy Stepanov 02279ed12d [cfi] Don't emit checks for disabled CFI kinds.
In the cross-DSO CFI mode clang emits __cfi_check_fail that handles
errors triggered from other modules with targets in the current
module. With this change, __cfi_check_fail will handle errors for
CFI kinds that are not enabled in the current module as if they
have the trapping behaviour (-fsanitize-trap=...).

This fixes a bug where some combinations of -fsanitize* flags may
result in a link failure due to a missing sanitizer runtime library
for the diagnostic calls in __cfi_check_fail.

llvm-svn: 263578
2016-03-15 20:19:29 +00:00
Mehdi Amini 557c20a886 Remove compile time PreserveName in favor of a runtime cc1 -discard-value-names option
Summary:
This flag is enabled by default in the driver when NDEBUG is set. It
is forwarded on the LLVMContext to discard all value names (but
GlobalValue) for performance purpose.

This an improved version of D18024

Reviewers: echristo, chandlerc

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18127

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 263394
2016-03-13 21:05:23 +00:00
Amjad Aboud 13d7a70657 Added test that covers changes in r263379.
llvm-svn: 263380
2016-03-13 11:12:57 +00:00
Reid Kleckner e10b601537 [SEH] Remove nounwind/noinline from outlined finally funclets
With the new EH representation this is no longer necessary.

llvm-svn: 263269
2016-03-11 17:36:16 +00:00
Nico Weber 416ad130ea Reenable asm-errors.c
r134811 made the test pass and reenabled it, but r134831
accidentally disabled it again due to a bad merge.

llvm-svn: 263168
2016-03-10 22:40:02 +00:00
Simon Pilgrim 05e07836c8 Updated SSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263117
2016-03-10 14:46:49 +00:00
Simon Pilgrim 99665cb77f Added note to SSE4a builtins about keeping in sync with llvm tests
llvm-svn: 263116
2016-03-10 14:44:32 +00:00
Simon Pilgrim baed60dd0a Updated SSSE3 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 263115
2016-03-10 14:42:17 +00:00
Tim Northover e5dc94ee31 ARM: fix arm_neon_intrinsics.c and re-enable.
It turns out I'd never actually tested my recent change because it was
gated on long-tests. Failure ensued.

llvm-svn: 263093
2016-03-10 04:39:45 +00:00
Richard Trieu 9402d58e5b Disable failing test and fix RUN line.
See https://llvm.org/bugs/show_bug.cgi?id=26894 for details.  This change
fixes the incorrect flags to Clang and the piping issue.  It also disables
the FileCheck portion of the test, which is currently failing.

llvm-svn: 263091
2016-03-10 04:04:12 +00:00
Tim Northover 67181e3c3a ARM & AArch64: fix IR-converted tests.
My script was converting %a0 to [[A]]0 if it had seen %a defined before %a0.
Oops.

llvm-svn: 263056
2016-03-09 20:06:10 +00:00
Kit Barton fbab158767 [PPC] FE support for generating VSX [negated] absolute value instructions
Includes new built-in, conversion of built-in to target-independent intrinsic
and update in the header file. Tests are also updated. There is a second part in
the backend for which I will post a separate code-review. BACKEND PART SHOULD BE
COMMITTED FIRST.

Phabricator: http://reviews.llvm.org/D17816
llvm-svn: 263051
2016-03-09 19:28:31 +00:00
Tim Northover 58672974a9 ARM & AArch64: convert asm tests to LLVM IR and restrict optimizations.
This is mostly a one-time autoconversion of tests that checked assembly after
"-Owhatever" compiles to only run "opt -mem2reg" and check the assembly. This
should make them much more stable to changes in LLVM so they won't break on
unrelated changes.

"opt -mem2reg" is a compromise designed to increase the readability of tests
that check dataflow, while minimizing dependency on LLVM. Hopefully mem2reg is
stable enough that no surpises will come along.

Should address http://llvm.org/PR26815.

llvm-svn: 263048
2016-03-09 18:54:42 +00:00
Tim Northover 6b582867ad AArch64: remove a couple more tests already covered elsewhere.
llvm-svn: 263038
2016-03-09 18:00:06 +00:00
Tim Northover f53713769d AArch64: remove tests of intrinsics completely duplicated elsewhere.
llvm-svn: 262964
2016-03-08 23:10:58 +00:00
Michael Zuckerman e71d59fc4f [CLANG][AVX512][BUILTIN] Add builtin vcomi{ss|sd}
Differential Revision: http://reviews.llvm.org/D17919

llvm-svn: 262847
2016-03-07 19:15:00 +00:00
Marina Yatsina 5f77679356 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the clang part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17766

llvm-svn: 262842
2016-03-07 18:10:25 +00:00
Joerg Sonnenberger d0be8dcbf8 Implement __builtin_eh_return_data_regno for SPARC and SPARC64.
llvm-svn: 262838
2016-03-07 17:19:15 +00:00
Michael Zuckerman 9f33848f04 [CLANG][AVX512][BUILTIN] Adding new feature flag headed files and new BUILTIN vpermi2varq{i|t}{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17917

llvm-svn: 262834
2016-03-07 17:04:11 +00:00
Amjad Aboud faea560286 Resolved Bug 26414.
https://llvm.org/bugs/show_bug.cgi?id=26414
Since interrupt handler must be returned with iret, tail call can't be used.

Differential Revision: http://reviews.llvm.org/D17853

llvm-svn: 262830
2016-03-07 14:22:46 +00:00
Michael Zuckerman 0190c65571 [CLANG][AVX512][BUILTIN] Adding new feature flag header file and new builtin vpmadd52{h|l}uq{128|256|512}{mask|maskz}
Differential Revision: http://reviews.llvm.org/D17915

llvm-svn: 262820
2016-03-07 09:55:55 +00:00
Michael Zuckerman 912be16a0e [CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}
Differential Revision: http://reviews.llvm.org/D17914

llvm-svn: 262817
2016-03-07 08:29:10 +00:00
David Majnemer e2ae228c76 [X86] Pass __m64 types via SSE registers for GCC compatibility
For compatibility with GCC, classify __m64 as SSE.
However, clang is a platform compiler for certain targets; retain our
old behavior on those targets: classify __m64 as integer.

This fixes PR26832.

llvm-svn: 262688
2016-03-04 05:26:16 +00:00
Michael Zuckerman 0d67e4b5d6 [CLANG][AVX512][BUILTIN] movddup{128|256|512}
Differential Revision: http://reviews.llvm.org/D17826

llvm-svn: 262617
2016-03-03 13:43:05 +00:00
Anastasia Stulova 1f95cc097c [OpenCL] Apply missing restrictions for Blocks in OpenCL v2.0
Applying the following restrictions for block types in OpenCL (v2.0 s6.12.5):
 - __block storage class is disallowed
 - every block declaration must be const qualified and initialized
 - a block can't be used as a return type of a function
 - a blocks can't be used to declare a structure or union field
 - extern speficier is disallowed

Corrected image and sampler types diagnostics with struct and unions.

Review: http://reviews.llvm.org/D16928
llvm-svn: 262616
2016-03-03 13:33:19 +00:00
Michael Zuckerman 56de012b41 Fixing a checkfile error in avx512vlbw-builtins.c
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262611
2016-03-03 12:17:50 +00:00
Michael Zuckerman 1ad03e7f01 [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512}
Differential Revision: http://reviews.llvm.org/D17814

llvm-svn: 262609
2016-03-03 11:34:52 +00:00
Michael Zuckerman ffbb67a8e2 [CLANG][AVX512][BUILTIN] movdqa{32|64}{load|store|}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17812

llvm-svn: 262598
2016-03-03 09:26:01 +00:00
Michael Zuckerman abbe34bce6 [Clang][AVX512][BUILTIN] Adding PSRL{W|WI}{128|256|512}
Differential Revision: http://reviews.llvm.org/D17754

llvm-svn: 262593
2016-03-03 08:55:20 +00:00
Rong Xu 9c6f1538cc [PGO] Change profile use cc1 option to handle IR level profiles
This patch changes cc1 option for PGO profile use from
-fprofile-instr-use=<path> to -fprofile-instrument-use-path=<path>.
-fprofile-instr-use=<path> is now a driver only option.

In addition to decouple the cc1 option from the driver level option, this patch
also enables IR level profile use. cc1 option handling now reads the profile
header and sets CodeGenOpt ProfileUse (valid values are {None, Clang, LLVM}
-- this is a common enum for -fprofile-instrument={}, for the profile
instrumentation), and invoke the pipeline to enable the respective PGO use pass.

Reviewers: silvas, davidxl

Differential Revision: http://reviews.llvm.org/D17737

llvm-svn: 262515
2016-03-02 20:59:36 +00:00
Michael Zuckerman 3df95e711f [CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.
Differential Revision: http://reviews.llvm.org/D17706

llvm-svn: 262481
2016-03-02 12:06:06 +00:00
Michael Zuckerman d15c95a793 [CLANG] [AVX512] [BUILTIN] Adding PSRAV
Differential Revision: http://reviews.llvm.org/D17699

llvm-svn: 262471
2016-03-02 09:05:46 +00:00
Simon Pilgrim 2e6a9a290b Updated SSE41 builtin tests to more closely match the llvm fast-isel equivalent tests
llvm-svn: 262418
2016-03-01 22:38:33 +00:00
David Majnemer 25eb165f18 [MSVC Compat] Correctly handle finallys nested within finallys
We'd lose track of the parent CodeGenFunction, leading us to get
confused with regard to which function a nested finally belonged to.

Differential Revision: http://reviews.llvm.org/D17752

llvm-svn: 262379
2016-03-01 19:42:53 +00:00
Kit Barton 2b36b15834 [PPC64][VSX] Add short, char, and bool data type for vec_vsx_ld and vec_vsx_st intrinsics
Issue: https://llvm.org/bugs/show_bug.cgi?id=26720

Fix compile error when building ffmpeg for PowerPC64LE because of some
vec_vsx_ld/vec_vsx_st intrinsics are not supported by current clang.

New added intrinsics:

(vector) {signed|unsigned} {short|char} vec_vsx_ld: (total: 8)
bool vec_vsx_ld: (total: 1)
(vector) {signed|unsigned} {short|char} vec_vsx_st: (total: 8)
bool vec_vsx_st: (total: 1)
Total: 18 intrinsics

Phabricator: http://reviews.llvm.org/D17637
llvm-svn: 262359
2016-03-01 18:11:28 +00:00
Michael Zuckerman d176d744af [CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17714

llvm-svn: 262355
2016-03-01 17:49:03 +00:00
Michael Zuckerman 0165e7669c [CLANG][AVX512][BUILTIN] Adding PSRLV builtin
Differential Revision: http://reviews.llvm.org/D17718

llvm-svn: 262326
2016-03-01 13:03:45 +00:00
Michael Zuckerman 1ac360cca4 [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693

llvm-svn: 262321
2016-03-01 11:38:16 +00:00
Rong Xu 522b5cb375 [PGO] clang cc1 option change to enable IR level instrumentation
This patch expands cc1 option -fprofile-instrument= with a new value: -fprofile-instrument=llvm
which enables IR level PGO instrumentation.

Reviewers: davidxl, silvas

Differential Revision: http://reviews.llvm.org/D17622

llvm-svn: 262239
2016-02-29 18:54:59 +00:00
Craig Topper b4f83a00a9 [X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi.
llvm-svn: 262201
2016-02-29 06:51:38 +00:00
Michael Zuckerman 431b0e18b4 [CLANG] [AVX512] [BUILTIN] Adding PSLL{V|W|Wi}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17685

llvm-svn: 262177
2016-02-28 07:39:34 +00:00
Matt Arsenault 2d9339890f Add __builtin_canonicalize
llvm-svn: 262122
2016-02-27 09:06:18 +00:00
Paul Robinson 65ab102be3 Fix Clang tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
FileCheck actually doesn't support combo suffixes.

Differential Revision: http://reviews.llvm.org/D17589

llvm-svn: 262052
2016-02-26 19:34:01 +00:00
Bob Wilson e7e7c98f0b Fix typo in test/CodeGen/object-size.c CHECK line.
llvm-svn: 261762
2016-02-24 18:38:35 +00:00
Michael Zuckerman 6c317515e4 [CLANG] [AVX512] [BUILTIN] Adding PSHUF{L|H}W{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D17539

llvm-svn: 261755
2016-02-24 17:39:35 +00:00
James Y Knight 29b5f086ca Default vaarg lowering should support indirect struct types.
Fixes PR11517 for SPARC.

On most targets, clang lowers va_arg itself, eschewing the use of the
llvm vaarg instruction. This is necessary (at least for now) as the type
argument to the vaarg instruction cannot represent all the ABI
information that is needed to support complex calling conventions.

However, on targets with a simpler varrags ABIs, the LLVM instruction
can work just fine, and clang can simply lower to it. Unfortunately,
even on such targets, vaarg with a struct argument would fail, because
the default lowering to vaarg was naive: it didn't take into account the
ABI attribute computed by classifyArgumentType. In particular, for the
DefaultABIInfo, structs are supposed to be passed indirectly and so
llvm's vaarg instruction should be emitted with a pointer argument.

Now, vaarg instruction emission is able to use computed ABIArgInfo for
the provided argument type, which allows the default ABI support to work
for structs too.

I haven't touched the EmitVAArg implementation for PPC32_SVR4 or XCore,
although I believe both are now redundant, and could be switched over to
use the default implementation as well.

Differential Revision: http://reviews.llvm.org/D16154

llvm-svn: 261717
2016-02-24 02:59:33 +00:00
Michael Zuckerman e98cc7477f [CLANG] [AVX512] [BUILTIN] Adding prorv{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17512

llvm-svn: 261641
2016-02-23 15:59:47 +00:00
Michael Zuckerman 0231f1649b [CLANG] [AVX512] [BUILTIN] Adding pro{lv|r}{d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D17506

llvm-svn: 261635
2016-02-23 13:41:13 +00:00
Marina Yatsina 146d2ec06d [ms-inline-asm] Fixing bug in single asm statement support
Fixing a crash caused by trying to merge a single-line asm statement with an asm block that follows it, e.g:
asm int 4
asm {
  int 5
}

Now, only adjacent single-line asm statements that are not surrounded by braces will be merged into one asm call.

Differential Revision: http://reviews.llvm.org/D17496

llvm-svn: 261618
2016-02-23 08:53:45 +00:00
Dan Gohman 1fcd10ca4e [WebAssembly] Lower va_arg in clang.
This uses the general emitVoidPtrVAArg lowering logic for everything, since
this supports all types, and we don't have any special requirements.

llvm-svn: 261557
2016-02-22 19:17:40 +00:00
Nirav Dave 9a8f97e967 Add support for Android Vector calling convention for AArch64
This modification applies the following Android commit when we have an
Android environment. This is the sole non-renderscript in the Android repo

	commit 9212d4fb30a3ca2f4ee966dd2748c35573d9682c
	Author: Tim Murray <timmurray@google.com>
	Date:   Fri Aug 15 16:00:15 2014 -0700

	    Update vector calling convention for AArch64.

	    bug 16846318

	    Change-Id: I3cfd167758b4bd634d8480ee6ba6bb55d61f82a7

Reviewers: srhines, jyknight

Subscribers: mcrosier, aemerson, rengolin, tberghammer, danalbert, srhines

Differential Revision: http://reviews.llvm.org/D17448

llvm-svn: 261533
2016-02-22 16:48:42 +00:00
Michael Zuckerman 38a2727764 [CLANG] [AVX512] [BUILTIN] Adding prol{d|q|w}{128|256|512} builtin to clang .
Differential Revision: http://reviews.llvm.org/D16985

llvm-svn: 261516
2016-02-22 09:05:41 +00:00
Michael Zuckerman 7a33dce4ef [CLANG] [AVX512] [BUILTIN] Adding pmovzx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16961

llvm-svn: 261471
2016-02-21 14:00:11 +00:00
David Majnemer 4ff6f7362b Remove -fnew-ms-eh
This flag no longer controls any behavior inside of clang.

llvm-svn: 261423
2016-02-20 09:23:41 +00:00
Roman Divacky 039b970c97 Fix handling of vaargs on PPC32 when going from regsave to overflow.
It can happen that when we only have 1 more register left in the regsave
area we need to store a value bigger than 1 register and therefore we
go to the overflow area. In this case we have to leave the last slot
in the regsave area unused and keep using overflow area. Do this
by storing a limit value to the used register counter in the overflow block.

Issue diagnosed by and solution tested by Mark Millard!

llvm-svn: 261422
2016-02-20 08:31:24 +00:00
JF Bastien ddb4369ead Add test.
llvm-svn: 261310
2016-02-19 06:54:47 +00:00
Krzysztof Parzyszek da3f20e88e Missed a spot in r261251, also ignore attributes on all pointer parameters
llvm-svn: 261253
2016-02-18 20:30:40 +00:00
Krzysztof Parzyszek 6b2608f2e0 Make test less prone to attribute changes
llvm-svn: 261251
2016-02-18 20:02:03 +00:00
Michael Zuckerman 7cdb72f7ea [CLANG] [AVX512] [BUILTIN] Adding pmovsx{b|d|w}{w|d|q}{128|256|512} builtin to clang
Differential Revision: http://reviews.llvm.org/D16955

llvm-svn: 261196
2016-02-18 09:09:34 +00:00
Krzysztof Parzyszek 8e57697cfd [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260680
2016-02-12 14:48:34 +00:00
Manman Ren 37dec10dbc [PR26550] Use a different TBAA root for C++ vs C.
This commit changes the root from "Simple C/C++ TBAA" to "Simple C++ TBAA" for
C++.

The problem is that the type name in the TBAA nodes is generated differently
for C vs C++. If we link an IR file for C with an IR file for C++, since they
have the same root and the type names are different, accesses to the two type
nodes will be considered no-alias, even though the two type nodes are from
the same type in a header file.

The fix is to use different roots for C and C++. Types from C will be treated
conservatively in respect to types from C++.

Follow-up commits will change the C root to "Simple C TBAA" plus some mangling
change for C types to make it a little more aggresive.

llvm-svn: 260567
2016-02-11 19:19:18 +00:00
Denis Zobnin 380b224359 [MCU] Fix assertion failure on function returning empty union.
Treat empty struct/union in return type as void for MCU ABI. PR26438.

Differential Revision: http://reviews.llvm.org/D16808

llvm-svn: 260510
2016-02-11 11:26:03 +00:00
Andrey Turetskiy db6655fd90 [X86] Fix stack alignment for MCU target (Clang part), by Anton Nadolskiy.
This patch fixes stack alignments for MCU (should be aligned to 4 bytes).

Differential Revision: http://reviews.llvm.org/D15647

llvm-svn: 260376
2016-02-10 11:58:46 +00:00
Denis Zobnin f49c0f83aa Fix assertion "Chunk.Kind == DeclaratorChunk::Function" with attributed type.
This patch is to upgrade FunctionTypeUnwrapper for correct processing of
AttributedType. Fixes PR25786.
Patch by Alexander Makarov.

Differential Revision: http://reviews.llvm.org/D15373

llvm-svn: 260373
2016-02-10 11:23:48 +00:00
Saleem Abdulrasool adaaccc23b Basic: mark TLS as supported on Windows on ARM
LLVM can now lower TLS access as per the MS ABI on ARM.  This enables the
generation of TLS access for Windows on ARM.

llvm-svn: 259751
2016-02-04 05:05:23 +00:00
Evgeniy Stepanov f31ea30694 [cfi] Safe handling of unaddressable vtable pointers (clang).
Avoid crashing when printing diagnostics for vtable-related CFI
errors. In diagnostic mode, the frontend does an additional check of
the vtable pointer against the set of all known vtable addresses and
lets the runtime handler know if it is safe to inspect the vtable.

http://reviews.llvm.org/D16823

llvm-svn: 259716
2016-02-03 22:18:55 +00:00
Matt Arsenault 105e892c2c Add builtins for bitreverse intrinsic
Follow the naming convention that bswap uses since it's a
similar sort of operation.

llvm-svn: 259671
2016-02-03 17:49:38 +00:00
Marina Yatsina 41c45fa42d -inline-asm][X86] Add ability to use AVX512 in MS inline asm
Defined the new AVX512 registers in clang inline asm.
Fixed a bug in the MC subtarget info creation during the parsing of MS asm statement - now it receives the actual CPU and target features information.

Differential Revision: http://reviews.llvm.org/D16757

llvm-svn: 259639
2016-02-03 11:32:08 +00:00
Oliver Stannard 9181785a0c Add backend dignostic printer for unsupported features
Re-commit of r258950 after fixing layering violation.

The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

llvm-svn: 259499
2016-02-02 13:52:52 +00:00
Denis Zobnin d9e2dcdb42 Fix for PR8901: attribute "mode" rejected for enums and dependent types.
Allow "mode" attribute for enum types, except for vector modes, for compatibility with GCC.
Support "mode" attribute with dependent types.

Differential Revision: http://reviews.llvm.org/D16219

llvm-svn: 259497
2016-02-02 13:50:39 +00:00
Manman Ren 581c2b9d46 Check for frontend errors after releasing the Builder.
Frontend can emit errors when releaseing the Builder. If there are errors before
or when releasing the Builder, we reset the module to stop here before invoking
the backend.

Before this commit, clang will continue to invoke the backend and backend can
crash.

Differential Revision: http://reviews.llvm.org/D16564

llvm-svn: 259116
2016-01-28 23:29:02 +00:00
Rafael Espindola 29dfc23373 Update for llvm change.
llvm-svn: 259108
2016-01-28 22:56:41 +00:00
Oliver Stannard 92d4c328d1 Revert r259036, it introduces a cyclic library dependency
llvm-svn: 259043
2016-01-28 13:09:49 +00:00
Oliver Stannard 7a964feccb Add backend dignostic printer for unsupported features
Re-commit of r258950 after fixing layering violation.

Add backend dignostic printer for unsupported features

The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

Differential Revision: http://reviews.llvm.org/D16591

llvm-svn: 259036
2016-01-28 10:07:34 +00:00
NAKAMURA Takumi 628a7a0aef Revert r258951 (and r258950), "Refactor backend diagnostics for unsupported features"
It broke layering violation in LLVMIR.

clang r258950 "Add backend dignostic printer for unsupported features"
llvm  r258951 "Refactor backend diagnostics for unsupported features"

llvm-svn: 259016
2016-01-28 04:41:32 +00:00
George Burgess IV a2f29fa694 [Sema] Make extended vectors of `bool` an error.
In OpenCL, `bool` vectors are a reserved type, and are therefore
illegal.

Outside of OpenCL, if we try to make an extended vector of N `bool`s,
Clang will lower it to an `[N x i1]`. LLVM has no ABI for bitvectors, so
lots of operations on such vectors are thoroughly broken. As a result,
this patch makes them illegal in everything else, as well. :)

Differential Revision: http://reviews.llvm.org/D15721

llvm-svn: 259011
2016-01-28 01:38:18 +00:00
Evgeniy Stepanov 2952bf5005 Strengthen cfi-check-fail test.
r258993 allows stricter testing for basic block labels by making
sure that they are always followed by ":". Use this to improve the
test.

llvm-svn: 258997
2016-01-27 22:28:56 +00:00
Oliver Stannard 5e03a4b837 Add backend dignostic printer for unsupported features
The related LLVM patch adds a backend diagnostic type for reporting
unsupported features, this adds a printer for them to clang.

In the case where debug location information is not available, I've
changed the printer to report the location as the first line of the
function, rather than the closing brace, as the latter does not give the
user any information. This also affects optimisation remarks.

Differential Revision: http://reviews.llvm.org/D16591

llvm-svn: 258950
2016-01-27 17:30:28 +00:00
Chad Rosier f662fb3dc8 Revert "[Driver] Make sure -fno-math-builtin option is being passed by the driver."
This reverts commit r258814.

llvm-svn: 258815
2016-01-26 16:16:53 +00:00
Chad Rosier 17d2e8789c [Driver] Make sure -fno-math-builtin option is being passed by the driver.
Support for the -fno-math-builtin option was added in r186899.  The codegen side
is being tested in test/CodeGen/nomathbuiltin.c.  The missing part was just
passing the option through the driver.

PR26317

llvm-svn: 258814
2016-01-26 15:52:05 +00:00
Evgeniy Stepanov 3fd61df186 [cfi] Cross-DSO CFI diagnostic mode (clang part)
* Runtime diagnostic data for cfi-icall changed to match the rest of
  cfi checks
* Layout of all CFI diagnostic data changed to put Kind at the
  beginning. There is no ABI stability promise yet.
* Call cfi_slowpath_diag instead of cfi_slowpath when needed.
* Emit __cfi_check_fail function, which dispatches a CFI check
  faliure according to trap/recover settings of the current module.
* A tiny driver change to match the way the new handlers are done in
  compiler-rt.

llvm-svn: 258745
2016-01-25 23:34:52 +00:00
Alexey Bataev 86a489e4f3 Fixed processing of GNU extensions to C99 designated initializers
Clang did not handles correctly inner parts of arrays/structures initializers in GNU extensions to C99 designated initializers. 

llvm-svn: 258668
2016-01-25 05:14:03 +00:00
David Majnemer fc80b6e5d8 [MSVC Compat] Don't provide /volatile:ms semantics to types > pointer
Volatile loads of type wider than a pointer get split by MSVC because
the base x86 ISA doesn't provide loads which are wider than pointer
width.  LLVM assumes that it can emit an cmpxchg8b but this is
problematic if the memory is in a CONST memory segment.

Instead, provide behavior compatible with MSVC: split loads wider than a
pointer.

llvm-svn: 258506
2016-01-22 16:36:44 +00:00
Ekaterina Romanova 08d1f2431d 2 missing intrinsics _cvtss_sh and _mm_cvtps_ph were added to the intrinsics header f16intrin.h
Differential Revision: http://reviews.llvm.org/D16177

llvm-svn: 258492
2016-01-22 06:50:50 +00:00
Peter Collingbourne dc13453128 Introduce -fsanitize-stats flag.
This is part of a new statistics gathering feature for the sanitizers.
See clang/docs/SanitizerStats.rst for further info and docs.

Differential Revision: http://reviews.llvm.org/D16175

llvm-svn: 257971
2016-01-16 00:31:22 +00:00
Alexey Bataev d51e9933b6 [X86] Support 'interrupt' attribute for x86
This attribute may be attached to a function definition and instructs the backend to generate appropriate function entry/exit code so that
it can be used directly as an interrupt handler.
The IRET instruction, instead of the RET instruction, is used to return from interrupt or exception handlers. All registers, except for the EFLAGS register which is restored by the IRET instruction, are preserved by the compiler.
Any interruptible-without-stack-switch code must be compiled with -mno-red-zone since interrupt handlers can and will, because of the hardware design, touch
the red zone.

interrupt handler must be declared with a mandatory pointer argument:
struct interrupt_frame;

__attribute__ ((interrupt))
void f (struct interrupt_frame *frame) {
    ...
}
and user must properly define the structure the pointer pointing to.

exception handler: 

The exception handler is very similar to the interrupt handler with a different mandatory function signature:
#ifdef __x86_64__
typedef unsigned long long int uword_t;
#else
typedef unsigned int uword_t;
#endif

struct interrupt_frame;

__attribute__ ((interrupt))
void f (struct interrupt_frame *frame, uword_t error_code) {
    ...
}
and compiler pops the error code off stack before the IRET instruction.

The exception handler should only be used for exceptions which push an error code and all other exceptions must use the interrupt handler.
The system will crash if the wrong handler is used.
Differential Revision: http://reviews.llvm.org/D15709

llvm-svn: 257867
2016-01-15 04:06:31 +00:00
Kyle Butt 436ff85b63 [PPC] Add long long/double support for vec_cts, vec_ctu and vec_ctf
Add long long/double support for vec_cts, vec_ctu and vec_ctf.

Similar to this change in GCC:
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02653.html

Patch by Tim Shen.

llvm-svn: 257135
2016-01-08 02:00:48 +00:00