Commit Graph

7 Commits

Author SHA1 Message Date
Sagar Thakur 6478d14a0d [scudo] Enabling MIPS support for Scudo
Adding MIPS 32-bit and 64-bit support for Scudo.

Reviewed by cryptoad, sdardis.
Differential: D31803

llvm-svn: 305682
2017-06-19 11:28:59 +00:00
Sagar Thakur a37c0d99c9 Revert [scudo] Enabling MIPS support for Scudo
This patch broke the buildbot clang-cmake-mips. Investigating the issue.

llvm-svn: 301173
2017-04-24 11:02:36 +00:00
Sagar Thakur 4bac44c805 [scudo] Enabling MIPS support for Scudo
Adding MIPS 32-bit and 64-bit support for Scudo.

Reviewed by cryptoad
Differential: D31803

llvm-svn: 301158
2017-04-24 04:29:44 +00:00
Kostya Kortchinsky 198f864c07 [scudo] Enabling AArch64 support for Scudo
Summary:
Adding ARM64 as a supported architecture for Scudo.
The random shuffle is not yet supported for SizeClassAllocator32, which is used
by the AArch64 allocator, so disable the associated test for now.

Reviewers: kcc, alekseyshl, rengolin

Reviewed By: rengolin

Subscribers: aemerson, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D28960

llvm-svn: 293068
2017-01-25 16:35:18 +00:00
Kostya Kortchinsky e3be61c139 [scudo] ARM32 support
Summary:
With the previous modifications, the code works on ARM32. The random shuffle
test is unsupported on 32-bit platforms for the moment and being marked as
such. There is no hardware support for the checksum computation yet, this will
come at a later point.

Reviewers: kcc, alekseyshl

Subscribers: llvm-commits, aemerson, rengolin, mgorny

Differential Revision: https://reviews.llvm.org/D27957

llvm-svn: 290201
2016-12-20 21:17:58 +00:00
Kostya Kortchinsky 1148dc5274 [scudo] 32-bit and hardware agnostic support
Summary:
This update introduces i386 support for the Scudo Hardened Allocator, and
offers software alternatives for functions that used to require hardware
specific instruction sets. This should make porting to new architectures
easier.

Among the changes:
- The chunk header has been changed to accomodate the size limitations
  encountered on 32-bit architectures. We now fit everything in 64-bit. This
  was achieved by storing the amount of unused bytes in an allocation rather
  than the size itself, as one can be deduced from the other with the help
  of the GetActuallyAllocatedSize function. As it turns out, this header can
  be used for both 64 and 32 bit, and as such we dropped the requirement for
  the 128-bit compare and exchange instruction support (cmpxchg16b).
- Add 32-bit support for the checksum and the PRNG functions: if the SSE 4.2
  instruction set is supported, use the 32-bit CRC32 instruction, and in the
  XorShift128, use a 32-bit based state instead of 64-bit.
- Add software support for CRC32: if SSE 4.2 is not supported, fallback on a
  software implementation.
- Modify tests that were not 32-bit compliant, and expand them to cover more
  allocation and alignment sizes. The random shuffle test has been deactivated
  for linux-i386 & linux-i686 as the 32-bit sanitizer allocator doesn't
  currently randomize chunks.

Reviewers: alekseyshl, kcc

Subscribers: filcab, llvm-commits, tberghammer, danalbert, srhines, mgorny, modocache

Differential Revision: https://reviews.llvm.org/D26358

llvm-svn: 288255
2016-11-30 17:32:20 +00:00
Kostya Serebryany 7c5ae7cbc6 [sanitizer] enable random shuffling the memory chunks inside the allocator, under a flag. Set this flag for the scudo allocator, add a test.
llvm-svn: 279793
2016-08-26 00:06:03 +00:00