Commit Graph

497 Commits

Author SHA1 Message Date
Zachary Turner d08f09c113 Convert some StringExtractor functions to accept MutableArrayRefs.
MutableArrayRef<T> is essentially a safer version of passing around
(T*, length) pairs and provides some convenient functions for working
with the data without having to manually manipulate indices.

This is a minor NFC.

llvm-svn: 280123
2016-08-30 18:12:11 +00:00
Pavel Labath 9ba9dfdd02 Make sure files include what they use (part 2/2)
This makes lldb still compile on linux after a project-wide clang-format

llvm-svn: 278335
2016-08-11 14:12:10 +00:00
Pavel Labath dc2b3b7ea8 Make sure files include what they use (part 1/N)
preparation for the big clang-format.

llvm-svn: 278222
2016-08-10 13:30:20 +00:00
Greg Clayton 5b22f4a6f7 Fix more RegisterInfo initialization issues and quiet hundreds of warnings.
llvm-svn: 278063
2016-08-08 22:48:07 +00:00
Greg Clayton 1386c6ceae Fix RegisterInfo initializers to have all the required initializers after recent changes. This quiets a few hundred warnings on MacOSX.
llvm-svn: 278060
2016-08-08 22:15:35 +00:00
Nitesh Jain 52b6cc5d5f [LLVM][MIPS] Fix FPU Size Based on Dynamic FR.
Reviewers: jingham, clayborg

Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, lldb-commits, emaste, nemanjai, labath, sdardis

Differential Revision: https://reviews.llvm.org/D20357

llvm-svn: 277343
2016-08-01 13:45:51 +00:00
Jim Ingham 75c450466d The ARM single-step handling needs to look for breakpoint on the next instruction.
<rdar://problem/27006685>

llvm-svn: 276796
2016-07-26 19:50:25 +00:00
Jason Molenda 17b45390db Revert r273524, it may have been the cause of a linux testbot failure
for TestNamespaceLookup.py; didn't see anything obviously wrong so I'll
need to look at this more closely before re-committing.  (passed OK on
macOS ;)

llvm-svn: 273531
2016-06-23 04:24:16 +00:00
Jason Molenda cb6dae22e2 Do some minor renames of "Mac OS X" to "macOS".
There's uses of "macosx" that will be more tricky to
change, like in triples (e.g. "x86_64-apple-macosx10.11") - 
for now I'm just updating source comments and strings printed 
for humans.

llvm-svn: 273524
2016-06-23 01:18:16 +00:00
Kuba Brecka 00d7c563d2 A better fix of incorrectly used locking in HistoryThread and HistoryUnwind.
llvm-svn: 270363
2016-05-22 14:19:11 +00:00
Kuba Brecka d9b228128b Revert r270358 ("Fix an incorrectly used locking in HistoryThread and HistoryUnwind").
llvm-svn: 270359
2016-05-22 14:05:28 +00:00
Kuba Brecka 7380f25d29 Fix an incorrectly used locking in HistoryThread and HistoryUnwind, where unique_lock's release() was called causing the mutex to stay locked.
llvm-svn: 270358
2016-05-22 12:24:38 +00:00
Sagar Thakur b189db627c [LLDB][MIPS] Fix Floating point Registers Encoding
Patch by Nitesh Jain.

Summary: Currently floating point regsiters has eEncodingUint encoding. Hence register write  '1.25' will failed. This patch add eEncodingIEEE754 encoding for floating point registers( - ). This patch will fix test_fp_register_write in TestRegisters.py

Reviewers: clayborg, sagar
Subscribers: mohit.bhakkad, jaydeep, bhushan, sdardis, lldb-commits
Differential: D18853
llvm-svn: 270208
2016-05-20 12:11:52 +00:00
Jason Molenda 1ebb2c92f2 Some changes to prevent searching down the stack for saved register
values for the pc or return address register.

On ios with arm64 and a binary that has multiple functions without 
individual symbol boundaries, we end up with an assembly profile
unwind plan that says lr=<same> - that is, the link register contents
are unmodified from the caller's value.  This gets the unwinder in
a loop.  

When we're off the 0th frame, we never want to look to a caller for
a pc or return-address register value.

Add checks to ReadGPRValue and ReadRegister to prevent both the pc
and ra register values from recursing.

If this causes problems with backtraces on android, let me know or
back it out and I'll look into it -- but I think these are
straightforward and don't expect problems.

<rdar://problem/24610365> 

llvm-svn: 270162
2016-05-20 00:16:14 +00:00
Saleem Abdulrasool 16ff860469 remove use of Mutex in favour of std::{,recursive_}mutex
This is a pretty straightforward first pass over removing a number of uses of
Mutex in favor of std::mutex or std::recursive_mutex. The problem is that there
are interfaces which take Mutex::Locker & to lock internal locks. This patch
cleans up most of the easy cases. The only non-trivial change is in
CommandObjectTarget.cpp where a Mutex::Locker was split into two.

llvm-svn: 269877
2016-05-18 01:59:10 +00:00
Ulrich Weigand 7793ba86d1 Fix unwind failures when PC points beyond the end of a function
RegisterContextLLDB::InitializeNonZerothFrame already has code to attempt
to detect and handle the case where the PC points beyond the end of a
function, but there are certain cases where this doesn't work correctly.

In fact, there are *two* different places where this detection is attempted,
and the failure is in fact a result of an unfortunate interaction between
those two separate attempts.

First, the ResolveSymbolContextForAddress routine is called with the
resolve_tail_call_address flag set to true.  This causes the routine
to internally accept a PC pointing beyond the end of a function, and
still resolving the PC to that function symbol.

Second, the InitializeNonZerothFrame routine itself maintains a
"decr_pc_and_recompute_addr_range" flag and, if that turns out to
be true, itself decrements the PC by one and searches again for
a symbol at that new PC value.

Both approaches correctly identify the symbol associated with the PC.
However, the problem is now that later on, we also need to find the
DWARF CFI record associated with the PC.  This is done in the
RegisterContextLLDB::GetFullUnwindPlanForFrame routine, and uses
the "m_current_offset_backed_up_one" member variable.

However, that variable only actually contains the PC "backed up by
one" if the *second* approach above was taken.  If the function was
already identified via the first approach above, that member variable
is *not* backed up by one but simply points to the original PC.
This in turn causes GetEHFrameUnwindPlan to not correctly identify
the DWARF CFI record associated with the PC.

Now, in many cases, if the first method had to back up the PC by one,
we *still* use the second method too, because of this piece of code:

    // Or if we're in the middle of the stack (and not "above" an asynchronous event like sigtramp),
    // and our "current" pc is the start of a function...
    if (m_sym_ctx_valid
        && GetNextFrame()->m_frame_type != eTrapHandlerFrame
        && GetNextFrame()->m_frame_type != eDebuggerFrame
        && addr_range.GetBaseAddress().IsValid()
        && addr_range.GetBaseAddress().GetSection() == m_current_pc.GetSection()
        && addr_range.GetBaseAddress().GetOffset() == m_current_pc.GetOffset())
    {
        decr_pc_and_recompute_addr_range = true;
    }

In many cases, when the PC is one beyond the end of the current function,
it will indeed then be exactly at the start of the next function.  But this
is not always the case, e.g. if there happens to be alignment padding
between the end of one function and the start of the next.

In those cases, we may sucessfully look up the function symbol via
ResolveSymbolContextForAddress, but *not* set decr_pc_and_recompute_addr_range,
and therefore fail to find the correct DWARF CFI record.

A very simple fix for this problem is to just never use the first method.
Call ResolveSymbolContextForAddress with resolve_tail_call_address set
to false, which will cause it to fail if the PC is beyond the end of
the current function; or else, identify the next function if the PC
is also at the start of the next function.  In either case, we will
then set the decr_pc_and_recompute_addr_range variable and back up the
PC anyway, but this time also find the correct DWARF CFI.

A related problem is that the ResolveSymbolContextForAddress sometimes
returns a "symbol" with empty name.  This turns out to be an ELF section
symbol.  Now, usually those get type eSymbolTypeInvalid.  However, there
is code in ObjectFileELF::ParseSymbols that tries to change the type of
invalid symbols to eSymbolTypeCode or eSymbolTypeData if the symbol
lies within the code or data section.

Unfortunately, this check also hits the symbol for the code section
itself, which is then marked as eSymbolTypeCode.  While the size of
the section symbol is 0 according to the ELF file, LLDB considers
this size invalid and attempts to figure out the "correct" size.
Depending on how this goes, we may end up with a symbol that overlays
part of the code section, even outside areas covered by real function
symbols.

Therefore, if we call ResolveSymbolContextForAddress with PC pointing
beyond the end of a function, we may get this bogus section symbol.
This again means InitializeNonZerothFrame thinks we have a valid PC,
but then we don't find any unwind info for it.

The fix for this problem is me to simply always leave ELF section
symbols as type eSymbolTypeInvalid.

Differential Revision: http://reviews.llvm.org/D18975

llvm-svn: 267363
2016-04-24 20:49:56 +00:00
Ulrich Weigand bb00d0b6b2 Support Linux on SystemZ as platform
This patch adds support for Linux on SystemZ:
- A new ArchSpec value of eCore_s390x_generic
- A new directory Plugins/ABI/SysV-s390x providing an ABI implementation
- Register context support
- Native Linux support including watchpoint support
- ELF core file support
- Misc. support throughout the code base (e.g. breakpoint opcodes)
- Test case updates to support the platform

This should provide complete support for debugging the SystemZ platform.
Not yet supported are optional features like transaction support (zEC12)
or SIMD vector support (z13).

There is no instruction emulation, since our ABI requires that all code
provide correct DWARF CFI at all PC locations in .eh_frame to support
unwinding (i.e. -fasynchronous-unwind-tables is on by default).

The implementation follows existing platforms in a mostly straightforward
manner.  A couple of things that are different:

- We do not use PTRACE_PEEKUSER / PTRACE_POKEUSER to access single registers,
  since some registers (access register) reside at offsets in the user area
  that are multiples of 4, but the PTRACE_PEEKUSER interface only allows
  accessing aligned 8-byte blocks in the user area.  Instead, we use a s390
  specific ptrace interface PTRACE_PEEKUSR_AREA / PTRACE_POKEUSR_AREA that
  allows accessing a whole block of the user area in one go, so in effect
  allowing to treat parts of the user area as register sets.

- SystemZ hardware does not provide any means to implement read watchpoints,
  only write watchpoints.  In fact, we can only support a *single* write
  watchpoint (but this can span a range of arbitrary size).  In LLDB this
  means we support only a single watchpoint.  I've set all test cases that
  require read watchpoints (or multiple watchpoints) to expected failure
  on the platform.  [ Note that there were two test cases that install
  a read/write watchpoint even though they nowhere rely on the "read"
  property.  I've changed those to simply use plain write watchpoints. ]

Differential Revision: http://reviews.llvm.org/D18978

llvm-svn: 266308
2016-04-14 14:28:34 +00:00
Ulrich Weigand 7311bb34f6 Add new ABI callback to provide fallback unwind register locations
If the UnwindPlan did not identify how to unwind the stack pointer
register, LLDB currently assumes it can determine to caller's SP
from the current frame's CFA.  This is true on most platforms
where CFA is by definition equal to the incoming SP at function
entry.

However, on the s390x target, we instead define the CFA to equal
the incoming SP plus an offset of 160 bytes.  This is because
our ABI defines that the caller has to provide a register save
area of size 160 bytes.  This area is allocated by the caller,
but is considered part of the callee's stack frame, and therefore
the CFA is defined as pointing to the top of this area.

In order to make this work on s390x, this patch introduces a new
ABI callback GetFallbackRegisterLocation that provides platform-
specific fallback register locations for unwinding.  The existing
code to handle SP unwinding as well as volatile registers is moved
into the default implementation of that ABI callback, to allow
targets where that implementation is incorrect to override it.

This patch in itself is a no-op for all existing platforms.
But it is a pre-requisite for adding s390x support.

Differential Revision: http://reviews.llvm.org/D18977

llvm-svn: 266307
2016-04-14 14:25:20 +00:00
Sean Callanan 579e70c9b0 Add a DiagnosticManager replace error streams in the expression parser.
We want to do a better job presenting errors that occur when evaluating
expressions. Key to this effort is getting away from a model where all
errors are spat out onto a stream where the client has to take or leave
all of them.

To this end, this patch adds a new class, DiagnosticManager, which
contains errors produced by the compiler or by LLDB as an expression
is created. The DiagnosticManager can dump itself to a log as well as
to a string. Clients will (in the future) be able to filter out the
errors they're interested in by ID or present subsets of these errors
to the user.

This patch is not intended to change the *users* of errors - only to
thread DiagnosticManagers to all the places where streams are used. I
also attempt to standardize our use of errors a bit, removing trailing
newlines and making clients omit 'error:', 'warning:' etc. and instead
pass the Severity flag.

The patch is testsuite-neutral, with modifications to one part of the
MI tests because it relied on "error: error:" being erroneously
printed. This patch fixes the MI variable handling and the testcase.

<rdar://problem/22864976>

llvm-svn: 263859
2016-03-19 00:03:59 +00:00
Jim Ingham 8d94ba0fb1 This change introduces a "ExpressionExecutionThread" to the ThreadList.
Turns out that most of the code that runs expressions (e.g. the ObjC runtime grubber) on
behalf of the expression parser was using the currently selected thread.  But sometimes,
e.g. when we are evaluating breakpoint conditions/commands, we don't select the thread
we're running on, we instead set the context for the interpreter, and explicitly pass
that to other callers.  That wasn't getting communicated to these utility expressions, so
they would run on some other thread instead, and that could cause a variety of subtle and
hard to reproduce problems.  

I also went through the commands and cleaned up the use of GetSelectedThread.  All those
uses should have been trying the thread in the m_exe_ctx belonging to the command object
first.  It would actually have been pretty hard to get misbehavior in these cases, but for
correctness sake it is good to make this usage consistent.

<rdar://problem/24978569>

llvm-svn: 263326
2016-03-12 02:45:34 +00:00
Tamas Berghammer 5b42c7aa25 Add support for DW_OP_push_object_address in dwarf expressions
Additionally fix the type of some dwarf expression where we had a
confusion between scalar and load address types after a dereference.

Differential revision: http://reviews.llvm.org/D17604

llvm-svn: 262014
2016-02-26 14:21:10 +00:00
Davide Italiano f5935a0abc [NetBSD] Remove dead code.
PR:		http://reviews.llvm.org/D16818
llvm-svn: 259686
2016-02-03 20:13:50 +00:00
Jim Ingham 22eeb7227c The SetStopInfo from a Mach Exception was setting the stop
reason to None when we stop due to a trace, then noticed that
we were on a breakpoint that was not valid for the current thread.
That should actually have set it back to trace.

This was pr26441 (<rdar://problem/24470203>)

llvm-svn: 259684
2016-02-03 19:45:31 +00:00
Kamil Rytarowski d08778bade NetBSD: Define initial RegisterContextNetBSD_x86_64
Summary: Add basic support, i386 version will be added later.

Reviewers: emaste, joerg, clayborg, tfiala

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D16508

llvm-svn: 259462
2016-02-02 03:47:44 +00:00
Eugene Zelenko c33088f41e Remove autoconf support from source directories.
Differential revision: http://reviews.llvm.org/D16662

llvm-svn: 259098
2016-01-28 22:05:24 +00:00
Jason Molenda c197e81d07 Some 32-bit arm corefiles on darwin may have their general purpose
register set indicated by ARM_THREAD_STATE32 (value 9) instead of
the old ARM_THREAD_STATE (value 1); this patch changes lldb to
accept either register set flavor code.

<rdar://problem/24246257>

llvm-svn: 258289
2016-01-20 05:17:13 +00:00
Ravitheja Addepally 49982f5773 Fix for TestNoreturnUnwind.py on i386
Summary:
The testcase TestNoreturnUnwind.py was failing
because the unwind from the vdso library was not
successful for clang compiler while it was passing
for gcc. It was passing for gcc since the unwind plan
used was the assembly plan and the ebp register was
set by the main function in case of gcc and was not
used by the functions in the call flow to the vdso, whereas
clang did not emit assembly prologue for main and so
 the assembly unwind was failing. Normally in case of
failure of assembly unwind, lldb switches to EH CFI frame
based unwinding, but this was not happening for
the first frame. This patch tries to fix this behaviour by
falling to EH CFI frame based unwinding in case of assembly
unwind failure even for the first frame.
The test is still marked as XFAIL since it relys on the fix
of another bug.

Reviewers: lldb-commits, jingham, zturner, tberghammer, jasonmolenda

Subscribers: jasonmolenda

Differential Revision: http://reviews.llvm.org/D15046

llvm-svn: 257465
2016-01-12 10:08:41 +00:00
Stephane Sezer 728384a05e Prevent infinite recursive loop in AppleObjCTrampolineHandler constructor
Summary:
When we construct AppleObjCTrampolineHandler, if m_impl_fn_addr is
invalid, we call CanJIT(). If the gdb remote process does not support
allocating and deallocating memory, this call stack will include a call
to the AppleObjCRuntime constructor. The AppleObjCRuntime constructor
will then call the AppleObjCTrampolineHandler constructor, creating a
recursive call loop that eventually overflows the stack and segfaults.

Avoid this call loop by not constructing the AppleObjCTrampolineHandler
within AppleObjCRuntime until we actually need to use it.

Reviewers: clayborg, jingham

Subscribers: sas, lldb-commits

Differential Revision: http://reviews.llvm.org/D15978

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 257204
2016-01-08 20:32:35 +00:00
Kamil Rytarowski cec6b45aec Welcome to NetBSD signals
Summary:
Signals 1-32 are matching the default UNIX platform.

There are platform specific ones above 32.

From the `/usr/include/sys/signal.h` header:

```
#define SIGPWR          32      /* power fail/restart (not reset when caught) */
#ifdef _KERNEL
#define SIGRTMIN        33      /* Kernel only; not exposed to userland yet */
#define SIGRTMAX        63      /* Kernel only; not exposed to userland yet */
#endif
```

Reviewers: emaste, joerg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D15482

llvm-svn: 255592
2015-12-15 00:50:19 +00:00
Tamas Berghammer b4e95a50d7 Add 64/128 bit arm neon register definitions on linux
Differential revision: http://reviews.llvm.org/D14985

llvm-svn: 254152
2015-11-26 15:02:31 +00:00
Abhishek Aggarwal be994649b4 Fix to solve Bug 23139 & Bug 23560
Summary:
 - Reason of both bugs:

   1. For the very first frame, Unwinder doesn't check the validity
      of Full UnwindPlan before creating StackFrame from it:

        When 'process launch' command is run after setting a breakpoint
        in inferior, the Unwinder runs and saves only Frame 0 (the frame
        in which breakpoint was set) in thread's StackFrameList i.e.
        m_curr_frames_sp. However, it doesn't check the validity of the
        Full UnwindPlan for this frame by unwinding 2 more frames further.

   2. Unwinder doesn't update the CFA value of Cursor when Full UnwindPlan
      fails and FallBack UnwindPlan succeeds in providing valid CFA values
      for frames:

        Sometimes during unwinding of stack frames, the Full UnwindPlan
        inside the RegisterContextLLDB object may fail to provide valid
        CFA values for these frames. Then the Fallback UnwindPlan is used
        to unwind the frames.

        If the Fallback UnwindPlan succeeds, then it provides a valid new
        CFA value. The RegisterContextLLDB::m_cfa field of Cursor object
        is updated during the Fallback UnwindPlan execution. However,
        UnwindLLDB misses the implementation to update the 'cfa' field
        of this Cursor with this valid new CFA value.

 - This patch fixes both these issues.

 - Remove XFAIL in test files corresponding to these 2 Bugs

Change-Id: I932ea407545ceee2d628f946ecc61a4806d4cc86
Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: jingham, lldb-commits, jasonmolenda

Subscribers: lldb-commits, ovyalov, tberghammer

Differential Revision: http://reviews.llvm.org/D14226

llvm-svn: 253026
2015-11-13 10:47:49 +00:00
Bruce Mitchener 9ccb970f23 Make lldb::endian::InlHostByteOrder() private.
Summary:
Since this is within the lldb namespace, the compiler tries to
export a symbol for it. Unfortunately, since it is inlined, the
symbol is hidden and this results in a mess of warnings when
building on OS X with cmake.

Moving it to the lldb_private namespace eliminates that problem.

Reviewers: clayborg

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D14417

llvm-svn: 252396
2015-11-07 04:40:13 +00:00
Mohit K. Bhakkad f22bc197e1 [LLDB][MIPS] Fix GetUserRegisterInfoCount to count no of regs which are physically present
Reviewers: clayborg, labath.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D13859

llvm-svn: 251906
2015-11-03 09:13:45 +00:00
Eugene Zelenko ca64d675f1 Fix Clang-tidy modernize-use-nullptr warnings in source/Plugins/Process/Utility headers; other minor fixes.
llvm-svn: 251676
2015-10-30 00:55:29 +00:00
Eugene Zelenko ab7f6d04db Fix Clang-tidy modernize-use-override warnings in some files in source/Plugins; other minor fixes.
Differential Revision: http://reviews.llvm.org/D13951

llvm-svn: 250925
2015-10-21 18:46:17 +00:00
Mohit K. Bhakkad 79be9e8cb5 [LLDB] Insert names with same signo as alias instead of a new entry
Reviewers: clayborg, labath.
Subscribers: jaydeep, dsanders, bhushan, sagar, nitesh.jain, emaste,lldb-commits.
Differential Revision: http://reviews.llvm.org/D13646

llvm-svn: 250801
2015-10-20 07:05:46 +00:00
Eugene Zelenko fb2eec7e11 [LLDB] Fix Clang-tidy modernize-use-override warnings in some headers in source/Plugins/Process/Utility; other minor fixes.
Differential Revision: http://reviews.llvm.org/D13830

llvm-svn: 250593
2015-10-17 00:19:57 +00:00
Jim Ingham c60963c6c7 Fix a misunderstanding of the ThreadPlan::OkayToDiscard flag in InferiorCallPOSIX. It was
set to true, but all plans run by RunThreadPlan need to have this set to false so they will
return control to RunThreadPlan without consulting plans higher on the stack.

Since this seems like a common error, I also modified RunThreadPlan to enforce this behavior.

<rdar://problem/22543166>

llvm-svn: 250084
2015-10-12 19:11:03 +00:00
Abhishek Aggarwal b352a1c88f X86: Change FTAG register size in FXSAVE structure
Summary:
 - Changed from 16 bits to 8 bits for Intel Architecture
    -- FXSAVE structure now conforms with the layout of FXSAVE
       area specified by IA Architecture Software Developer Manual

 - Modified Linux and FreeBSD specific files to support this change
    -- MacOSX already uses 8 bits for ftag register

 - Modified TestRegisters.py and a.cpp:
    -- Change allows 8 bit comparison of ftag values

    -- Change resolves Bug 24733:
       Removed XFAIL for Clang as the test works and passes for
       Clang compiler as well

    -- Change provides a Generic/Better way of testing Bug 24457
       and Bug 25050 by using 'int3' inline assembly in inferior

Signed-off-by: Abhishek Aggarwal <abhishek.a.aggarwal@intel.com>

Reviewers: ovyalov, jingham, clayborg

Subscribers: tfiala, emaste

Differential Revision: http://reviews.llvm.org/D13587

llvm-svn: 250022
2015-10-12 09:57:00 +00:00
Tamas Berghammer f5ead561b3 Fix several issues around .ARM.exidx section handling
* Use .ARM.exidx as a fallback unwind plan for non-call site when the
  instruction emulation based unwind failed.
* Work around an old compiler issue where the compiler isn't sort the
  entries in .ARM.exidx based on their address.
* Fix unwind info parsing when the virtual file address >= 0x80000000
* Fix bug in unwind info parsing when neither lr nor pc is explicitly
  restored.

Differential revision: http://reviews.llvm.org/D13380

llvm-svn: 249119
2015-10-02 11:58:26 +00:00
Tamas Berghammer 648f3c7efa Add support for .ARM.exidx unwind information
.ARM.exidx/.ARM.extab sections contain unwind information used on ARM
architecture from unwinding from an exception.

Differential revision: http://reviews.llvm.org/D13245

llvm-svn: 248903
2015-09-30 13:50:14 +00:00
Jason Molenda 63bd0db071 Clean up register naming conventions inside lldb.
"gcc" register numbers are now correctly referred to as "ehframe"
register numbers.  In almost all cases, ehframe and dwarf register
numbers are identical (the one exception is i386 darwin where ehframe
regnums were incorrect).

The old "gdb" register numbers, which I incorrectly thought were
stabs register numbers, are now referred to as "Process Plugin"
register numbers.  This is the register numbering scheme that the
remote process controller stub (lldb-server, gdbserver, core file
support, kdp server, remote jtag devices, etc) uses to refer to the
registers.  The process plugin register numbers may not be contiguous
- there are remote jtag devices that have gaps in their register
numbering schemes.

I removed all of the enums for "gdb" register numbers that we had
in lldb - these were meaningless - and I put LLDB_INVALID_REGNUM
in all of the register tables for the Process Plugin regnum slot.

This change is almost entirely mechnical; the one actual change in
here is to ProcessGDBRemote.cpp's ParseRegisters() which parses the
qXfer:features:read:target.xml response.  As it parses register
definitions from the xml, it will assign sequential numbers as the
eRegisterKindLLDB numbers (the lldb register numberings must be
sequential, without any gaps) and if the xml file specifies register
numbers, those will be used as the eRegisterKindProcessPlugin
register numbers (and those may have gaps).  A J-Link jtag device's
target.xml does contain a gap in register numbers, and it only 
specifies the register numbers for the registers after that gap.
The device supports many different ARM boards and probably selects
different part of its register file as appropriate.

http://reviews.llvm.org/D12791
<rdar://problem/22623262> 

llvm-svn: 247741
2015-09-15 23:20:34 +00:00
Ed Maste 1b3f13d776 Move RegisterContextPOSIX.h to FreeBSD subdir
It is now used only by the FreeBSD in-process ptrace implementation.

llvm-svn: 247561
2015-09-14 14:20:56 +00:00
Ed Maste fee8ace132 Limit scope of RegisterContextPOSIX.h header
RegisterContextPOSIX.h is poorly named and contains only the declaration
of POSIXBreakpointProtocol, which is used for in-process live kernel
debugging. It is now relevant only to FreeBSD.

In source/Plugins/Process/Utility/RegisterContext*.h (after assorted
rework and refactoring) it only served the purpose of #including other
necessary headers as a side-effect. Remove it from them and just include
the required headers directly.

Differential Revision: http://reviews.llvm.org/D12830

llvm-svn: 247558
2015-09-14 13:16:59 +00:00
Pavel Labath d6a8ca6ec3 Switch default disposition of realtime signals
Summary:
Realtime signals generally do not represent an error condition in an application but are more
like a regular means of IPC. As such, we shouldn't interrupt an application whenever it recieves
one. If any application will use these signals, it will probably use them a lot, rendering it's
debugging tiresome if we stopped at every signal. Furthermore, these signals are likely to be used
in a low level library, and the programmer may not even be aware of their presence.

For these reasons, I am switching the default disposition of realtime signals on all supported
platforms (i.e. Linux and Freebsd) to no-stop, no-notify. Any user still wishing to receive these
signals can always change the default to suit his needs.

Reviewers: ovyalov, emaste

Subscribers: lldb-commits, emaste

Differential Revision: http://reviews.llvm.org/D12795

llvm-svn: 247537
2015-09-14 09:05:43 +00:00
Tamas Berghammer 025103cc61 Change the looping stack detection code
In some special case (e.g. signal handlers, hand written assembly) it is
valid to have 2 stack frame with the same CFA value. This CL change the
looping stack detection code to report a loop only if at least 3
consecutive frames have the same CFA.

Differential revision: http://reviews.llvm.org/D12699

llvm-svn: 247133
2015-09-09 10:26:50 +00:00
Tamas Berghammer c40e7b1769 Fix the handling of FPR offsets in Linux arm/aarch64 register contexts
Differential revision: http://reviews.llvm.org/D12636

llvm-svn: 246959
2015-09-07 10:11:23 +00:00
Bruce Mitchener db25a7a245 [cmake] Remove LLVM_NO_RTTI.
Summary:
This doesn't exist in other LLVM projects any longer and doesn't
do anything.

Reviewers: chaoren, labath

Subscribers: emaste, tberghammer, lldb-commits, danalbert

Differential Revision: http://reviews.llvm.org/D12586

llvm-svn: 246749
2015-09-03 08:46:55 +00:00
Tamas Berghammer 35d9d2dc1e Handle DW_OP_GNU_addr_index in DWARF expressions
Differential revision: http://reviews.llvm.org/D12290

llvm-svn: 245932
2015-08-25 11:46:06 +00:00
Jason Molenda 6d9fe8c156 The llvm Triple for an armv6m now comes back as llvm::Triple::thumb.
This was breaking disassembly for arm machines that we force to be
thumb mode all the time because we were only checking for llvm::Triple::arm.
i.e.

armv6m (ARM Cortex-M0)
armv7m (ARM Cortex-M3)
armv7em (ARM Cortex-M4)

<rdar://problem/22334522>

llvm-svn: 245645
2015-08-21 00:13:37 +00:00
Jason Molenda 040cd4207c Remove unintentional ;'s.
llvm-svn: 245261
2015-08-18 00:21:24 +00:00
Sagar Thakur 789da6678e [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This patch :

- Fixes offsets of all register sets for Mips.
- Adds MSA register set and FRE=1 mode support for FP register set.
- Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
- Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.

Reviewers: jaydeep, clayborg, jasonmolenda, ovyalov, emaste
Subscribers: tberghammer, ovyalov, emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential: http://reviews.llvm.org/D10919
llvm-svn: 245217
2015-08-17 13:40:17 +00:00
Jason Molenda a3664138dd Update DynamicRegisterInfo::SetRegisterInfo to accept eh_frame register
numbers in the key name "ehframe" or "eh_frame" in addition to the deprecated
"gcc" name (e.g. from a plugin.process.gdb-remote.target-definition-file
python file).

llvm-svn: 245151
2015-08-15 02:59:42 +00:00
Jason Molenda a18f7071c2 A messy bit of cleanup: Move towards more descriptive names
for eh_frame and stabs register numberings.  This is not
complete but it's a step in the right direction.  It's almost
entirely mechanical.

lldb informally uses "gcc register numbering" to mean eh_frame.
Why?  Probably because there's a notorious bug with gcc on i386
darwin where the register numbers in eh_frame were incorrect.
In all other cases, eh_frame register numbering is identical to
dwarf.

lldb informally uses "gdb register numbering" to mean stabs.
There are no official definitions of stabs register numbers
for different architectures, so the implementations of gdb
and gcc are the de facto reference source.

There were some incorrect uses of these register number types
in lldb already.  I fixed the ones that I saw as I made
this change.

This commit changes all references to "gcc" and "gdb" register
numbers in lldb to "eh_frame" and "stabs" to make it clear 
what is actually being represented.

lldb cannot parse the stabs debug format, and given that no
one is using stabs any more, it is unlikely that it ever will.
A more comprehensive cleanup would remove the stabs register
numbers altogether - it's unnecessary cruft / complication to
all of our register structures.

In ProcessGDBRemote, when we get register definitions from
the gdb-remote stub, we expect to see "gcc:" (qRegisterInfo)
or "gcc_regnum" (qXfer:features:read: packet to get xml payload).
This patch changes ProcessGDBRemote to also accept "ehframe:"
and "ehframe_regnum" from these remotes.

I did not change GDBRemoteCommunicationServerLLGS or debugserver
to send these new packets.  I don't know what kind of interoperability
constraints we might be working under.  At some point in the future
we should transition to using the more descriptive names.

Throughout lldb we're still using enum names like "gcc_r0" and "gdb_r0",
for eh_frame and stabs register numberings.  These should be cleaned
up eventually too.

The sources link cleanly on macosx native with xcode build.  I
don't think we'll see problems on other platforms but please let
me know if I broke anyone.

llvm-svn: 245141
2015-08-15 01:21:01 +00:00
Tamas Berghammer a58332fb5b Add missing include to RegisterInfoInterface.h
llvm-svn: 244881
2015-08-13 10:41:55 +00:00
Ravitheja Addepally 4778e410d0 Set orig_eax to -1 for Linux x86 platforms
Summary:
For Linux x86 based environments the orig_eax/orig_rax
register should be set to -1 to prevent the instruction pointer
to be decremented, which was the cause for the SIGILL exception.

Fix for Bug 23659

Reviewers: zturner, ashok.thirumurthi, mikesart, jingham, clayborg

Subscribers: clayborg, labath

Differential Revision: http://reviews.llvm.org/D11411

llvm-svn: 244875
2015-08-13 09:05:11 +00:00
Greg Clayton a1e5dc86a6 ClangASTType is now CompilerType.
This is more preparation for multiple different kinds of types from different compilers (clang, Pascal, Go, RenderScript, Swift, etc).

llvm-svn: 244689
2015-08-11 22:53:00 +00:00
Oleksiy Vyalov 9dcdd2ee03 Revert r244308 since it's introducing test regressions on Linux:
- TestLldbGdbServer.py both clang & gcc, i386 and x86_64
 - TestConstVariables.py gcc, i386 and x86_64
 - 112 failures clang, i386

llvm-svn: 244514
2015-08-10 21:49:50 +00:00
Sagar Thakur d754890047 [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 mode support
This change :

    - Fixes offsets of all register sets for Mips.
    - Adds MSA register set and FRE=1 mode support for FP register set.
    - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64.
    - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers.
    - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types.

Reviewers : emaste, jaydeep, clayborg
Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan
Differential : http://reviews.llvm.org/D10919

llvm-svn: 244308
2015-08-07 06:39:38 +00:00
Keno Fischer ac351b7943 [Makefiles] One more library rename to align with CMake
This one I accidentally missed last time because I confused it with
the lldbUtility library. After this, all makefile libraries should
have the same names as their CMake counterparts.

llvm-svn: 242344
2015-07-15 22:39:44 +00:00
Chaoren Lin 98d0a4b39a Refactor Unix signals.
Summary:
- Consolidate Unix signals selection in UnixSignals.
- Make Unix signals available from platform.
- Add jSignalsInfo packet to retrieve Unix signals from remote platform.
- Get a copy of the platform signal for each remote process.
- Update SB API for signals.
- Update signal utility in test suite.

Reviewers: ovyalov, clayborg

Subscribers: chaoren, jingham, labath, emaste, tberghammer, lldb-commits

Differential Revision: http://reviews.llvm.org/D11094

llvm-svn: 242101
2015-07-14 01:09:28 +00:00
Tamas Berghammer 8d53464472 Improve UnwindLLDB with better detection for unwinding failures
Previously we accepted a frame as correct result if the PC pointed
into an executable section of code. The isse with that approac is
that if we calculated PC correctly but messed up the value of CFA
then unwinding from the next fram will most likely fail.

With this change I modify the logic with keeping the requirement
for PC to point to an executable section and also check that we can
continue the unwind from the frame we calculated. If continuing from
the frame calculated with the primary unwind plan isn't working then
fall back to the fallback plan with the hope for a better frame (if
the fallback plan won't help then we acceot the frame from the
primary plan).

Differential revision: http://reviews.llvm.org/D10932

llvm-svn: 241434
2015-07-06 09:24:20 +00:00
Tamas Berghammer 9383480524 Enable usage of eh_frame based unwind plan as a fallback
Previously if the instruction emulation based unwind plan failed then
we fall back to the arch default unwind plan. Change it to fall back
to the eh_frame based one even on non call sites if we have eh_frame
as that one tend to be more reliable.

Differential revision: http://reviews.llvm.org/D10902

llvm-svn: 241334
2015-07-03 09:30:22 +00:00
Mohit K. Bhakkad e0d8c422a0 [LLDB][MIPS] Getting correct flags for MIPS
Patch by Nitesh Jain

Reviewers: clayborg, ovyalov, emaste.
Subscribers: jaydeep, bhushan, dsanders, mohit.bhakkad, sagar, labath, tberghammer, lldb-commits.
Differential Revision: http://reviews.llvm.org/D10685

llvm-svn: 241045
2015-06-30 06:29:12 +00:00
Tamas Berghammer 44ff9ccede Improve instruction emulation based stack unwinding on ARM
* Add and fix the emulation of several instruction.
* Disable frame pointer usage on Android.
* Specify return address register for the unwind plan instead of explict
  tracking the value of RA.
* Replace prologue detection heuristics (unreliable in several cases)
  with a logic to follow the branch instructions and restore the CFI
  value based on them. The target address for a branch should have the
  same CFI as the source address (if they are in the same function).
* Handle symbols in ELF files where the symbol size is not specified
  with calcualting their size based on the next symbol (already done
  in MachO files).
* Fix architecture in FuncUnwinders with filling up the inforamtion
  missing from the object file with the architecture of the target.
* Add code to read register wehn the value is set to "IsSame" as it
  meanse the value of a register in the parent frame is the same as the
  value in the current frame.

Differential revision: http://reviews.llvm.org/D10447

llvm-svn: 240533
2015-06-24 11:27:32 +00:00
Sagar Thakur 67e8989443 [MIPS64] Correct generic register number of argument registers in reginfo
llvm-svn: 240005
2015-06-18 09:36:31 +00:00
Sagar Thakur 0e179ae7b7 [lldb-server][MIPS64] Assigning generic register numbers in register info for mips64
Use generic register numbers for argument registers, fp, ra and flag register in register info.

llvm-svn: 239394
2015-06-09 10:29:29 +00:00
Ed Maste db6fd1ac25 Removed unused private fields in RegisterContextLinux_mips
llvm-svn: 239181
2015-06-05 18:50:33 +00:00
Sagar Thakur 0abe018c91 [lldb-server][MIPS] Read/Write FP registers in FR0 mode
Adding support for read/write FP registers in FR0 mode of mips.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10242

llvm-svn: 239132
2015-06-05 05:47:54 +00:00
Sagar Thakur ce815e4588 [MIPS][lldb-server] Add 32-bit register context and read/write FP registers on mips64
- Added support for read/write FP registers in FR1 mode.
    - Added 32 bit register context for mips32.

Reviewers: clayborg, tberghammer, jaydeep
Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits
Differential Revision: http://reviews.llvm.org/D10029

llvm-svn: 238914
2015-06-03 10:14:24 +00:00
Zachary Turner 1124045ac7 Don't #include "lldb-python.h" from anywhere.
Since interaction with the python interpreter is moving towards
being more isolated, we won't be able to include this header from
normal files anymore, all includes of it should be localized to
the python library which will live under source/bindings/API/Python
after a future patch.

None of the files that were including this header actually depended
on it anyway, so it was just a dead include in every single instance.

llvm-svn: 238581
2015-05-29 17:41:47 +00:00
Ed Maste efa25c2836 Add real time signals support to FreeBSDSignals
Apply r238009 to FreeBSD as well.

Differential Revision:	http://reviews.llvm.org/D10037

llvm-svn: 238316
2015-05-27 13:19:46 +00:00
Greg Clayton d04f0edad9 Added XML to the host layer.
We know have on API we should use for all XML within LLDB in XML.h. This API will be easy back the XML parsing by different libraries in case libxml2 doesn't work on all platforms. It also allows the only place for #ifdef ...XML... to be in XML.h and XML.cpp. The API is designed so it will still compile with or without XML support and there is a static function "bool XMLDocument::XMLEnabled()" that can be called to see if XML is currently supported. All APIs will return errors, false, or nothing when XML isn't enabled.

Converted all locations that used XML over to using the host XML implementation.

Added target.xml support to debugserver. Extended the XML register format to work for LLDB by including extra attributes and elements where needed. This allows the target.xml to replace the qRegisterInfo packets and allows us to fetch all register info in a single packet.

<rdar://problem/21090173>

llvm-svn: 238224
2015-05-26 18:00:51 +00:00
Tamas Berghammer 068f8a7e2d Move register reading form NativeProcessLinux to NativeRegisterContextLinux*
This change reorganize the register read/write code inside lldb-server on Linux
with moving the architecture independent code into a new class called
NativeRegisterContextLinux and all of the architecture dependent code into the
appropriate NativeRegisterContextLinux_* class. As part of it the compilation of
the architecture specific register contexts are only compiled on the specific
architecture because they can't be used in other cases.

The purpose of this change is to remove a lot of duplicated code from the different
register contexts and to remove the architecture dependent codes from the global
NativeProcessLinux class.

Differential revision: http://reviews.llvm.org/D9935

llvm-svn: 238196
2015-05-26 11:58:52 +00:00
Pavel Labath b84141a6fe Add real time signals support to LinuxSignals
Summary: This enables correct handling of real time signals by lldb.

Test Plan: Added a test that verifies handling of SIGRTMIN

Reviewers: tberghammer, ovyalov

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9911

llvm-svn: 238009
2015-05-22 08:46:18 +00:00
Robert Flack 96ad3de54b Convert mmap options for target in InferiorCallMmap.
Converts the MAP_PRIVATE and MAP_ANON options to the target platform constants
(on which the call runs) rather than using those of the compiled host.

Test Plan:
Run test suite, the following tests requiring memory allocation / JIT support
begin passing when running mac -> linux:
Test11588.py
TestAnonymous.py
TestBreakpointConditions.py
TestCPPStaticMethods.py
TestCStrings.py
TestCallStdStringFunction.py
TestDataFormatterCpp.py
TestDataFormatterStdList.py
TestExprDoesntBlock.py
TestExprHelpExamples.py
TestFunctionTypes.py
TestPrintfAfterUp.py
TestSBValuePersist.py
TestSetValues.py

Differential Revision: http://reviews.llvm.org/D9511

llvm-svn: 236933
2015-05-09 15:53:31 +00:00
Chaoren Lin 6598431c7a Same issue as in D8685 but for i386.
llvm-svn: 235454
2015-04-21 23:00:58 +00:00
Ed Maste 97df86ceb1 FreeBSD/arm core file support
Patch by Andrew Turner, with minor edits. XCode changes are mine; please
update if necessary.

llvm-svn: 235305
2015-04-20 13:58:19 +00:00
Ed Maste 8902e530bc Correct machine type for 32-bit arm
Reported by Andrew Turner.

llvm-svn: 235275
2015-04-19 18:27:00 +00:00
Omair Javaid 3f57216ca4 Adds Register Context Linux/POSIX for ARM Architecture
This patch is major step towards supporting lldb on ARM.
This adds all the required bits to support register manipulation on Linux Arm.
Also adds utility enumerations, definitions and register context classes for arm.

llvm-svn: 234870
2015-04-14 07:30:20 +00:00
Mohit K. Bhakkad 2c2acf9602 [LLDB][MIPS] Add LinuxSignals for mips64 and change trap opcode for mips64el.
Patch by Sagar Thakur

- Added LinuxSignals for MIPS64.
- Changed software trap opcode for mips64el.

Reviewers: clayborg, tberghammer.

Subscribers: emaste, jaydeep, bhushan, mohit.bhakkad, llvm-commits.

Differential Revision: http://reviews.llvm.org/D8856

llvm-svn: 234469
2015-04-09 07:12:15 +00:00
Greg Clayton ab745c2ad8 Fix stepping a virtual thread when the python operating system was enabled.
The OperatingSystem plug-ins allow code to detect threads in memory and then say "memory thread 0x11111" is backed by the actual thread 1. 

You can then single step these virtual threads. A problem arose when thread specific breakpoints were used during thread plans where we would say "set a breakpoint on thread 0x11111" and we would hit the breakpoint on the real thread 1 and the thread IDs wouldn't match and we would get rid of the "stopped at breakpoint" stop info due to this mismatch. Code was added to ensure these events get forwarded and thus allow single stepping a memory thread to work correctly.

Added a test case for this as well.

<rdar://problem/19211770>

llvm-svn: 234364
2015-04-07 22:17:41 +00:00
Zachary Turner 6f21907a89 Fix printing of function names during unwind logging.
llvm-svn: 234172
2015-04-06 16:23:30 +00:00
Ed Maste 4b1063c76c Fix FreeBSD crash after r233837
The FreeBSD debug register access is a little usual, but in any case
different from Linux. As it stands it's not possible to share an
implementation of DR_OFFSET, so revert that part of r233837 and provide
a separate FreeBSD and Linux implementation.

We'll still want a better fix, but this should restore basic
functionality (and the buildbot).

llvm-svn: 234048
2015-04-03 20:49:08 +00:00
Chaoren Lin 4ced470a31 Fix issue where GPR and FPR registers have overlapping byte offsets.
Summary:
The implementation of GDBRemoteRegisterContext relies on byte offsets to cache
register values. GPR, FPR, etc. should start on different offsets. This is
correctly done in debugserver (in DNBArchImplX86_64.cpp), but not on Linux or
FreeBSD (in RegisterInfos_x86_64.h).

Test Plan: `register read st0` no longer overwrites `rbp` on Linux with LLGS.

Reviewers: sivachandra, jingham, emaste, ovyalov, clayborg

Reviewed By: clayborg

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D8685

llvm-svn: 233837
2015-04-01 20:40:34 +00:00
Tamas Berghammer db264a6d09 Move several plugin to its own namespace
Affected paths:
* Plugins/Platform/Android/*
* Plugins/Platform/Linux/*
* Plugins/Platform/gdb-server/*
* Plugins/Process/Linux/*
* Plugins/Process/gdb-remote/*

Differential revision: http://reviews.llvm.org/D8654

llvm-svn: 233679
2015-03-31 09:52:22 +00:00
Tamas Berghammer 492519c884 Specify LLDB_REGNUM_GENERIC_ARG* registers for arm64
llvm-svn: 233369
2015-03-27 10:29:25 +00:00
Ed Maste 7754d21ae0 Handle FreeBSD/arm64 core files
This is derived from FreeBSD/mips64 and Darwin and Linux arm64 support.

Differential Revision:	http://reviews.llvm.org/D7835

llvm-svn: 233273
2015-03-26 14:20:00 +00:00
Zachary Turner 0641ca1a2d Remove ScriptInterpreterObject.
This removes ScriptInterpreterObject from the codebase completely.
Places that used to rely on ScriptInterpreterObject now use
StructuredData::Object and its derived classes.  To support this,
a new type of StructuredData object is introduced, called
StructuredData::Generic, which stores a void*.  Internally within
the python library, StructuredPythonObject subclasses this
StructuredData::Generic class so that it can addref and decref
the python object on construction and destruction.

Additionally, all of the classes in PythonDataObjects.h such
as PythonList, PythonDictionary, etc now provide a method to
create an instance of the corresponding StructuredData type.  For
example, there is PythonDictionary::CreateStructuredDictionary.
To eliminate dependencies on PythonDataObjects for external
callers, all ScriptInterpreter methods now return only
StructuredData classes

The rest of the changes in this CL are focused on fixing up
users of PythonDataObjects classes to use the new StructuredData
classes.

llvm-svn: 232534
2015-03-17 20:04:04 +00:00
David Blaikie 5121c9aa92 Fix the clang -Werror build by suppressing -Wextended-offsetof
llvm-svn: 232507
2015-03-17 17:37:17 +00:00
Mohit K. Bhakkad 3df471c32d [MIPS] - Register Context for MIPS64
Patch by Jaydeep Patil

Summery:
1. Add MIPS variants by parsing e_flags of the ELF
2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL

Reviewers: clayborg

Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D8166

llvm-svn: 232467
2015-03-17 11:43:56 +00:00
Tamas Berghammer 1e209fcceb Create NativeRegisterContext for android-arm64
Differential revision: http://reviews.llvm.org/D8058

llvm-svn: 232160
2015-03-13 11:36:47 +00:00
Zachary Turner 32abc6edac Reduce header footprint of Target.h
This continues the effort to reduce header footprint and improve
build speed by removing clang and other unnecessary headers
from Target.h.  In one case, some headers were included solely
for the purpose of declaring a nested class in Target, which was
not needed by anybody outside the class.  In this case the
definition and implementation of the nested class were isolated
in the .cpp file so the header could be removed.

llvm-svn: 231107
2015-03-03 19:23:09 +00:00
Pavel Labath dbb41cf418 Support evaluation of DWARF expressions setting CFA
Summary:
This patch enables evaluation of DWARF expressions setting the CFA during stack unwinding.

This makes TestSigtrampUnwind "almost" pass on linux. I am not enabling the test yet since the
symbol name for the signal trampoline does not get resolved properly due to a different bug, but
apart from that, the backtrace is sane.

I am unsure how this change affects Mac. I think it makes the unwinder prefer the DWARF unwind
plan instead of some custom platform-dependant plan. However, it does not affect the end result
- the stack unwinding works as expected.

Reviewers: jasonmolenda

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7792

llvm-svn: 230211
2015-02-23 10:29:01 +00:00
Pavel Labath ab970f5e08 UnwindPlan::Row refactor -- add support for CFA set by a DWARF expression
Summary:
This change refactors UnwindPlan::Row to be able to store the fact that the CFA is value is set
by evaluating a dwarf expression (DW_CFA_def_cfa_expression). This is achieved by creating a new
class CFAValue and moving all CFA setting/getting code there. Note that code using the new
CFAValue::isDWARFExpression is not yet present and will be added in a follow-up patch. Therefore,
this patch should not change the functionality in any way.

Test Plan: Ran tests on Mac and Linux. No regressions detected.

Reviewers: jasonmolenda, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7755

llvm-svn: 230210
2015-02-23 10:19:16 +00:00
Justin Hibbits 6cfc85a067 Quiet Coverity
Summary: Coverity warns that unsigned >= 0 is always true, and k_first_gpr_powerpc happens to be 0.  Quiet Coverity by changing that comparison instead to a static_assert(), in case things change in the future.

Reviewers: emaste

Reviewed By: emaste

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7576

llvm-svn: 228908
2015-02-12 05:31:31 +00:00
Chaoren Lin 03d30fc7bc Adding x86 to supported architectures on x86_64.
llvm-svn: 228715
2015-02-10 18:30:31 +00:00
Justin Hibbits 5c0b98e205 Fix off-by-one IsGPR().
f0 was being counted as a GPR, due to the check in IsGPR().  Correct it by
looking at the precise GPR range.

llvm-svn: 228547
2015-02-08 21:23:23 +00:00
Justin Hibbits f9ec0d1ea5 Implement initial Altivec support
Summary:
This adds the register plumbing, as well as register reading in FreeBSD core
dumps.  Further work on the POSIX/FreeBSD ProcessMonitor is required in order to
support ptrace access to these registers.

Reviewers: tfiala, emaste

Reviewed By: emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D7039

llvm-svn: 228278
2015-02-05 07:12:01 +00:00
Justin Hibbits b07ee8ded9 Add PowerPC FPR access to the process monitor
Summary: This adds reading and writing to the POSIX PowerPC ProcessMonitor.

Reviewers: emaste

Reviewed By: emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D7040

llvm-svn: 228277
2015-02-05 07:10:11 +00:00