7730924067
Fix comment
...
llvm-svn: 23686
2005-10-10 16:52:03 +00:00
3d1d4a3d12
Add ISD::ADD to MaskedValueIsZero
...
llvm-svn: 23685
2005-10-10 16:51:40 +00:00
56e44a6da5
This function is now dead
...
llvm-svn: 23684
2005-10-10 16:49:22 +00:00
bcfebebf22
Enable Nate's excellent DAG combiner work by default. This allows the
...
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.
llvm-svn: 23682
2005-10-10 16:47:10 +00:00
6a49b7cabb
add a todo for something I noticed
...
llvm-svn: 23679
2005-10-09 22:59:08 +00:00
1d3dc00674
(X & Y) & C == 0 if either X&C or Y&C are zero
...
llvm-svn: 23678
2005-10-09 22:12:36 +00:00
0832f2635a
When emiting a CopyFromReg and the source is already a vreg, do not bother
...
creating a new vreg and inserting a copy: just use the input vreg directly.
This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away. On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.
llvm-svn: 23671
2005-10-09 05:58:56 +00:00
2042aa5b92
Lo and behold, the last bits of SelectionDAG.cpp have been moved over.
...
llvm-svn: 23665
2005-10-08 00:29:44 +00:00
be4bbca0ba
remove debugging code
...
llvm-svn: 23663
2005-10-07 15:31:26 +00:00
fb12624a3f
implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through
...
C-X's
llvm-svn: 23662
2005-10-07 15:30:32 +00:00
b27a4147d3
fix indentation
...
llvm-svn: 23660
2005-10-07 06:37:02 +00:00
5bcd0dd811
Turn sdivs into udivs when we can prove the sign bits are clear. This
...
implements CodeGen/PowerPC/div-2.ll
llvm-svn: 23659
2005-10-07 06:10:46 +00:00
7bf8d06f02
silence a bogus GCC warning
...
llvm-svn: 23646
2005-10-06 17:39:10 +00:00
4bbbb9eed7
Make the legalizer completely non-recursive
...
llvm-svn: 23642
2005-10-06 01:20:27 +00:00
558beb3729
Let the combiner handle more cases
...
llvm-svn: 23641
2005-10-05 21:44:43 +00:00
f8221c5e2c
Remove some bad code from Legalize
...
llvm-svn: 23640
2005-10-05 21:44:10 +00:00
bd7df030d2
Check in some more DAGCombiner pieces
...
llvm-svn: 23639
2005-10-05 21:43:42 +00:00
a49e16fefa
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
...
with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
llvm-svn: 23636
2005-10-05 06:47:48 +00:00
b11d15637a
fix some pastos
...
llvm-svn: 23635
2005-10-05 06:37:22 +00:00
06f1d0f73a
Add a new HandleNode class, which is used to handle (haha) cases in the
...
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
llvm-svn: 23634
2005-10-05 06:35:28 +00:00
a6895d180e
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
...
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
llvm-svn: 23632
2005-10-05 06:11:08 +00:00
6bd8fd09b6
make sure that -view-isel-dags is the input to the isel, not the input to
...
the second phase of dag combining
llvm-svn: 23631
2005-10-05 06:09:10 +00:00
746d50a01a
Fix a crash compiling Olden/tsp
...
llvm-svn: 23630
2005-10-05 04:45:43 +00:00
327d4298e1
Reverting to version - until problem isolated.
...
llvm-svn: 23622
2005-10-04 16:41:51 +00:00
5da6908d65
Fix some faulty logic in the libcall inserter.
...
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.
Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.
Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end. This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.
This is a better fix that reverting to the workaround committed earlier
today.
llvm-svn: 23620
2005-10-04 02:10:55 +00:00
54fb5002e5
Add back a workaround that fixes some breakages from chris's last change.
...
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there. Still tracking this down...
llvm-svn: 23617
2005-10-04 00:37:37 +00:00
409a6b204e
Refactor gathering node info and emission.
...
llvm-svn: 23610
2005-10-03 12:30:32 +00:00
9cfccfb517
Fix a problem where the legalizer would run out of stack space on extremely
...
large basic blocks because it was purely recursive. This switches it to an
iterative/recursive hybrid.
llvm-svn: 23596
2005-10-02 17:49:46 +00:00
7f718e61e8
silence a bogus warning
...
llvm-svn: 23595
2005-10-02 16:30:51 +00:00
704d97f8b2
Add assertions to the trivial scheduler to check that the value types match
...
up between defs and uses.
llvm-svn: 23590
2005-10-02 07:10:55 +00:00
a038d901fb
Codegen CopyFromReg using the regclass that matches the valuetype of the
...
destination vreg.
llvm-svn: 23586
2005-10-02 06:34:16 +00:00
5a7bfe0b72
Add some very paranoid checking for operand/result reg class matchup
...
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0
llvm-svn: 23580
2005-10-01 07:45:09 +00:00
f8a5e5ae6e
Fix VC++ warnings.
...
llvm-svn: 23579
2005-10-01 03:57:14 +00:00
fda6944c5b
add a method
...
llvm-svn: 23575
2005-10-01 00:17:07 +00:00
d3850457a1
typo
...
llvm-svn: 23574
2005-10-01 00:08:23 +00:00
9d96932879
1. Simplify the gathering of node groups.
...
2. Printing node groups when displaying nodes.
llvm-svn: 23573
2005-10-01 00:03:07 +00:00
3fe3841c2a
1. Made things node-centric (from operand).
...
2. Added node groups to handle flagged nodes.
3. Started weaning simple scheduling off existing emitter.
llvm-svn: 23566
2005-09-30 19:15:27 +00:00
5b2be1f890
Fix two bugs in my patch earlier today that broke int->fp conversion on X86.
...
llvm-svn: 23522
2005-09-29 06:44:39 +00:00
b01a41a06d
Silence VC++ redeclaration warnings.
...
llvm-svn: 23516
2005-09-29 01:59:49 +00:00
6f3b577ee6
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23504
2005-09-28 22:28:18 +00:00
0fd8f9fbc9
If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.
...
llvm-svn: 23481
2005-09-27 22:15:53 +00:00
63523f98d5
Remove some redundancies.
...
llvm-svn: 23469
2005-09-27 17:32:45 +00:00
5f2443c8a3
Addition of a simple two pass scheduler. This version is currently hacked up
...
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)
llvm-svn: 23455
2005-09-26 21:57:04 +00:00
59a05bdde6
Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)
...
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
llvm-svn: 23403
2005-09-23 00:55:52 +00:00
c760f80fed
Stub out the rest of the DAG Combiner. Just need to fill in the
...
select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
2005-09-19 22:34:01 +00:00
24a7eca282
More DAG combining. Still need the branch instructions, and select_cc
...
llvm-svn: 23371
2005-09-16 00:54:12 +00:00
d4382f0afa
If a function has liveins, and if the target requested that they be plopped
...
into particular vregs, emit copies into the entry MBB.
llvm-svn: 23331
2005-09-13 19:30:54 +00:00
2d454bf5be
Allow targets to say they don't support truncstore i1 (which includes a mask
...
when storing to an 8-bit memory location), as most don't.
llvm-svn: 23303
2005-09-10 00:20:18 +00:00
bd39c1a4c6
Add a missing #include, patch courtesy of Baptiste Lepilleur.
...
llvm-svn: 23302
2005-09-09 23:53:39 +00:00
331b311f7b
Fix a problem duraid encountered on itanium where this folding:
...
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32. Add the zero extend as needed.
llvm-svn: 23301
2005-09-09 23:00:07 +00:00
16e5cb87ba
Fix a crash viewing dags that have target nodes in them
...
llvm-svn: 23300
2005-09-09 22:35:03 +00:00
049b748c76
Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
...
as setcc and select next.
llvm-svn: 23295
2005-09-09 19:49:52 +00:00
85c1cc4523
Move yet more folds over to the dag combiner from sd.cpp
...
llvm-svn: 23278
2005-09-08 20:18:10 +00:00
2cc2c9a79c
Another round of dag combiner changes. This fixes some missing XOR folds
...
as well as fixing how we replace old values with new values.
llvm-svn: 23260
2005-09-07 23:25:52 +00:00
6791d63e55
Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).
...
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
llvm-svn: 23258
2005-09-07 16:09:19 +00:00
fe883adfd2
Fix a bug nate ran into with replacealluseswith. In the recursive cse case,
...
we were losing a node, causing an assertion to fail. Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.
llvm-svn: 23255
2005-09-07 05:37:01 +00:00
007c650699
Add an option to the DAG Combiner to enable it for beta runs, and turn on
...
that option for PowerPC's beta.
llvm-svn: 23253
2005-09-07 00:15:36 +00:00
d23739d020
Next round of DAGCombiner changes. This version now passes all the tests
...
I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
llvm-svn: 23243
2005-09-06 04:43:02 +00:00
821628ff2a
Fix a checking failure in gs
...
llvm-svn: 23235
2005-09-03 01:04:40 +00:00
7cea6ef16e
Next round of DAG Combiner changes. Just need to support multiple return
...
values, and then we should be able to hook it up.
llvm-svn: 23231
2005-09-02 21:18:40 +00:00
1a570f1fe4
Clean up some code from the last checkin
...
llvm-svn: 23229
2005-09-02 20:32:45 +00:00
630226697f
Fix a bug in legalize where it would emit two calls to libcalls that return
...
i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
llvm-svn: 23228
2005-09-02 20:26:58 +00:00
b95b280bee
Make sure to auto-cse nullary ops
...
llvm-svn: 23224
2005-09-02 19:36:17 +00:00
1e89e36dcd
Fix some buggy logic where we would try to remove nodes with two operands
...
from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
llvm-svn: 23221
2005-09-02 19:15:44 +00:00
b0b4ec5655
Don't create zero sized stack objects even for array allocas with a zero
...
number of elements.
llvm-svn: 23219
2005-09-02 18:41:28 +00:00
b6cde17d29
Fix the release build, noticed by Eric van Riet Paap
...
llvm-svn: 23215
2005-09-02 07:09:28 +00:00
d9af1aab51
Make sure to legalize assert[zs]ext's operand correctly
...
llvm-svn: 23208
2005-09-02 01:15:01 +00:00
a66403dbf7
For values that are live across basic blocks and need promotion, use ANY_EXTEND
...
instead of ZERO_EXTEND to eliminate extraneous extensions. This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.
llvm-svn: 23205
2005-09-02 00:19:37 +00:00
7753f175e6
legalize ANY_EXTEND appropriately
...
llvm-svn: 23204
2005-09-02 00:18:10 +00:00
8c393c218b
Add support for ANY_EXTEND and add a few minor folds for it
...
llvm-svn: 23203
2005-09-02 00:17:32 +00:00
d78d975437
Fix some code in the current node combining code, spotted when it was moved
...
over to DAGCombiner.cpp
1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
MaskedValueIsZero
llvm-svn: 23196
2005-09-01 23:25:49 +00:00
2504fe2613
Implement first round of feedback from chris (there's still a couple things
...
left to do).
llvm-svn: 23195
2005-09-01 23:24:04 +00:00
975f5c9f46
It is NDEBUG not _NDEBUG
...
llvm-svn: 23186
2005-09-01 18:44:10 +00:00
e8f78d1aab
Add the rest of the currently implemented visit routines to the switch
...
statement in visit().
llvm-svn: 23185
2005-09-01 00:33:32 +00:00
21158fc485
First pass at the DAG Combiner. It isn't used anywhere yet, but it should
...
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
llvm-svn: 23184
2005-09-01 00:19:25 +00:00
8a1a5f2818
Allow targets to custom expand shifts that are too large for their registers
...
llvm-svn: 23173
2005-08-31 19:01:53 +00:00
d8c84e3c7e
Fix VC++ precedence warnings
...
llvm-svn: 23169
2005-08-31 02:47:06 +00:00
539e7c892c
Sigh, not my day. Fix typo.
...
llvm-svn: 23166
2005-08-31 00:43:49 +00:00
d513d8a662
Fix a mistake in my previous patch pointed out by sabre; the AssertZext
...
case in MaskedValueIsZero was wrong.
llvm-svn: 23165
2005-08-31 00:43:08 +00:00
e07bc28cca
Remove some unnecessary casts, and add the AssertZext case to
...
MaskedValueIsZero.
llvm-svn: 23164
2005-08-31 00:27:53 +00:00
5764da422a
Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :(
...
This fixes compilation of mesa
llvm-svn: 23161
2005-08-30 22:38:38 +00:00
61d21b1f3c
Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result
...
to SHIFT_PARTS nodes
llvm-svn: 23151
2005-08-30 17:21:17 +00:00
9a4ad487f0
Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing,
...
at least tends to expose problems elsewhere.
llvm-svn: 23149
2005-08-30 16:56:19 +00:00
a3da8c4819
Remove a bogus piece of my AssertSext/AssertZext patch. oops.
...
llvm-svn: 23148
2005-08-30 02:54:28 +00:00
43144a2fe0
Add support for AssertSext and AssertZext, folding other extensions with
...
them. This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.
Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values. this allows us to codegen
int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
mulhw r3, r4, r3
blr
instead of:
_mulhs:
mulhwu r2, r4, r3
srawi r5, r3, 31
mullw r5, r4, r5
add r2, r2, r5
srawi r4, r4, 31
mullw r3, r4, r3
add r3, r2, r3
blr
with a similar improvement on x86.
llvm-svn: 23147
2005-08-30 02:44:00 +00:00
08a1e38730
Name this variable to be what it really is!
...
llvm-svn: 23145
2005-08-30 01:58:51 +00:00
04cb82278a
Handle CopyToReg nodes with flag operands correctly
...
llvm-svn: 23144
2005-08-30 01:57:23 +00:00
f7e5ec84c6
Add a hack to avoid some horrible code in some cases by always emitting
...
token chains first. For this C function:
int test() {
int i;
for (i = 0; i < 100000; ++i)
foo();
}
Instead of emitting this (condition before call)
.LBB_test_1: ; no_exit
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr2, r30, r2
bl L_foo$stub
bne cr2, .LBB_test_1 ; no_exit
Emit this:
.LBB_test_1: ; no_exit
bl L_foo$stub
addi r30, r30, 1
lis r2, 1
ori r2, r2, 34464
cmpw cr0, r30, r2
bne cr0, .LBB_test_1 ; no_exit
Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.
This also makes the code much more similar to what the pattern isel produces.
llvm-svn: 23135
2005-08-29 23:21:29 +00:00
c738d000d5
Add a new API for Nate
...
llvm-svn: 23131
2005-08-29 21:59:31 +00:00
835cbb364d
Some of us cared about the the promote path
...
llvm-svn: 23130
2005-08-29 20:46:51 +00:00
dcde1b2b6a
Fix an infinite loop on x86
...
llvm-svn: 23129
2005-08-29 17:30:00 +00:00
87421c8658
Fix a bug in ReplaceAllUsesWith
...
llvm-svn: 23122
2005-08-28 23:59:36 +00:00
075250bda1
Disable this code, which broke many tests last night
...
llvm-svn: 23114
2005-08-27 16:16:51 +00:00
5ee85e89b6
fix PHI node emission for basic blocks that have select_cc's in them on ppc32
...
llvm-svn: 23113
2005-08-27 00:58:02 +00:00
56ca46ee04
Nate noticed that Andrew never did this. This fixes PR600
...
llvm-svn: 23110
2005-08-26 22:50:40 +00:00
e7a2998064
Don't copy regs that are only used in the entry block into a vreg. This
...
changes the code generated for:
short %test(short %A) {
%B = xor short %A, -32768
ret short %B
}
to:
_test:
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 16, 31
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
llvm-svn: 23109
2005-08-26 22:49:59 +00:00
4a5ebe94ba
Checking types here is not safe, because multiple types can map to the same
...
register class.
llvm-svn: 23103
2005-08-26 21:39:15 +00:00
13d7c252e5
Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter
...
flag is set on an instruction.
llvm-svn: 23098
2005-08-26 20:54:47 +00:00
373f048a79
Revampt ReplaceAllUsesWith to be more efficient and easier to use.
...
llvm-svn: 23087
2005-08-26 18:36:28 +00:00
c30405e0ee
Change ConstantPoolSDNode to actually hold the Constant itself instead of
...
putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
llvm-svn: 23081
2005-08-26 17:15:30 +00:00
2091a36631
Fix a huge annoyance: SelectNodeTo took types before the opcode unlike
...
every other SD API. Fix it to take the opcode before the types.
llvm-svn: 23079
2005-08-26 16:36:26 +00:00
c6d481db7a
the 5th operand is the 4th number
...
llvm-svn: 23074
2005-08-26 00:43:46 +00:00
5f573416cd
Add support for targets that want to custom expand select_cc in some cases.
...
llvm-svn: 23071
2005-08-26 00:23:59 +00:00
dff50cadaa
Allow LowerOperation to return a null SDOperand in case it wants to lower
...
some things given to it, but not all.
llvm-svn: 23070
2005-08-26 00:14:16 +00:00
1cb550c603
Fix a nasty bug from a previous patch of mine
...
llvm-svn: 23069
2005-08-26 00:13:12 +00:00
33840c3268
New fold for SELECT_CC
...
llvm-svn: 23058
2005-08-25 20:04:38 +00:00
f9c19157df
Don't auto-cse nodes that return flags
...
llvm-svn: 23055
2005-08-25 19:12:10 +00:00
9d28a56d55
simplify the code a bit using isOperationLegal
...
llvm-svn: 23053
2005-08-25 17:54:58 +00:00
8a93f64efa
Add support for flag operands
...
llvm-svn: 23050
2005-08-25 17:48:54 +00:00
407c6415b4
ADd support for TargetConstantPool nodes
...
llvm-svn: 23041
2005-08-25 05:03:06 +00:00
bbe0e7df2c
add a new TargetFrameIndex node
...
llvm-svn: 23035
2005-08-25 00:43:01 +00:00
45e1ce4e28
add a method
...
llvm-svn: 23027
2005-08-24 23:00:29 +00:00
d7ee4d8671
Add ReplaceAllUsesWith that can take a vector of replacement values.
...
Add some foldings to hopefully help the illegal setcc issue, and move some code around.
llvm-svn: 23025
2005-08-24 22:44:39 +00:00
ad9565dfbe
Add support for external symbols, and support for variable arity instructions
...
llvm-svn: 23022
2005-08-24 22:02:41 +00:00
bb8cc0acb2
Fix pasto that prevented VT ndoes from showing up in -view-isel-dags correctly
...
llvm-svn: 23021
2005-08-24 18:30:00 +00:00
86b1658d58
teach selection dag mask tracking about the fact that select_cc operates like
...
select. Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.
This allows us to compile this:
int %eq0(int %a) {
%tmp.1 = seteq int %a, 0 ; <bool> [#uses=1]
%tmp.2 = cast bool %tmp.1 to int ; <int> [#uses=1]
ret int %tmp.2
}
To this:
_eq0:
cntlzw r2, r3
srwi r3, r2, 5
blr
instead of this:
_eq0:
cntlzw r2, r3
rlwinm r3, r2, 27, 31, 31
blr
when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc). Thanks to Nate for pointing this out.
llvm-svn: 23013
2005-08-24 16:46:55 +00:00
f12eb4d676
Start using isOperationLegal and isTypeLegal to simplify the code
...
llvm-svn: 23012
2005-08-24 16:35:28 +00:00
45bbbb3f11
Teach SelectionDAG how to simplify a few more setcc-equivalent select_cc
...
nodes so that backends don't have to.
llvm-svn: 22999
2005-08-24 04:57:57 +00:00
99282c7b92
Make -view-isel-dags show the dag before instruction selecting, in case
...
the target isel crashes due to unimplemented features like calls :)
llvm-svn: 22997
2005-08-24 00:34:29 +00:00
72eab5dd5c
Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size
...
llvm-svn: 22995
2005-08-24 00:21:28 +00:00
bf8c3939d7
Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
...
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.
llvm-svn: 22978
2005-08-23 05:41:12 +00:00
987121a61a
Teach Legalize how to turn setcc into select_cc
...
llvm-svn: 22977
2005-08-23 04:29:48 +00:00
7f9e078d11
Fix a problem where constant expr shifts would not have their shift amount
...
promoted to the right type. This fixes: IA64/2005-08-22-LegalizerCrash.ll
llvm-svn: 22969
2005-08-22 17:28:31 +00:00
92626b9bc5
Add a fast-path for register values. Add support for constant pool entries,
...
allowing us to compile this:
float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, 10.1
ret float %R
}
to this:
_test2:
lfs r2, 0(r3)
lis r3, ha16(.CPI_test2_0)
lfs r3, lo16(.CPI_test2_0)(r3)
fadds f1, r2, r3
blr
llvm-svn: 22962
2005-08-22 01:04:32 +00:00
466fecee19
add anew method
...
llvm-svn: 22957
2005-08-21 22:30:30 +00:00
4866356907
Add support for frame index nodes
...
llvm-svn: 22956
2005-08-21 19:56:04 +00:00
0548f50501
add a method
...
llvm-svn: 22955
2005-08-21 19:48:59 +00:00
707b39fb8c
add a method
...
llvm-svn: 22949
2005-08-21 18:49:33 +00:00
154b2bc59b
Add support for basic blocks, fix a bug in result # computation
...
llvm-svn: 22948
2005-08-21 18:49:29 +00:00
539c3fa863
When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
...
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
llvm-svn: 22947
2005-08-21 18:03:09 +00:00
4b08ba26d8
fix bogus warning
...
llvm-svn: 22943
2005-08-20 18:07:27 +00:00
319e65696d
Add support for global address nodes
...
llvm-svn: 22940
2005-08-19 22:38:24 +00:00
1be7eddecf
Add support for TargetGlobalAddress nodes
...
llvm-svn: 22938
2005-08-19 22:31:04 +00:00
6d7f814b01
Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
...
us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
llvm-svn: 22937
2005-08-19 21:43:53 +00:00
0875d1ab89
Fix a bug in previous commit
...
llvm-svn: 22936
2005-08-19 21:34:13 +00:00
4990335eb8
Print physreg register nodes with target names (e.g. F1) instead of numbers
...
llvm-svn: 22934
2005-08-19 21:21:16 +00:00
78b200eb74
Before implementing copyfromreg, we'll implement copytoreg correctly.
...
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
llvm-svn: 22933
2005-08-19 20:50:53 +00:00
cc3035e989
Now that we have operand info for machine instructions, use it to create
...
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
llvm-svn: 22932
2005-08-19 20:45:43 +00:00
d1f22b1282
Fix VC++ precedence warning.
...
llvm-svn: 22902
2005-08-19 04:39:48 +00:00
d18beab94c
Fix computation of # operands, add a temporary hack for CopyToReg
...
llvm-svn: 22896
2005-08-19 01:01:34 +00:00
0c8c2c102d
add a new -view-sched-dags option to view dags as they are sent to the scheduler.
...
llvm-svn: 22878
2005-08-18 20:11:49 +00:00
d342de9aaa
Implement the first chunk of a code emitter. This is sophisticated enough to
...
codegen:
_empty:
.LBB_empty_0: ;
blr
but can't do anything more (yet). :)
llvm-svn: 22876
2005-08-18 20:07:59 +00:00
1b4727de7d
new file, obviously just a stub
...
llvm-svn: 22868
2005-08-18 18:45:24 +00:00
1a908c8920
Enable critical edge splitting by default
...
llvm-svn: 22863
2005-08-18 17:35:14 +00:00
19a271a67b
Add support for target DAG nodes that take 4 operands, such as PowerPC's
...
rlwinm.
llvm-svn: 22856
2005-08-18 07:30:15 +00:00
802080d812
Fix printing of VTSDNodes
...
llvm-svn: 22853
2005-08-18 03:31:02 +00:00
d66e616545
Move the code dependency for MathExtras.h from SelectionDAGNodes.h.
...
Added some class dividers in SelectionDAG.cpp.
llvm-svn: 22841
2005-08-17 20:08:02 +00:00
b74c666186
Culling out use of unions for converting FP to bits and vice versa.
...
llvm-svn: 22838
2005-08-17 19:34:49 +00:00
ab0de9d7fc
Fix a bug in RemoveDeadNodes where it would crash when its "optional"
...
argument is not specified.
Implement ReplaceAllUsesWith.
llvm-svn: 22834
2005-08-17 19:00:20 +00:00
686d6a1cb2
Switched to using BitsToDouble for int_to_float to avoid aliasing problem.
...
llvm-svn: 22831
2005-08-17 17:42:52 +00:00
898ba557d0
Change hex float constants for the sake of VC++.
...
llvm-svn: 22828
2005-08-17 09:44:59 +00:00
c9950c11a9
Add a new beta option for critical edge splitting, to avoid a problem that
...
Nate noticed in yacr2 (and I know occurs in other places as well).
This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.
llvm-svn: 22825
2005-08-17 06:37:43 +00:00
ba28c2733f
Fix a regression on X86, where FP values can be promoted too.
...
llvm-svn: 22822
2005-08-17 06:06:25 +00:00
f2516a9180
Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the
...
legalizer. PowerPC now uses this expansion instead of ISel version.
Example:
// signed integer to double conversion
double f1(signed x) {
return (double)x;
}
// unsigned integer to double conversion
double f2(unsigned x) {
return (double)x;
}
// signed integer to float conversion
float f3(signed x) {
return (float)x;
}
// unsigned integer to float conversion
float f4(unsigned x) {
return (float)x;
}
Byte Code:
internal fastcc double %_Z2f1i(int %x) {
entry:
%tmp.1 = cast int %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc double %_Z2f2j(uint %x) {
entry:
%tmp.1 = cast uint %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc float %_Z2f3i(int %x) {
entry:
%tmp.1 = cast int %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc float %_Z2f4j(uint %x) {
entry:
%tmp.1 = cast uint %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc double %_Z2g1i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
ret double %tmp.14
}
internal fastcc double %_Z2g2j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
ret double %tmp.9
}
internal fastcc float %_Z2g3i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
%tmp.16 = cast double %tmp.14 to float ; <float> [#uses=1]
ret float %tmp.16
}
internal fastcc float %_Z2g4j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
%tmp.11 = cast double %tmp.9 to float ; <float> [#uses=1]
ret float %tmp.11
}
PowerPC Code:
.machine ppc970
.const
.align 2
.CPIl1__Z2f1i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl1__Z2f1i_0)
lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl2__Z2f2j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl2__Z2f2j_0)
lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl3__Z2f3i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl3__Z2f3i_0)
lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
.const
.align 2
.CPIl4__Z2f4j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl4__Z2f4j_0)
lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
llvm-svn: 22814
2005-08-17 00:39:29 +00:00
0d2456e1f0
add a new TargetConstant node
...
llvm-svn: 22813
2005-08-17 00:34:06 +00:00
33182325f5
Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
...
used to tack a register number onto the node.
Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number. These three operations just become normal
DAG nodes now, instead of requiring special handling.
Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this
is bad, so don't do it. :)
llvm-svn: 22806
2005-08-16 21:55:35 +00:00
371e49515d
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
...
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
2005-08-16 19:49:35 +00:00
bc89226527
Allow passing a dag into dump and getOperationName. If one is available
...
when printing a node, use it to render target operations with their
target instruction name instead of "<<unknown>>".
llvm-svn: 22804
2005-08-16 18:33:07 +00:00
7e57d18b79
Use a extant helper to do this.
...
llvm-svn: 22802
2005-08-16 18:31:23 +00:00
1973278b38
Add some methods for dag->dag isel.
...
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.
llvm-svn: 22801
2005-08-16 18:17:10 +00:00
d5e739dcc2
Fix last night's PPC32 regressions by
...
1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
llvm-svn: 22789
2005-08-14 18:38:32 +00:00
36853ee1fd
Teach the legalizer how to legalize FP_TO_UINT.
...
Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider
FP_TO_UINT is also illegal. This allows us on PPC to codegen
unsigned short foo(float a) { return a; }
as:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
instead of:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
lis r3, ha16(.CPI_foo_0)
lfs f0, lo16(.CPI_foo_0)(r3)
fcmpu cr0, f1, f0
blt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
fsubs f0, f1, f0
fctiwz f0, f0
stfd f0, -16(r1)
lwz r2, -12(r1)
xoris r2, r2, 32768
.LBB_foo_2: ; entry
rlwinm r3, r2, 0, 16, 31
blr
llvm-svn: 22785
2005-08-14 01:20:53 +00:00
dc3154ec66
Remove an unncessary argument to SimplifySelectCC and add an additional
...
assert when creating a select_cc node.
llvm-svn: 22780
2005-08-13 06:14:17 +00:00
b6651e81a0
Fix the fabs regression on x86 by abstracting the select_cc optimization
...
out into SimplifySelectCC. This allows both ISD::SELECT and ISD::SELECT_CC
to use the same set of simplifying folds.
llvm-svn: 22779
2005-08-13 06:00:21 +00:00
21381e8424
implement a couple of simple shift foldings.
...
e.g. (X & 7) >> 3 -> 0
llvm-svn: 22774
2005-08-12 23:54:58 +00:00
5c7656fd53
Add a select_cc optimization for recognizing abs(int). This speeds up an
...
integer MPEG encoding loop by a factor of two.
llvm-svn: 22758
2005-08-11 02:18:13 +00:00
180b08897f
Some SELECT_CC cleanups:
...
1. move assertions for node creation to getNode()
2. legalize the values returned in ExpandOp immediately
3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's,
allowing them to be cleaned up significantly.
This paves the way to pick up additional optimizations on SELECT_CC, such
as sum-of-absolute-differences.
llvm-svn: 22757
2005-08-11 01:12:20 +00:00
e5b86d7442
Add new node, SELECT_CC. This node is for targets that don't natively
...
implement SELECT.
llvm-svn: 22755
2005-08-10 20:51:12 +00:00
21c0fd9e8f
Fix an oversight that may be causing PR617.
...
llvm-svn: 22753
2005-08-10 17:37:53 +00:00
679f5b0b40
Fix spelling, fix some broken canonicalizations by my last patch
...
llvm-svn: 22734
2005-08-09 23:09:05 +00:00
14e060f743
add cc nodes to the AllNodes list so they show up in Graphviz output
...
llvm-svn: 22731
2005-08-09 20:40:02 +00:00
d47675ed24
Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the
...
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf. This will make it possible for other node to use
CC's as operands in the future...
llvm-svn: 22728
2005-08-09 20:20:18 +00:00
0c26a0b902
add a small simplification that can be exposed after promotion/expansion
...
llvm-svn: 22691
2005-08-07 05:00:44 +00:00
96ad31321a
Change FindEarliestCallSeqEnd (used by libcall insertion) to use a set to
...
avoid revisiting nodes more than once. This eliminates a source of
potentially exponential behavior. For a small function in 191.fma3d
(hexah_stress_divergence_), this speeds up isel from taking > 20mins to
taking 0.07s.
llvm-svn: 22680
2005-08-05 18:10:27 +00:00
1095dc94a9
Fix a use-of-dangling-pointer bug, from the introduction of SrcValue's.
...
llvm-svn: 22679
2005-08-05 16:55:31 +00:00
cabdc34563
Fix a latent bug in the libcall inserter that was exposed by Nate's patch
...
yesterday. This fixes whetstone and a bunch of programs in the External tests.
llvm-svn: 22678
2005-08-05 16:23:57 +00:00
77558da546
Fix a fixme in LegalizeDAG
...
llvm-svn: 22661
2005-08-04 21:43:28 +00:00
a54e201edf
* Unbreak release build
...
* Add comments to #endif pragmas for readability
llvm-svn: 22647
2005-08-04 14:22:41 +00:00
8191442548
Fix PR611, codegen'ing SREM of FP operands to fmod or fmodf instead of
...
the sequence used for integer ops
llvm-svn: 22629
2005-08-03 20:31:37 +00:00
6667bdbaca
Update to use the new MathExtras.h support for log2 computation.
...
Patch contributed by Jim Laskey!
llvm-svn: 22594
2005-08-02 19:26:06 +00:00
4398daf069
Fix casts from long to sbyte on ppc
...
llvm-svn: 22570
2005-08-01 18:16:37 +00:00
546fd5944e
Keep tabs and trailing spaces out.
...
llvm-svn: 22565
2005-07-30 18:33:25 +00:00
941d84a34d
fix float->long conversions on x86
...
llvm-svn: 22563
2005-07-30 01:40:57 +00:00
f59b2daddb
Allow targets to have custom expanders for FP_TO_*INT conversions where
...
both the src and dest values are legal
llvm-svn: 22555
2005-07-30 00:04:12 +00:00
fe68d75aad
Allow targets to define custom expanders for FP_TO_*INT
...
llvm-svn: 22548
2005-07-29 00:33:32 +00:00
44fe26ff07
allow a target to request that unknown FP_TO_*INT conversion be promoted to
...
a larger integer destination.
llvm-svn: 22547
2005-07-29 00:11:56 +00:00
f99f8f9081
instead of having all conversions be handled by one case value, and then have
...
subcases inside, break things out earlier.
llvm-svn: 22546
2005-07-28 23:31:12 +00:00
5f4ef3c5a8
Eliminate all remaining tabs and trailing spaces.
...
llvm-svn: 22523
2005-07-27 06:12:32 +00:00
1ac40a1245
Remove unnecessary FP_EXTEND. This causes worse codegen for SSE.
...
llvm-svn: 22469
2005-07-19 16:50:03 +00:00
b35912e421
The assertion was wrong: the code only worked for i64. While we're at it,
...
expand the code to work for all integer datatypes. This should unbreak
alpha.
llvm-svn: 22464
2005-07-18 04:31:14 +00:00
7e74c834c1
Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that
...
the target natively supports. This eliminates some special-case code from
the x86 backend and generates better code as well.
For an i8 to f64 conversion, before & after:
_x87 before:
subl $2, %esp
movb 6(%esp), %al
movsbw %al, %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_x87 after:
subl $2, %esp
movsbw 6(%esp), %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_sse before:
subl $12, %esp
movb 16(%esp), %al
movsbl %al, %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
_sse after:
subl $12, %esp
movsbl 16(%esp), %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
llvm-svn: 22452
2005-07-16 02:02:34 +00:00
e3e847bfd7
Break the code for expanding UINT_TO_FP operations out into its own
...
SelectionDAGLegalize::ExpandLegalUINT_TO_FP method.
Add a new method, PromoteLegalUINT_TO_FP, which allows targets to request
that UINT_TO_FP operations be promoted to a larger input type. This is
useful for targets that have some UINT_TO_FP or SINT_TO_FP operations but
not all of them (like X86).
The same should be done with SINT_TO_FP, but this patch does not do that
yet.
llvm-svn: 22447
2005-07-16 00:19:57 +00:00
b47f5e6d54
You can't use config options without config.h
...
llvm-svn: 22446
2005-07-15 22:48:31 +00:00
46524e2573
Make this use the new autoconf support for finding the executables for
...
gv and Graphviz.
llvm-svn: 22434
2005-07-14 05:33:13 +00:00
fcc53ad625
As discussed on IRC, this stuff is just for debugging.
...
llvm-svn: 22432
2005-07-14 05:17:43 +00:00
51ded0e1ee
If the Graphviz program is available, use it to visualize dot graphs.
...
llvm-svn: 22429
2005-07-14 01:10:55 +00:00
f9ddfef872
Fix Alpha/2005-07-12-TwoMallocCalls.ll and PR593.
...
It is not safe to call LegalizeOp on something that has already been legalized.
Instead, just force another iteration of legalization.
This could affect all platforms but X86, as this codepath is dynamically
dead on X86 (ISD::MEMSET and friends are legal).
llvm-svn: 22419
2005-07-13 02:00:04 +00:00
ba08a336f0
Fix test/Regression/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll
...
llvm-svn: 22417
2005-07-13 01:42:45 +00:00
de0a4b1987
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
...
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
llvm-svn: 22367
2005-07-10 01:55:33 +00:00
36db1ed06f
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
...
llvm-svn: 22366
2005-07-10 00:29:18 +00:00
0b6ba90a72
Introduce a new VTSDNode class with the ultimate goal of eliminating the
...
MVTSDNode class. This class is used to provide an operand to operators
that require an extra type. We start by converting FP_ROUND_INREG and
SIGN_EXTEND_INREG over to using it.
llvm-svn: 22364
2005-07-10 00:07:11 +00:00
f5473e44a9
Make several cleanups to Andrews varargs change:
...
1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
llvm-svn: 22338
2005-07-05 19:57:53 +00:00
80fe411662
2 fixes:
...
1: Legalize operand in UINT_TO_FP expanision
2: SRA x, const i8 was not promoting the constant to shift amount type.
llvm-svn: 22337
2005-07-05 19:52:39 +00:00
be3a74ca3e
I really didn't think this was necessary. But, Legalize wasn't running again
...
and legalizing the extload. Strange. Should fix most alpha regressions.
llvm-svn: 22329
2005-07-02 20:58:53 +00:00
0a370f4de5
oops
...
llvm-svn: 22320
2005-06-30 19:32:57 +00:00
b5597e38f6
FP EXTLOAD is not support on all archs, expand to LOAD and FP_EXTEND
...
llvm-svn: 22319
2005-06-30 19:22:37 +00:00
2edc1881ac
restore old srcValueNode behavior and try to to work around it
...
llvm-svn: 22315
2005-06-29 18:54:02 +00:00
8192568fbc
tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored
...
llvm-svn: 22311
2005-06-29 15:57:19 +00:00
d74877a46d
Adapt the code for handling uint -> fp conversion for the 32 bit case to
...
handling it in the 64 bit case. The two code paths should probably be merged.
llvm-svn: 22302
2005-06-27 23:28:32 +00:00
253145299b
If we support structs as va_list, we must pass pointers to them to va_copy
...
See last commit for LangRef, this implements it on all targets.
llvm-svn: 22273
2005-06-22 21:04:42 +00:00
9144ec4764
core changes for varargs
...
llvm-svn: 22254
2005-06-18 18:34:52 +00:00
a2e8779b0d
Fix bug 537 test 2, which checks to make sure that we fold A+(B-A) -> B for
...
integer types. Add a couple checks to not perform these kinds of transform
on floating point values.
llvm-svn: 22228
2005-06-16 07:06:03 +00:00
51836bbc82
Add some simplifications for MULH[SU]. This allows us to compile this:
...
long %bar(long %X) {
%Y = mul long %X, 4294967297
ret long %Y
}
to this:
l1_bar:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, %EAX
add %EDX, DWORD PTR [%ESP + 8]
ret
instead of:
l1_bar:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EDX, 1
mov %EAX, %ECX
mul %EDX
add %EDX, %ECX
add %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %ECX
ret
llvm-svn: 22044
2005-05-15 05:39:08 +00:00
e4f71d036f
Fix construction of ioport intrinsics, fixing X86/io.llx and io-port.llx
...
llvm-svn: 22026
2005-05-14 13:56:55 +00:00
3268f244e6
allow token chain at start or end of node
...
llvm-svn: 22020
2005-05-14 08:34:53 +00:00
865359958b
remove special case hacks for readport/readio from the binary operator
...
codepath
llvm-svn: 22019
2005-05-14 07:45:46 +00:00
566307f92a
Implement fixme's by memoizing nodes.
...
llvm-svn: 22018
2005-05-14 07:42:29 +00:00
833a4fbdc5
Turn this into a wrapper for a simpler version of getNode.
...
llvm-svn: 22016
2005-05-14 07:32:14 +00:00
96c262e24b
Eliminate special purpose hacks for dynamic_stack_alloc.
...
llvm-svn: 22015
2005-05-14 07:29:57 +00:00
669e8c2c9c
Use the general mechanism for creating multi-value nodes instead of using
...
special case hacks.
llvm-svn: 22014
2005-05-14 07:25:05 +00:00
006f56b177
Wrap long line, actually add node to the graph.
...
llvm-svn: 22011
2005-05-14 06:42:57 +00:00
3eb8693279
legalize target-specific operations
...
llvm-svn: 22010
2005-05-14 06:34:48 +00:00
d553133308
add a getNode() version that allows construction of any node type.
...
llvm-svn: 22009
2005-05-14 06:20:26 +00:00
29dcc71d83
LowerOperation takes a dag
...
llvm-svn: 22004
2005-05-14 05:50:48 +00:00
d3cc996a47
Allow targets to have a custom int64->fp expander if desired
...
llvm-svn: 22001
2005-05-14 05:33:54 +00:00
cbefe72fb2
Align doubles on 8-byte boundaries if possible.
...
llvm-svn: 21993
2005-05-13 23:14:17 +00:00
2e77db6af6
Add an isTailCall flag to LowerCallTo
...
llvm-svn: 21958
2005-05-13 18:50:42 +00:00
d0feb64443
Handle TAILCALL node
...
llvm-svn: 21957
2005-05-13 18:43:43 +00:00
d0b0ecca3f
Emit function entry code after lowering hte arguments.
...
llvm-svn: 21931
2005-05-13 07:33:32 +00:00
0220b2952f
Allow targets to emit code into the entry block of each function
...
llvm-svn: 21930
2005-05-13 07:23:21 +00:00
bb1d60de9c
Fix a problem that nate reduced for me.
...
llvm-svn: 21923
2005-05-13 05:17:00 +00:00
5a14c8a18e
rename variables and functions to match renamed DAG nodes. Bonus feature:
...
I can actually remember which one is which now!
llvm-svn: 21922
2005-05-13 05:09:11 +00:00
2a4f7312cd
do not call expandop on the same value more than once. This fixes
...
X86/2004-02-22-Casts.llx
llvm-svn: 21919
2005-05-13 04:45:13 +00:00
e3677d6354
fix a bad typeo
...
llvm-svn: 21917
2005-05-12 23:51:40 +00:00
d34cd28aa7
update comment
...
llvm-svn: 21916
2005-05-12 23:24:44 +00:00
2dce703710
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
...
llvm-svn: 21915
2005-05-12 23:24:06 +00:00
111778e665
Pass calling convention to use into lower call to
...
llvm-svn: 21900
2005-05-12 19:56:57 +00:00
0bfd177e89
fix expansion of ct[lt]z nodes
...
llvm-svn: 21896
2005-05-12 19:27:51 +00:00
cf5f6b0ccb
Expand 64-bit ctlz/cttz nodes for 32-bit targets
...
llvm-svn: 21895
2005-05-12 19:05:01 +00:00
26f0317f46
Fix uint->fp casts on PPC, allowing UnitTests/2005-05-12-Int64ToFP to
...
work on it.
llvm-svn: 21894
2005-05-12 18:52:34 +00:00
b5a78e0873
Allow something to be legalized multiple times. This can be used to reduce
...
legalization iteration
llvm-svn: 21892
2005-05-12 16:53:42 +00:00
153587e555
Oops, don't do this after we figure out where to insert the call chains.
...
llvm-svn: 21890
2005-05-12 07:00:44 +00:00
8a5ad8468a
Make sure to expand all nodes, avoiding unintentional node duplication.
...
llvm-svn: 21889
2005-05-12 06:54:21 +00:00
d2fb9ea262
handle a common case generated by the uint64 -> FP code path better
...
llvm-svn: 21888
2005-05-12 06:27:02 +00:00
f09c0b435b
add fixme
...
llvm-svn: 21887
2005-05-12 06:04:14 +00:00
a5bf1030bf
Fix a problem where early legalization can cause token chain problems.
...
llvm-svn: 21885
2005-05-12 04:49:08 +00:00
8005e91432
Make legalize a bit more efficient, and canonicalize sub X, C -> add X, -C
...
llvm-svn: 21882
2005-05-12 00:17:04 +00:00
99fa5bc1fa
Necessary changes to codegen cttz efficiently on PowerPC
...
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW
llvm-svn: 21880
2005-05-11 23:43:56 +00:00
06bbeb646f
Fix the last remaining bug preventing us from switching the X86 BE over
...
from the simple isel to the pattern isel. This forces inserted libcalls
to serialize against other function calls, which was breaking
UnitTests/2005-05-12-Int64ToFP. Hopefully this will fix issues on other
targets as well.
llvm-svn: 21872
2005-05-11 19:02:11 +00:00
724f7eec77
Do not memoize ADJCALLSTACKDOWN nodes, provide a method to hack on them.
...
llvm-svn: 21871
2005-05-11 18:57:39 +00:00
490769c5b6
wrap long line
...
llvm-svn: 21870
2005-05-11 18:57:06 +00:00
56add05671
Make sure to legalize generated ctpop nodes, convert tabs to spaces
...
llvm-svn: 21868
2005-05-11 18:35:21 +00:00
a1ebbac9c0
expand count-leading/trailing-zeros; the test 2005-05-11-Popcount-ffs-fls.c
...
should now pass (the "LLVM" and "REF" results should be identical)
llvm-svn: 21866
2005-05-11 08:45:08 +00:00
7247324047
Add some notes for expanding clz/ctz
...
llvm-svn: 21862
2005-05-11 05:27:09 +00:00
05309bf58e
Simplify this code, use the proper shift amount
...
llvm-svn: 21861
2005-05-11 05:21:31 +00:00
3740f39883
Legalize this correctly
...
llvm-svn: 21859
2005-05-11 05:09:47 +00:00
55e9cde37c
implement expansion of ctpop nodes, implementing CodeGen/Generic/llvm-ct-intrinsics.ll
...
llvm-svn: 21856
2005-05-11 04:51:16 +00:00
93f4f5f467
Print bit count nodes correctly
...
llvm-svn: 21855
2005-05-11 04:50:30 +00:00
915594d884
Silence some VC++ warnings
...
llvm-svn: 21838
2005-05-10 02:22:38 +00:00
2d8b55c476
The semantics of cast X to bool are a comparison against zero, not a truncation!
...
llvm-svn: 21833
2005-05-09 22:17:13 +00:00
ba45e6c432
legalize readio/writeio into a load/store if requested
...
llvm-svn: 21827
2005-05-09 20:36:57 +00:00
5385db5523
legalize READPORT, WRITEPORT, READIO, WRITEIO, at least in the basic cases
...
where they are directly supported by the architecture. Wrap a bunch of
long lines :(
llvm-svn: 21826
2005-05-09 20:23:03 +00:00
20eaeae966
Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics
...
llvm-svn: 21825
2005-05-09 20:22:36 +00:00
67ab94510d
Add support for READPORT, WRITEPORT, READIO, WRITEIO
...
llvm-svn: 21824
2005-05-09 20:22:17 +00:00
1ab1691da9
Fold shifts into subsequent SHL's. These shifts often arise due to addrses
...
arithmetic lowering.
llvm-svn: 21818
2005-05-09 17:06:45 +00:00
57d294f2ac
Don't use the load/store instruction as the source pointer, use the pointer
...
being stored/loaded through!
llvm-svn: 21806
2005-05-09 04:28:51 +00:00
c14f354895
memoize all nodes, even null Value* nodes. Do not add two token chain outputs
...
llvm-svn: 21805
2005-05-09 04:14:13 +00:00
f5675a0813
wrap long lines
...
llvm-svn: 21804
2005-05-09 04:08:33 +00:00
9440d6e260
Print SrcValue nodes correctly
...
llvm-svn: 21803
2005-05-09 04:08:27 +00:00
7876156ba0
When hitting an unsupported intrinsic, actually print it
...
Lower debug info to noops.
llvm-svn: 21698
2005-05-05 17:55:17 +00:00
2dbbb3ab84
ctpop lowering in legalize
...
llvm-svn: 21697
2005-05-05 15:55:21 +00:00
dd426dd04d
Make promoteOp work for CT*
...
Proof?
ubyte %bar(ubyte %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
}
==>
zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1
llvm-svn: 21691
2005-05-04 19:11:05 +00:00
5e177826fd
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
...
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
8002640eab
Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch
...
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.
llvm-svn: 21636
2005-04-30 04:43:14 +00:00
9d6fa98ec7
Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21606
2005-04-28 21:44:33 +00:00
2f82d2d58a
Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21605
2005-04-28 21:44:03 +00:00
4a73c2cfdc
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
...
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
cfa7ddd6e2
Fold (X > -1) | (Y > -1) --> (X&Y > -1)
...
llvm-svn: 21552
2005-04-26 01:18:33 +00:00
f806459d90
implement some more logical compares with constants, so that:
...
int foo1(int x, int y) {
int t1 = x >= 0;
int t2 = y >= 0;
return t1 & t2;
}
int foo2(int x, int y) {
int t1 = x == -1;
int t2 = y == -1;
return t1 & t2;
}
produces:
_foo1:
or r2, r4, r3
srwi r2, r2, 31
xori r3, r2, 1
blr
_foo2:
and r2, r4, r3
addic r2, r2, 1
li r2, 0
addze r3, r2
blr
instead of:
_foo1:
srwi r2, r4, 31
xori r2, r2, 1
srwi r3, r3, 31
xori r3, r3, 1
and r3, r2, r3
blr
_foo2:
addic r2, r4, 1
li r2, 0
addze r2, r2
addic r3, r3, 1
li r3, 0
addze r3, r3
and r3, r2, r3
blr
llvm-svn: 21547
2005-04-25 21:20:28 +00:00
d373ff64aa
Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to:
...
_foo:
or r2, r4, r3
srwi r3, r2, 31
blr
instead of:
_foo:
srwi r2, r4, 31
srwi r3, r3, 31
or r3, r2, r3
blr
llvm-svn: 21544
2005-04-25 21:03:25 +00:00
774511633d
Convert tabs to spaces
...
llvm-svn: 21439
2005-04-22 04:01:18 +00:00
835702a094
Remove trailing whitespace
...
llvm-svn: 21420
2005-04-21 22:36:52 +00:00
f6302441f0
Improve and elimination. On PPC, for:
...
bool %test(int %X) {
%Y = and int %X, 8
%Z = setne int %Y, 0
ret bool %Z
}
we now generate this:
rlwinm r2, r3, 0, 28, 28
srwi r3, r2, 3
instead of this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
I'll leave it to Nate to get it down to one instruction. :)
---------------------------------------------------------------------
llvm-svn: 21391
2005-04-21 06:28:15 +00:00
ab1ed77570
Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3.
...
This turns this PPC code:
rlwinm r2, r3, 0, 28, 28
cmpwi cr7, r2, 8
mfcr r2
rlwinm r3, r2, 31, 31, 31
into this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
Next up, nuking the extra and.
llvm-svn: 21390
2005-04-21 06:12:41 +00:00
b61ecb5875
Fold setcc of MVT::i1 operands into logical operations
...
llvm-svn: 21319
2005-04-18 04:48:12 +00:00
6d40fd01fe
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
...
llvm-svn: 21318
2005-04-18 04:30:45 +00:00
868d473009
Another simple xform
...
llvm-svn: 21317
2005-04-18 04:11:19 +00:00
bd22d83d15
Fold:
...
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
llvm-svn: 21316
2005-04-18 03:59:53 +00:00
d929f8bcd3
Make the AND elimination operation recursive and significantly more powerful,
...
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 21315
2005-04-18 03:48:41 +00:00
80c095f422
Add a couple missing transforms in getSetCC that were triggering assertions
...
in the PPC Pattern ISel
llvm-svn: 21297
2005-04-14 08:56:52 +00:00
4ddd81657b
Disbale the broken fold of shift + sz[ext] for now
...
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
llvm-svn: 21291
2005-04-13 21:23:31 +00:00
56d177a344
fix an infinite loop
...
llvm-svn: 21289
2005-04-13 20:06:29 +00:00
e3d17d8225
fix some serious miscompiles on ia64, alpha, and ppc
...
llvm-svn: 21288
2005-04-13 19:53:40 +00:00
8c3d409dc7
avoid work when possible, perhaps fix the problem nate and andrew are seeing
...
with != 0 comparisons vanishing.
llvm-svn: 21287
2005-04-13 19:41:05 +00:00
e69ad5fd12
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
llvm-svn: 21280
2005-04-13 05:09:42 +00:00
0efd77eda7
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
llvm-svn: 21275
2005-04-13 03:42:14 +00:00
b1f25ac188
add back the optimization that Nate added for shl X, (zext_inreg y)
...
llvm-svn: 21273
2005-04-13 02:58:13 +00:00
39844ac337
Oops, remove these too.
...
llvm-svn: 21272
2005-04-13 02:47:57 +00:00
0e852afb4c
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
llvm-svn: 21266
2005-04-13 02:38:47 +00:00
2b4e3fca38
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
...
instead. OVerall, this increases the amount of folding we can do.
llvm-svn: 21265
2005-04-13 02:38:18 +00:00
ca916ba4a0
Fold shift x, [sz]ext(y) -> shift x, y
...
llvm-svn: 21262
2005-04-12 23:32:28 +00:00
af1c0f7a00
Fold shift by size larger than type size to undef
...
Make llvm undef values generate ISD::UNDEF nodes
llvm-svn: 21261
2005-04-12 23:12:17 +00:00
0b73a6d8bc
promote extload i1 -> extload i8
...
llvm-svn: 21258
2005-04-12 20:30:10 +00:00
af5b25f139
Remove some redundant checks, add a couple of new ones. This allows us to
...
compile this:
int foo (unsigned long a, unsigned long long g) {
return a >= g;
}
To:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
cmpl $0, 12(%esp)
sete %cl
andb %al, %cl
movzbl %cl, %eax
ret
instead of:
foo:
movl 8(%esp), %eax
cmpl %eax, 4(%esp)
setae %al
movzbw %al, %cx
movl 12(%esp), %edx
cmpl $0, %edx
sete %al
movzbw %al, %ax
cmpl $0, %edx
cmove %cx, %ax
movzbl %al, %eax
ret
llvm-svn: 21244
2005-04-12 02:54:39 +00:00
aedcabe8db
Emit comparisons against the sign bit better. Codegen this:
...
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
llvm-svn: 21243
2005-04-12 02:19:10 +00:00
71ff44e46c
Emit long comparison against -1 better. Instead of this (x86):
...
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
llvm-svn: 21242
2005-04-12 01:46:05 +00:00
87bd69884a
canonicalize x <u 1 -> x == 0. On this testcase:
...
unsigned long long g;
unsigned long foo (unsigned long a) {
return (a >= g) ? 1 : 0;
}
It changes the ppc code from:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cmplwi cr0, r4, 1
li r3, 1
li r5, 0
blt .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r3, r5, r5
.LBB_foo_4: ; entry
cmpwi cr0, r4, 0
beq .LBB_foo_6 ; entry
.LBB_foo_5: ; entry
or r2, r3, r3
.LBB_foo_6: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
to:
_foo:
.LBB_foo_0: ; entry
mflr r11
stw r11, 8(r1)
bl "L00000$pb"
"L00000$pb":
mflr r2
addis r2, r2, ha16(L_g$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_g$non_lazy_ptr-"L00000$pb")(r2)
lwz r4, 0(r2)
lwz r2, 4(r2)
cmplw cr0, r3, r2
li r2, 1
li r3, 0
bge .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
or r2, r3, r3
.LBB_foo_2: ; entry
cntlzw r3, r4
srwi r3, r3, 5
cmpwi cr0, r4, 0
beq .LBB_foo_4 ; entry
.LBB_foo_3: ; entry
or r2, r3, r3
.LBB_foo_4: ; entry
rlwinm r3, r2, 0, 31, 31
lwz r11, 8(r1)
mtlr r11
blr
llvm-svn: 21241
2005-04-12 00:28:49 +00:00
8ffd004920
Teach the dag mechanism that this:
...
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21231
2005-04-11 20:29:59 +00:00
edd197062f
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
...
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21230
2005-04-11 20:08:52 +00:00
add0c63ad2
Fix libcall code to not pass a NULL Chain to LowerCallTo
...
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node
when it is known that there is no ADJCALLSTACKDOWN to match.
Expand i64 multiply when ISD::MULHU is legal for the target.
llvm-svn: 21214
2005-04-11 03:01:51 +00:00
e2427c9afc
Don't bother sign/zext_inreg'ing the result of an and operation if we know
...
the result does change as a result of the extend.
This improves codegen for Alpha on this testcase:
int %a(ushort* %i) {
%tmp.1 = load ushort* %i
%tmp.2 = cast ushort %tmp.1 to int
%tmp.4 = and int %tmp.2, 1
ret int %tmp.4
}
Generating:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
ret $31,($26),1
instead of:
a:
ldgp $29, 0($27)
ldwu $0,0($16)
and $0,1,$0
addl $0,0,$0
ret $31,($26),1
btw, alpha really should switch to livein/outs for args :)
llvm-svn: 21213
2005-04-10 23:37:16 +00:00
a3b7ef05f4
Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs
...
llvm-svn: 21212
2005-04-10 22:54:25 +00:00
391a351ede
don't zextload fp values!
...
llvm-svn: 21209
2005-04-10 17:40:35 +00:00
c53cd501b5
Until we have a dag combiner, promote using zextload's instead of extloads.
...
This gives the optimizer a bit of information about the top-part of the
value.
llvm-svn: 21205
2005-04-10 04:33:47 +00:00
f74c794ccf
Fold zext_inreg(zextload), likewise for sext's
...
llvm-svn: 21204
2005-04-10 04:33:08 +00:00
f2bff92411
add a simple xform
...
llvm-svn: 21203
2005-04-10 04:04:49 +00:00
d8cbfe82ba
Fix a thinko. If the operand is promoted, pass the promoted value into
...
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
llvm-svn: 21196
2005-04-10 01:13:15 +00:00
da504741da
add a little peephole optimization. This allows us to codegen:
...
int a(short i) {
return i & 1;
}
as
_a:
andi. r3, r3, 1
blr
instead of:
_a:
rlwinm r2, r3, 0, 16, 31
andi. r3, r2, 1
blr
on ppc. It should also help the other risc targets.
llvm-svn: 21189
2005-04-09 21:43:54 +00:00
6a31b878f8
recognize some patterns as fabs operations, so that fabs at the source level
...
is deconstructed then reconstructed here. This catches 19 fabs's in 177.mesa
9 in 168.wupwise, 5 in 171.swim, 3 in 172.mgrid, and 14 in 173.applu out of
specfp2000.
This allows the X86 code generator to make MUCH better code than before for
each of these and saves one instr on ppc.
This depends on the previous CFE patch to expose these correctly.
llvm-svn: 21171
2005-04-09 05:15:53 +00:00
8a98c7f337
Emit BRCONDTWOWAY when possible.
...
llvm-svn: 21167
2005-04-09 03:30:29 +00:00
fd98678a8a
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
...
llvm-svn: 21166
2005-04-09 03:30:19 +00:00
b0713c74a2
print and fold BRCONDTWOWAY correctly
...
llvm-svn: 21165
2005-04-09 03:27:28 +00:00
0ea81f9db4
canonicalize a bunch of operations involving fneg
...
llvm-svn: 21160
2005-04-09 03:02:46 +00:00
b32d9318d2
If a target zero or sign extends the result of its setcc, allow folding of
...
this into sign/zero extension instructions later.
On PPC, for example, this testcase:
%G = external global sbyte
implementation
void %test(int %X, int %Y) {
%C = setlt int %X, %Y
%D = cast bool %C to sbyte
store sbyte %D, sbyte* %G
ret void
}
Now codegens to:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
instead of:
cmpw cr0, r3, r4
li r3, 1
li r4, 0
blt .LBB_test_2 ;
.LBB_test_1: ;
or r3, r4, r4
.LBB_test_2: ;
*** rlwinm r3, r3, 0, 31, 31
addis r2, r2, ha16(L_G$non_lazy_ptr-"L00000$pb")
lwz r2, lo16(L_G$non_lazy_ptr-"L00000$pb")(r2)
stb r3, 0(r2)
llvm-svn: 21148
2005-04-07 19:43:53 +00:00
dfed7355c9
Remove somethign I had for testing
...
llvm-svn: 21144
2005-04-07 18:58:54 +00:00
6b03a0cba1
This patch does two things. First, it canonicalizes 'X >= C' -> 'X > C-1'
...
(likewise for <= >=u >=u).
Second, it implements a special case hack to turn 'X gtu SINTMAX' -> 'X lt 0'
On powerpc, for example, this changes this:
lis r2, 32767
ori r2, r2, 65535
cmplw cr0, r3, r2
bgt .LBB_test_2
into:
cmpwi cr0, r3, 0
blt .LBB_test_2
llvm-svn: 21142
2005-04-07 18:14:58 +00:00
7d13eae254
Fix a really scary bug that Nate found where we weren't deleting the right
...
elements auto of the autoCSE maps.
llvm-svn: 21128
2005-04-07 00:30:13 +00:00
b067492535
Teach ExpandShift how to handle shifts by a constant. This allows targets
...
like PowerPC to codegen long shifts in many fewer instructions.
llvm-svn: 21122
2005-04-06 21:13:14 +00:00
20b7d2a36f
Expand SREM and UREM for targets that claim not to have them, like PowerPC
...
llvm-svn: 21103
2005-04-06 00:23:54 +00:00
55e8625c69
Add MULHU and MULHS nodes for the high part of an (un)signed 32x32=64b
...
multiply.
llvm-svn: 21102
2005-04-05 22:36:56 +00:00
cc00a7c42d
Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC when
...
you have something like i16 = truncate i64. This fixes Regression/C/casts
llvm-svn: 21073
2005-04-04 00:57:08 +00:00
4784489de2
Fix sign_extend and zero_extend of promoted value types to expanded value
...
types. This occurs when casting short to long on PPC for example.
llvm-svn: 21072
2005-04-03 23:41:52 +00:00
0c14000760
transform fabs/fabsf calls into FABS nodes.
...
llvm-svn: 21014
2005-04-02 05:26:53 +00:00
a0c72cf289
Expand fabs into fneg
...
llvm-svn: 21013
2005-04-02 05:26:37 +00:00
f68fd0b533
Turn -0.0 - X -> fneg
...
llvm-svn: 21011
2005-04-02 05:04:50 +00:00
13fe99c807
Several changes mixed up here. First when legalizing a DAG with pcmarker,
...
dont' regen the whole dag if unneccesary. Second, fix and ugly bug with
the _PARTS nodes that caused legalize to produce multiples of them.
Finally, implement initial support for FABS and FNEG. Currently FNEG is
the only one to be trusted though.
llvm-svn: 21009
2005-04-02 05:00:07 +00:00
c4a2046a88
print fneg/fabs
...
llvm-svn: 21008
2005-04-02 04:58:41 +00:00
4157c417a1
fix some bugs in the implementation of SHL_PARTS and friends.
...
llvm-svn: 21004
2005-04-02 04:00:59 +00:00
2e5872c671
Turn expanded shift operations into (e.g.) SHL_PARTS if the target supports it.
...
llvm-svn: 21002
2005-04-02 03:38:53 +00:00
5b7bb56ef8
Print some new nodes
...
llvm-svn: 21001
2005-04-02 03:30:42 +00:00
07f97d5f55
Fix a bug when inserting a libcall into a function with no other calls.
...
llvm-svn: 20999
2005-04-02 03:22:40 +00:00
69d39433c4
Fix a warning about an unhandled switch case
...
llvm-svn: 20994
2005-04-02 00:41:14 +00:00
cda9aa7fa9
Add ISD::UNDEF node
...
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
llvm-svn: 20988
2005-04-01 22:34:39 +00:00
dec53920b4
PCMarker support for DAG and Alpha
...
llvm-svn: 20965
2005-03-31 21:24:06 +00:00
5ca31d9831
Instead of setting up the CFG edges at selectiondag construction time, set
...
them up after the code has been emitted. This allows targets to select one
mbb as multiple mbb's as needed.
llvm-svn: 20937
2005-03-30 01:10:47 +00:00
db45f7d763
Fix a bug that andrew noticed where we do not correctly sign/zero extend
...
returned integer values all of the way to 64-bits (we only did it to 32-bits
leaving the top bits undefined). This causes problems for targets like alpha
whose ABI's define the top bits too.
llvm-svn: 20926
2005-03-29 19:09:56 +00:00
32e08b7c06
implement legalization of build_pair for nate
...
llvm-svn: 20901
2005-03-28 22:03:13 +00:00
f656525cb6
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
531f9e92d4
This mega patch converts us from using Function::a{iterator|begin|end} to
...
using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
llvm-svn: 20597
2005-03-15 04:54:21 +00:00
85e7163947
Fix a bug where we would incorrectly do a sign ext instead of a zero ext
...
because we were checking the wrong thing. Thanks to andrew for pointing
this out!
llvm-svn: 20554
2005-03-10 20:55:51 +00:00
7f26946709
constant fold FP_ROUND_INREG, ZERO_EXTEND_INREG, and SIGN_EXTEND_INREG
...
This allows the alpha backend to compile:
bool %test(uint %P) {
%c = seteq uint %P, 0
ret bool %c
}
into:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
CMPEQ $0,0,$0
AND $0,1,$0
ret $31,($26),1
instead of:
test:
ldgp $29, 0($27)
ZAP $16,240,$0
ldiq $1,0
ZAP $1,240,$1
CMPEQ $0,$1,$0
AND $0,1,$0
ret $31,($26),1
... and fixes PR534.
llvm-svn: 20534
2005-03-09 18:37:12 +00:00
a474313902
Fix a bug in the 'store fpimm, ptr' -> 'store intimm, ptr' handling code.
...
Changing 'op' here caused us to not enter the store into a map, causing
reemission of the code!! In practice, a simple loop like this:
no_exit: ; preds = %no_exit, %entry
%indvar = phi uint [ %indvar.next, %no_exit ], [ 0, %entry ] ; <uint> [#uses=3]
%tmp.4 = getelementptr "complex long double"* %P, uint %indvar, uint 0 ; <double*> [#uses=1]
store double 0.000000e+00, double* %tmp.4
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=2]
%exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1]
br bool %exitcond, label %return, label %no_exit
was being code gen'd to:
.LBBtest_1: # no_exit
movl %edx, %esi
shll $4, %esi
movl $0, 4(%eax,%esi)
movl $0, (%eax,%esi)
incl %edx
movl $0, (%eax,%esi)
movl $0, 4(%eax,%esi)
cmpl %ecx, %edx
jne .LBBtest_1 # no_exit
Note that we are doing 4 32-bit stores instead of 2. Now we generate:
.LBBtest_1: # no_exit
movl %edx, %esi
incl %esi
shll $4, %edx
movl $0, (%eax,%edx)
movl $0, 4(%eax,%edx)
cmpl %ecx, %esi
movl %esi, %edx
jne .LBBtest_1 # no_exit
This is much happier, though it would be even better if the increment of ESI
was scheduled after the compare :-/
llvm-svn: 20265
2005-02-22 07:23:39 +00:00
73e929f89d
Fix compilation errors with VS 2005, patch by Aaron Gray.
...
llvm-svn: 20231
2005-02-17 21:39:27 +00:00
381dddc90c
Don't rely on doubles comparing identical to each other, which doesn't work
...
for 0.0 and -0.0.
llvm-svn: 20230
2005-02-17 20:17:32 +00:00
0c56a548ed
Don't sink argument loads into loops or other bad places. This disables folding of argument loads with instructions that are not in the entry block.
...
llvm-svn: 20228
2005-02-17 19:40:32 +00:00
0559691163
Fix a case where were incorrectly compiled cast from short to int on 64-bit
...
targets.
llvm-svn: 20030
2005-02-04 18:39:19 +00:00
5aa75e4ce5
Fix yet another memset issue.
...
llvm-svn: 19986
2005-02-02 03:44:41 +00:00
4487b2e5a6
Fix some bugs andrew noticed legalizing memset for alpha
...
llvm-svn: 19969
2005-02-01 18:38:28 +00:00
bc7497d5f5
Alpha doesn't have a native f32 extload instruction.
...
llvm-svn: 19880
2005-01-28 22:58:25 +00:00
bf8c1ad313
implement legalization of truncates whose results and sources need to be
...
truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.
llvm-svn: 19879
2005-01-28 22:52:50 +00:00
a4cfafe31a
Get alpha working with memset/memcpy/memmove
...
llvm-svn: 19878
2005-01-28 22:29:18 +00:00
eb6614d719
CopyFromReg produces two values. Make sure that we remember that both are
...
legalized, and actually return the correct result when we legalize the chain first.
llvm-svn: 19866
2005-01-28 06:27:38 +00:00
0dfd7d3a0d
Silence optimized warnings.
...
llvm-svn: 19797
2005-01-23 23:19:44 +00:00
4add7e356f
Adjust to changes in SelectionDAG interfaces
...
The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.
llvm-svn: 19781
2005-01-23 04:42:50 +00:00
90b7c13f3a
Remove the 3 HACK HACK HACKs I put in before, fixing them properly with
...
the new TLI that is available.
Implement support for handling out of range shifts. This allows us to
compile this code (a 64-bit rotate):
unsigned long long f3(unsigned long long x) {
return (x << 32) | (x >> (64-32));
}
into this:
f3:
mov %EDX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
ret
GCC produces this:
$ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer
..
f3:
push %ebx
mov %ebx, DWORD PTR [%esp+12]
mov %ecx, DWORD PTR [%esp+8]
mov %eax, %ebx
mov %edx, %ecx
pop %ebx
ret
The Simple ISEL produces (eww gross):
f3:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %ESI, 0
or %EAX, %ECX
or %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
llvm-svn: 19780
2005-01-23 04:39:44 +00:00
ffcb0ae329
Adjust to changes in SelectionDAG interface.
...
llvm-svn: 19779
2005-01-23 04:36:26 +00:00
eccb73d57f
Get this to work for 64-bit systems.
...
llvm-svn: 19763
2005-01-22 23:04:37 +00:00
3bc78b2e0b
More bugfixes for IA64 shifts.
...
llvm-svn: 19739
2005-01-22 00:33:03 +00:00
ec2183713c
Fix problems with non-x86 targets.
...
llvm-svn: 19738
2005-01-22 00:31:52 +00:00
d637c96fac
Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.
...
llvm-svn: 19737
2005-01-22 00:20:42 +00:00
d53e763f18
Remove unneeded line.
...
llvm-svn: 19736
2005-01-21 23:43:12 +00:00
4f987bf16d
test commit
...
llvm-svn: 19735
2005-01-21 23:38:56 +00:00
96e809c47d
Unary token factor nodes are unneeded.
...
llvm-svn: 19727
2005-01-21 18:01:22 +00:00
aac464e6c0
Refactor libcall code a bit. Initial implementation of expanding int -> FP
...
operations for 64-bit integers.
llvm-svn: 19724
2005-01-21 06:05:23 +00:00
4d25c04f94
Simplify the shift-expansion code.
...
llvm-svn: 19721
2005-01-20 20:29:23 +00:00
b3f83b28a5
Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.
...
llvm-svn: 19715
2005-01-20 18:52:28 +00:00
1fe9b40981
implement add_parts/sub_parts.
...
llvm-svn: 19714
2005-01-20 18:50:55 +00:00
96c26751ec
Support targets that do not use i8 shift amounts.
...
llvm-svn: 19707
2005-01-19 22:31:21 +00:00
3d95c14d94
Add support for targets that pass args in registers to calls.
...
llvm-svn: 19703
2005-01-19 20:24:35 +00:00
55562fa99a
Fold single use token factor nodes into other token factor nodes.
...
llvm-svn: 19701
2005-01-19 19:10:54 +00:00
0d03eb45a8
Realize the individual pieces of an expanded copytoreg/store/load are
...
independent of each other.
llvm-svn: 19700
2005-01-19 18:02:17 +00:00
9b75e148fd
Know some identities about tokenfactor nodes.
...
llvm-svn: 19699
2005-01-19 18:01:40 +00:00
32a5f02598
Know some simple identities. This improves codegen for (1LL << N).
...
llvm-svn: 19698
2005-01-19 17:29:49 +00:00
2a7f8a94f4
Implement a way of expanding shifts. This applies to targets that offer
...
select operations or to shifts that are by a constant. This automatically
implements (with no special code) all of the special cases for shift by 32,
shift by < 32 and shift by > 32.
llvm-svn: 19679
2005-01-19 04:19:40 +00:00
42993e45b6
Zero is cheaper than sign extend.
...
llvm-svn: 19675
2005-01-18 21:57:59 +00:00
d65c3f3118
Fix some fixmes (promoting bools for select and brcond), fix promotion
...
of zero and sign extends.
llvm-svn: 19671
2005-01-18 19:27:06 +00:00
a9d53f9fb9
Keep track of the retval type as well.
...
llvm-svn: 19670
2005-01-18 19:26:36 +00:00
9f2c4a5200
Teach legalize to promote copy(from|to)reg, instead of making the isel pass
...
do it. This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.
llvm-svn: 19668
2005-01-18 17:54:55 +00:00
2cb338d7b5
Teach legalize to promote SetCC results.
...
llvm-svn: 19657
2005-01-18 02:59:52 +00:00
b07e2d2084
Allow setcc operations to have nonbool types.
...
llvm-svn: 19656
2005-01-18 02:52:03 +00:00
2b4b79581d
Fix the completely broken FP constant folds for setcc's.
...
llvm-svn: 19651
2005-01-18 02:11:55 +00:00
4d9651c760
Non-volatile loads can be freely reordered against each other. This fixes
...
X86/reg-pressure.ll again, and allows us to do nice things in other cases.
For example, we now codegen this sort of thing:
int %loadload(int *%X, int* %Y) {
%Z = load int* %Y
%Y = load int* %X ;; load between %Z and store
%Q = add int %Z, 1
store int %Q, int* %Y
ret int %Y
}
Into this:
loadload:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%EAX]
mov %ECX, DWORD PTR [%ESP + 8]
inc DWORD PTR [%ECX]
ret
where we weren't able to form the 'inc [mem]' before. This also lets the
instruction selector emit loads in any order it wants to, which can be good
for register pressure as well.
llvm-svn: 19644
2005-01-17 22:19:26 +00:00
4108bb01cf
Don't call SelectionDAG.getRoot() directly, go through a forwarding method.
...
llvm-svn: 19642
2005-01-17 19:43:36 +00:00
e3c2cf4854
Implement a target independent optimization to codegen arguments only into
...
the basic block that uses them if possible. This is a big win on X86, as it
lets us fold the argument loads into instructions and reduce register pressure
(by not loading all of the arguments in the entry block).
For this (contrived to show the optimization) testcase:
int %argtest(int %A, int %B) {
%X = sub int 12345, %A
br label %L
L:
%Y = add int %X, %B
ret int %Y
}
we used to produce:
argtest:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, 12345
sub %EAX, %ECX
mov %EDX, DWORD PTR [%ESP + 8]
.LBBargtest_1: # L
add %EAX, %EDX
ret
now we produce:
argtest:
mov %EAX, 12345
sub %EAX, DWORD PTR [%ESP + 4]
.LBBargtest_1: # L
add %EAX, DWORD PTR [%ESP + 8]
ret
This also fixes the FIXME in the code.
BTW, this occurs in real code. 164.gzip shrinks from 8623 to 8608 lines of
.s file. The stack frame in huft_build shrinks from 1644->1628 bytes,
inflate_codes shrinks from 116->108 bytes, and inflate_block from 2620->2612,
due to fewer spills.
Take that alkis. :-)
llvm-svn: 19639
2005-01-17 17:55:19 +00:00
16f64df93a
Refactor code into a new method.
...
llvm-svn: 19635
2005-01-17 17:15:02 +00:00
5c8a85e2d8
Implement legalize of call nodes.
...
llvm-svn: 19617
2005-01-16 19:46:48 +00:00
3c0dd46a3b
Revamp supported ops. Instead of just being supported or not, we now keep
...
track of how to deal with it, and provide the target with a hook that they
can use to legalize arbitrary operations in arbitrary ways.
Implement custom lowering for a couple of ops, implement promotion for select
operations (which x86 needs).
llvm-svn: 19613
2005-01-16 07:29:19 +00:00
897cd7dc0a
add method stub
...
llvm-svn: 19612
2005-01-16 07:28:41 +00:00
2c331fbc8f
Don't mash stuff together.
...
llvm-svn: 19611
2005-01-16 07:28:31 +00:00
3ba56b3fe7
Implement some more missing promotions.
...
llvm-svn: 19606
2005-01-16 05:06:12 +00:00
73b6977700
Clarify assertion.
...
llvm-svn: 19597
2005-01-16 02:23:34 +00:00
4e550ebb38
Add assertions.
...
llvm-svn: 19596
2005-01-16 02:23:22 +00:00
209f585033
Add support for promoted registers being live across blocks.
...
llvm-svn: 19595
2005-01-16 02:23:07 +00:00
87a769cbd4
Move some information into the TargetLowering object.
...
llvm-svn: 19583
2005-01-16 01:11:45 +00:00
d58384fca6
Use the new TLI method to get this.
...
llvm-svn: 19582
2005-01-16 01:11:19 +00:00
71d7f6e86f
legalize a bunch of operations that I missed.
...
llvm-svn: 19580
2005-01-16 00:38:00 +00:00
a8d34fb8c6
Add support for targets that require promotions.
...
llvm-svn: 19579
2005-01-16 00:37:38 +00:00
207a962c2c
Fix some serious bugs in promotion.
...
llvm-svn: 19578
2005-01-16 00:17:42 +00:00
0fe7776da5
Eliminate unneeded extensions.
...
llvm-svn: 19577
2005-01-16 00:17:20 +00:00
4d97864e92
Implement promotion of a whole bunch more operators. I think that this is
...
basically everything.
llvm-svn: 19576
2005-01-15 22:16:26 +00:00
630d1937bf
Print extra type for nodes with extra type info.
...
llvm-svn: 19575
2005-01-15 21:11:37 +00:00
99222f706c
Add support for legalizing FP_ROUND_INREG, SIGN_EXTEND_INREG, and
...
ZERO_EXTEND_INREG for targets that don't support them.
llvm-svn: 19573
2005-01-15 07:15:18 +00:00
09d1b3d01d
Common code factored out.
...
llvm-svn: 19572
2005-01-15 07:14:32 +00:00
c6c9a5b07d
Add support for promoting ADD/MUL.
...
Add support for new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
Realize that if we do any promotions, we need to iterate SelectionDAG
construction.
llvm-svn: 19569
2005-01-15 06:18:18 +00:00
1001c6e2cd
Add new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
...
llvm-svn: 19568
2005-01-15 06:17:04 +00:00
1f2c9d82fa
Add intitial support for promoting some operators.
...
llvm-svn: 19565
2005-01-15 05:21:40 +00:00
3b8e719d1d
Adjust to CopyFromReg changes, implement deletion of truncating/extending
...
stores/loads.
llvm-svn: 19562
2005-01-14 22:38:01 +00:00
39c6744c9f
Start implementing truncating stores and extending loads.
...
llvm-svn: 19559
2005-01-14 22:08:15 +00:00
e727af06c8
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
llvm-svn: 19535
2005-01-13 20:50:02 +00:00
2451684678
Don't forget the existing root.
...
llvm-svn: 19531
2005-01-13 19:53:14 +00:00
718b5c2f82
Codegen independent ops as being independent.
...
llvm-svn: 19528
2005-01-13 17:59:43 +00:00
05b4e37e85
Legalize new node, add assertion.
...
llvm-svn: 19527
2005-01-13 17:59:25 +00:00
4b1be0dfeb
Print new node.
...
llvm-svn: 19526
2005-01-13 17:59:10 +00:00
4dfd2cfc0c
Do not fold (zero_ext (sign_ext V)) -> (sign_ext V), they are not the same.
...
This fixes llvm-test/SingleSource/Regression/C/casts.c
llvm-svn: 19519
2005-01-12 18:51:15 +00:00
40e7982c2c
New method
...
llvm-svn: 19517
2005-01-12 18:37:47 +00:00
9864b08f94
Fix sign extend to long. When coming from sbyte, we used to generate:
...
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $7, %edx
Now we generate:
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $31, %edx
Which is right.
llvm-svn: 19515
2005-01-12 18:19:52 +00:00
6dced92447
Shut up warnings with GCC 3.4.3 about uninitialized variables.
...
llvm-svn: 19512
2005-01-12 14:53:45 +00:00
e05a461f1d
Add an option to view the selection dags as they are generated.
...
llvm-svn: 19498
2005-01-12 03:41:21 +00:00
c2785562f1
Print the value types in the nodes of the graph
...
llvm-svn: 19485
2005-01-11 22:21:04 +00:00
613f79fcbb
add an assertion, avoid creating copyfromreg/copytoreg pairs that are the
...
same for PHI nodes.
llvm-svn: 19484
2005-01-11 22:03:46 +00:00
f49c27c65c
Squelch optimized warning.
...
llvm-svn: 19475
2005-01-11 17:46:49 +00:00
85d70c6fd5
Teach legalize to lower MEMSET/MEMCPY/MEMMOVE operations if the target
...
does not support them.
llvm-svn: 19465
2005-01-11 05:57:22 +00:00
844277fb1e
Print new operations.
...
llvm-svn: 19464
2005-01-11 05:57:01 +00:00
875def9b71
Turn memset/memcpy/memmove into the corresponding operations.
...
llvm-svn: 19463
2005-01-11 05:56:49 +00:00
a86fa4455b
shift X, 0 -> X
...
llvm-svn: 19453
2005-01-11 04:25:13 +00:00
1308b488ea
Print SelectionDAGs bottom up, include extra info in the node labels
...
llvm-svn: 19447
2005-01-11 00:34:33 +00:00
b241b443b6
Add a marker for the graph root.
...
llvm-svn: 19445
2005-01-10 23:52:04 +00:00
12be02722f
Put the operation name in each node, put the function name on the graph.
...
llvm-svn: 19444
2005-01-10 23:26:00 +00:00
9e4c76123c
Split out SDNode::getOperationName into its own method.
...
llvm-svn: 19443
2005-01-10 23:25:25 +00:00
7f65075be3
Implement initial selectiondag printing support. This gets us a nice
...
graph with no labels! :)
llvm-svn: 19441
2005-01-10 23:08:40 +00:00
be02d430a9
Lower to the correct functions. This fixes FreeBench/fourinarow
...
llvm-svn: 19436
2005-01-10 21:02:37 +00:00
41b764144d
Implement a couple of more simplifications. This lets us codegen:
...
int test2(int * P, int* Q, int A, int B) {
return P+A == P;
}
into:
test2:
movl 4(%esp), %eax
movl 12(%esp), %eax
shll $2, %eax
cmpl $0, %eax
sete %al
movzbl %al, %eax
ret
instead of:
test2:
movl 4(%esp), %eax
movl 12(%esp), %ecx
leal (%eax,%ecx,4), %ecx
cmpl %eax, %ecx
sete %al
movzbl %al, %eax
ret
ICC is producing worse code:
test2:
movl 4(%esp), %eax #8.5
movl 12(%esp), %edx #8.5
lea (%edx,%edx), %ecx #9.9
addl %ecx, %ecx #9.9
addl %eax, %ecx #9.9
cmpl %eax, %ecx #9.16
movl $0, %eax #9.16
sete %al #9.16
ret #9.16
as is GCC (looks like our old code):
test2:
movl 4(%esp), %edx
movl 12(%esp), %eax
leal (%edx,%eax,4), %ecx
cmpl %edx, %ecx
sete %al
movzbl %al, %eax
ret
llvm-svn: 19430
2005-01-10 02:03:02 +00:00
00c231baa7
Fix incorrect constant folds, fixing Stepanov after the SHR patch.
...
llvm-svn: 19429
2005-01-10 01:16:03 +00:00
0966a75e76
Constant fold shifts, turning this loop:
...
.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $16000, %ecx
sarl $3, %ecx
cmpl %eax, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jg .LBB_Z5test0PdS__3 # no_exit.1
into:
.LBB_Z5test0PdS__3: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__3 # no_exit.1
llvm-svn: 19427
2005-01-10 00:07:15 +00:00
fde3a212e2
Add some folds for == and != comparisons. This allows us to
...
codegen this loop in stepanov:
no_exit.i: ; preds = %entry, %no_exit.i, %then.i, %_Z5checkd.exit
%i.0.0 = phi int [ 0, %entry ], [ %i.0.0, %no_exit.i ], [ %inc.0, %_Z5checkd.exit ], [ %inc.012, %then.i ] ; <int> [#uses=3]
%indvar = phi uint [ %indvar.next, %no_exit.i ], [ 0, %entry ], [ 0, %then.i ], [ 0, %_Z5checkd.exit ] ; <uint> [#uses=3]
%result_addr.i.0 = phi double [ %tmp.4.i.i, %no_exit.i ], [ 0.000000e+00, %entry ], [ 0.000000e+00, %then.i ], [ 0.000000e+00, %_Z5checkd.exit ] ; <double> [#uses=1]
%first_addr.0.i.2.rec = cast uint %indvar to int ; <int> [#uses=1]
%first_addr.0.i.2 = getelementptr [2000 x double]* %data, int 0, uint %indvar ; <double*> [#uses=1]
%inc.i.rec = add int %first_addr.0.i.2.rec, 1 ; <int> [#uses=1]
%inc.i = getelementptr [2000 x double]* %data, int 0, int %inc.i.rec ; <double*> [#uses=1]
%tmp.3.i.i = load double* %first_addr.0.i.2 ; <double> [#uses=1]
%tmp.4.i.i = add double %result_addr.i.0, %tmp.3.i.i ; <double> [#uses=2]
%tmp.2.i = seteq double* %inc.i, getelementptr ([2000 x double]* %data, int 0, int 2000) ; <bool> [#uses=1]
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=1]
br bool %tmp.2.i, label %_Z10accumulateIPddET0_T_S2_S1_.exit, label %no_exit.i
To this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
movl %eax, %ecx
shll $3, %ecx
cmpl $16000, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
instead of this:
.LBB_Z4testIPddEvT_S1_T0__1: # no_exit.i
fldl data(,%eax,8)
fldl 16(%esp)
faddp %st(1)
fstpl 16(%esp)
incl %eax
leal data(,%eax,8), %ecx
leal data+16000, %edx
cmpl %edx, %ecx
#FP_REG_KILL
jne .LBB_Z4testIPddEvT_S1_T0__1 # no_exit.i
llvm-svn: 19425
2005-01-09 20:52:51 +00:00
7d1670da3f
Fix VC++ compilation error
...
llvm-svn: 19423
2005-01-09 20:41:56 +00:00
e6f7882c27
Print the DAG out more like a DAG in nested format.
...
llvm-svn: 19422
2005-01-09 20:38:33 +00:00
1270acc1ce
Print out nodes sorted by their address to make it easier to find them in a list.
...
llvm-svn: 19421
2005-01-09 20:26:36 +00:00
3d5d5022d5
Add a simple transformation. This allows us to compile one of the inner
...
loops in stepanov to this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
cmpl $2000, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
instead of this:
.LBB_Z5test0PdS__2: # no_exit.1
fldl data(,%eax,8)
fldl 24(%esp)
faddp %st(1)
fstl 24(%esp)
incl %eax
movl $data, %ecx
movl %ecx, %edx
addl $16000, %edx
subl %ecx, %edx
movl %edx, %ecx
sarl $2, %ecx
shrl $29, %ecx
addl %ecx, %edx
sarl $3, %edx
cmpl %edx, %eax
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2
The old instruction selector produced:
.LBB_Z5test0PdS__2: # no_exit.1
fldl 24(%esp)
faddl data(,%eax,8)
fstl 24(%esp)
movl %eax, %ecx
incl %ecx
incl %eax
leal data+16000, %edx
movl $data, %edi
subl %edi, %edx
movl %edx, %edi
sarl $2, %edi
shrl $29, %edi
addl %edi, %edx
sarl $3, %edx
cmpl %edx, %ecx
fstpl 16(%esp)
#FP_REG_KILL
jl .LBB_Z5test0PdS__2 # no_exit.1
Which is even worse!
llvm-svn: 19419
2005-01-09 20:09:57 +00:00
9242c504da
Fix a bug legalizing call instructions (make sure to remember all result
...
values), and eliminate some switch statements.
llvm-svn: 19417
2005-01-09 19:43:23 +00:00
02f5ce2077
Fix a minor bug legalizing dynamic_stackalloc. This allows us to compile
...
std::__pad<wchar_t, std::char_traits<wchar_t> >::_S_pad(std::ios_base&, wchar_t, wchar_t*, wchar_t const*, int, int, bool)
from libstdc++
llvm-svn: 19416
2005-01-09 19:07:54 +00:00
ec26b48d61
Teach legalize to deal with DYNAMIC_STACKALLOC (aka a dynamic llvm alloca)
...
llvm-svn: 19415
2005-01-09 19:03:49 +00:00
a2c5d9168c
Handle static alloca arguments to PHI nodes.
...
llvm-svn: 19409
2005-01-09 01:16:24 +00:00
58cfd7945d
Use new interfaces to correctly lower varargs and return/frame address intrinsics.
...
llvm-svn: 19407
2005-01-09 00:00:49 +00:00
18d2b34637
Add support for llvm.setjmp and longjmp. Only 3 SingleSource/UnitTests fail now.
...
llvm-svn: 19404
2005-01-08 22:48:57 +00:00
c0f31c5e96
Tighten up assertions.
...
llvm-svn: 19397
2005-01-08 20:35:13 +00:00
d006195517
Silence VS warnings.
...
llvm-svn: 19384
2005-01-08 19:52:31 +00:00
7e6eeba6c5
Implement handling of most long operators through libcalls.
...
Fix a bug legalizing "ret (Val,Val)"
llvm-svn: 19375
2005-01-08 19:27:05 +00:00
1f45cd7418
Adjust to changes in LowerCAllTo interfaces
...
llvm-svn: 19374
2005-01-08 19:26:18 +00:00
2a6db3c351
Add support for FP->INT conversions and back.
...
llvm-svn: 19369
2005-01-08 08:08:56 +00:00
e69daaf71d
Implement the 'store FPIMM, Ptr' -> 'store INTIMM, Ptr' optimization for
...
all targets.
llvm-svn: 19366
2005-01-08 06:25:56 +00:00
9a97e4d5b6
1ULL << 64 is undefined, don't do it.
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llvm-svn: 19365
2005-01-08 06:24:30 +00:00
e0f1fe181a
Fix a pointer invalidation problem. This fixes Generic/badarg6.ll
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llvm-svn: 19361
2005-01-07 23:32:00 +00:00
5c66e45b92
Fold conditional branches on constants away.
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llvm-svn: 19360
2005-01-07 22:49:57 +00:00
cda3efa6e5
Fix a thinko in the reassociation code, fixing Generic/badlive.ll
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llvm-svn: 19359
2005-01-07 22:44:09 +00:00
a65a2f0c36
Add support for truncating integer casts from long.
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llvm-svn: 19358
2005-01-07 22:37:48 +00:00
ea4ca94cae
Fix a bug in load expansion legalization and ret legalization. This fixes
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CodeGen/Generic/select.ll:castconst.
llvm-svn: 19357
2005-01-07 22:28:47 +00:00
68a12140c0
Legalize unconditional branches too
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llvm-svn: 19356
2005-01-07 22:12:08 +00:00
19a83990e1
Implement support for long GEP indices on 32-bit archs and support for
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int GEP indices on 64-bit archs.
llvm-svn: 19354
2005-01-07 21:56:57 +00:00
4d5ba99283
Simplify: truncate ({zero|sign}_extend (X))
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llvm-svn: 19353
2005-01-07 21:56:24 +00:00
32f20bfa93
implement legalization of a bunch more operators.
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llvm-svn: 19352
2005-01-07 21:45:56 +00:00
fa854eb012
Fix another bug legalizing calls!
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llvm-svn: 19350
2005-01-07 21:35:32 +00:00
8ea875fb05
Fix handling of dead PHI nodes.
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llvm-svn: 19349
2005-01-07 21:34:19 +00:00
f025d6788c
Fix a bug legalizing calls
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llvm-svn: 19348
2005-01-07 21:34:13 +00:00
473825ccec
After legalizing a DAG, delete dead nodes to save space.
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llvm-svn: 19346
2005-01-07 21:09:37 +00:00
9c667933c1
Implement RemoveDeadNodes
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llvm-svn: 19345
2005-01-07 21:09:16 +00:00
ec3fe7c4a8
Teach legalize how to handle condbranches
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llvm-svn: 19339
2005-01-07 08:19:42 +00:00
7a60d91953
Initial implementation of the SelectionDAGISel class. This contains most
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of the code for lowering from LLVM code to a SelectionDAG.
llvm-svn: 19331
2005-01-07 07:47:53 +00:00
f8ba6987a4
This file is obsolete
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llvm-svn: 19330
2005-01-07 07:47:23 +00:00
dc75059005
Initial implementation of the DAG legalization. This still has a long way
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to go, but it does work for some non-trivial cases now.
llvm-svn: 19329
2005-01-07 07:47:09 +00:00
061a1ea9e3
Complete rewrite of the SelectionDAG class.
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llvm-svn: 19327
2005-01-07 07:46:32 +00:00
57cbe39d1e
Change Library Names Not To Conflict With Others When Installed
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llvm-svn: 17286
2004-10-27 23:18:45 +00:00
c1c320c335
We won't use automake
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llvm-svn: 17155
2004-10-22 03:35:04 +00:00
6a11a75f31
Initial automake generated Makefile template
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llvm-svn: 17136
2004-10-18 23:55:41 +00:00
ace94df71f
Update to reflect changes in Makefile rules.
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llvm-svn: 16950
2004-10-13 11:46:52 +00:00
b84cbf2725
Initial version of automake Makefile.am file.
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llvm-svn: 16885
2004-10-10 20:43:57 +00:00
84e5ff7605
Hyphenate target-(in)dependent for more tasty grammar goodness (tm)
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llvm-svn: 16854
2004-10-08 19:43:31 +00:00
eb04d9bcb4
Add #include <iostream> since Value.h does not #include it any more.
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llvm-svn: 14622
2004-07-04 12:19:56 +00:00
6b7275996c
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
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llvm-svn: 14201
2004-06-17 18:19:28 +00:00
560b5e42ab
Finegrainify namespacification
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llvm-svn: 13948
2004-06-02 04:28:06 +00:00
71f1d6d9d8
Fix a trivial but blatant bug
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llvm-svn: 13947
2004-06-02 03:57:43 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
4436c49787
Added LLVM copyright notice to Makefiles.
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llvm-svn: 9312
2003-10-20 22:26:57 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
0605c232b7
rename selection directory and library to SelectionDAG
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llvm-svn: 7877
2003-08-15 04:55:22 +00:00
e81de41edf
Add a bunch of new node types, etc
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llvm-svn: 7875
2003-08-15 04:53:16 +00:00
600d308853
Initial checkin of SelectionDAG implementation. This is still rough and
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unfinished
llvm-svn: 7717
2003-08-11 14:57:33 +00:00
Chris Lattner