2 Commits

Author	SHA1	Message	Date
Sanjay Patel	9d13a18845	[x86] regenerate checks with update_llc_test_checks.py ... The dream of a unified check-line auto-generator for all phases of compilation is dead. The llc script has already diverged to be better at its goal, so having 2 scripts that do almost the same thing is just causing confusion for newcomers. I plan to fix up more x86 tests in a next commit. We can rip out the llc ability in update_test_checks.py after that. llvm-svn: 305202	2017-06-12 17:05:43 +00:00
Sanjay Patel	70c5f02d25	[DAG] disable nsw/nuw for add/sub/mul when simplifying based on demanded bits (PR30841) ... This bug was exposed by using nsw/nuw for more aggressive folds in: https://reviews.llvm.org/rL284844 The changes mimic the IR demanded bits logic in InstCombiner::SimplifyDemandedUseBits(), but we can't just flip flag bits in the DAG; we have to create a new node that has the bits cleared. This should fix: https://llvm.org/bugs/show_bug.cgi?id=30841 llvm-svn: 285656	2016-10-31 23:28:45 +00:00