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Author SHA1 Message Date
Michael Zuckerman f66840020c Reverting commit 306414 on behalf of @gadi.haber 
llvm-svn: 306532
 2017-06-28 11:23:31 +00:00
Gadi Haber 13759a7ed6 Updated and extended the information about each instruction in HSW and SNB to include the following data: 
•static latency
•number of uOps from which the instructions consists
•all ports used by the instruction

Reviewers: 
 RKSimon 
 zvi  
aymanmus  
m_zuckerman 

Differential Revision: https://reviews.llvm.org/D33897
 

llvm-svn: 306414
 2017-06-27 15:05:13 +00:00
Simon Pilgrim e8f8422fe5 [X86][SSE] Add scheduling latency/throughput tests for SSE3 instructions 
llvm-svn: 301126
 2017-04-23 13:59:29 +00:00