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Author SHA1 Message Date
Artyom Skrobov 8653443902 [ARM] In ARMAsmParser, MatchCoprocessorOperandName() permitted p10 and p11 as operands for coprocessor instructions, resulting in encodings that clash with FP/NEON instruction encodings 
llvm-svn: 194253
 2013-11-08 09:16:31 +00:00
Tim Northover 2c45a383a8 ARM: fix more cases where predication may or may not be allowed 
Unfortunately this addresses two issues (by the time I'd disentangled the logic
it wasn't worth putting it back to half-broken):

+ Coprocessor instructions should all be predicable in Thumb mode.
+ BKPT should never be predicable.

llvm-svn: 184965
 2013-06-26 16:52:40 +00:00
Tim Northover 52f77f5cda ARM: allow predicated barriers in Thumb mode 
The barrier instructions are only "always-execute" in ARM mode, they can quite
happily sit inside an IT block in Thumb.

llvm-svn: 184964
 2013-06-26 16:52:32 +00:00