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8 Commits

Author SHA1 Message Date
Benjamin Kramer dd0620ed97 Another instance where GCC doesn't understand implicit construction of StringLiteral. 
llvm-svn: 298703
 2017-03-24 14:17:56 +00:00
Benjamin Kramer 46f5e2c47b Make GCC happy again. 
llvm-svn: 298702
 2017-03-24 14:15:35 +00:00
Benjamin Kramer c06d672a7a Don't build up std::vectors with constant sizes when an array suffices. 
NFC.

llvm-svn: 298701
 2017-03-24 14:11:47 +00:00
Craig Topper bb4089d260 Revert "[AVX-512] EVEX2VEX, don't reject intrinsic instructions when both have a memory operand. We should just continue to check other operands instead." 
This reverts r297596.

There were other issues that were making this not work that have been fixed now. Reverting this results in a more accurate table.

llvm-svn: 297602
 2017-03-13 05:34:03 +00:00
Craig Topper 166085f0f2 [AVX-512] EVEX2VEX, don't reject intrinsic instructions when both have a memory operand. We should just continue to check other operands instead. 
This exposed that we have several intrinsic instructions that have identical TSFlags to other instructions. We should merge their patterns and kill of the duplicate. I'll fix that in a follow up patch.

llvm-svn: 297596
 2017-03-13 00:36:49 +00:00
Craig Topper 9fc4135cc2 [X86] Minor formatting tweaks in EVEX to VEX tables. NFC 
llvm-svn: 297595
 2017-03-13 00:36:46 +00:00
Ayman Musa 63cfb16b93 [X86] Quick fix for build bot failure (r297127) due to unused variable. 
llvm-svn: 297130
 2017-03-07 08:56:27 +00:00
Ayman Musa 850fc977c8 [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX compressing tables. 
X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible.
It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals.
This TableGen backend replaces the tables by automatically generating them.

Differential Revision: https://reviews.llvm.org/D30451

llvm-svn: 297127
 2017-03-07 08:11:19 +00:00