llvm-project

Commit Graph

Author	SHA1	Message	Date
Jinsong Ji	f26bc0ddd5	[RegisterClassInfo] Return non-zero for RC without allocatable reg In some case, the RC may have 0 allocatable reg. eg: VRSAVERC in PowerPC, which has only 1 reg, but it is also reserved. The curreent implementation will keep calling the computePSetLimit because getRegPressureSetLimit assume computePSetLimit will return a non-zero value. The fix simply early return the value from TableGen for such special case. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D92907	2021-01-05 16:18:34 +00:00
Jinsong Ji	02b2c02419	[PowerPC] Precommit testcases for regpressure compute fix	2020-12-09 03:37:00 +00:00

Author

SHA1

Message

Date

Jinsong Ji

f26bc0ddd5

[RegisterClassInfo] Return non-zero for RC without allocatable reg

In some case, the RC may have 0 allocatable reg.
eg: VRSAVERC in PowerPC, which has only 1 reg, but it is also reserved.

The curreent implementation will keep calling the computePSetLimit because
getRegPressureSetLimit assume computePSetLimit will return a non-zero value.

The fix simply early return the value from TableGen for such special case.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D92907

2021-01-05 16:18:34 +00:00

Jinsong Ji

02b2c02419

[PowerPC] Precommit testcases for regpressure compute fix

2020-12-09 03:37:00 +00:00

2 Commits