Commit Graph

6 Commits

Author SHA1 Message Date
Qiu Chaofan 2d9890775f [PowerPC] [NFC] Add AIX triple to some regression tests
As part of the effort to improve AIX support, regression test coverage
misses quite a lot for AIX subtarget. This patch adds AIX triple to
those don't need extra change, and we can cover more cases in following
commits.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94159
2021-01-18 11:44:00 +08:00
Qiu Chaofan f8ef7c99a0 [DAGCombiner] Require ninf for division estimation
Current implementation of division estimation isn't correct for some
cases like 1.0/0.0 (result is nan, not expected inf).

And this change exposes a potential infinite loop: we use
isConstOrConstSplatFP in combineRepeatedFPDivisors to look up if the
divisor is some constant. But it doesn't work after legalized on some
platforms. This patch restricts the method to act before LegalDAG.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D80542
2020-06-14 22:58:22 +08:00
Qiu Chaofan 7a001a2d92 [PowerPC] Require nsz flag for c-a*b to FNMSUB
On PowerPC, FNMSUB (both VSX and non-VSX version) means -(a*b-c). But
the backend used to generate these instructions regardless whether nsz
flag exists or not. If a*b-c==0, such transformation changes sign of
zero.

This patch introduces PPC specific FNMSUB ISD opcode, which may help
improving combined FMA code sequence.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D76585
2020-06-04 16:41:27 +08:00
Qiu Chaofan 2866c6cad4 [NFC] [PowerPC] Narrow fast-math flags in tests
A lot of tests under PowerPC are using fast flag, while fast is just
alias of 7 fast-math flags. This change makes test points clearer.

mc-instrlat.ll and sms-iterator.ll keeps unchanged since they are not
testing fast-math behavior. (one for machine combiner crash, one for
machine pipeliner bug)

Reviewed By: steven.zhang, spatel

Differential Revision: https://reviews.llvm.org/D78989
2020-05-13 17:22:45 +08:00
Jinsong Ji eaf6746db0 [PowerPC] Add missing pattern for VSX Scalar Negative Multiply-Subtract Single Precision
Summary:
This was found during review of https://reviews.llvm.org/D66050.
In the simple test of fdiv, we miss to fold
```
        fneg 2, 2
        xsmaddasp 3, 2, 0
```
to
```
        xsnmsubasp 3, 2, 0
```
We have the patterns for Double Precision and vectors, just missing
Single Precision, the patch add that.

Reviewers: #powerpc, hfinkel, nemanjai, steven.zhang

Reviewed By: #powerpc, steven.zhang

Subscribers: wuzish, hiraditya, kbarton, MaskRay, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67595

llvm-svn: 372985
2019-09-26 15:11:33 +00:00
Jinsong Ji 07d824a7c3 [PowerPC][NFC] Add a testcase for fdiv expansion.
Pre-commit for following patch.

llvm-svn: 371938
2019-09-15 20:02:25 +00:00