b9a6fb6428
[ARM] VBIT/VBIF support added.
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Vector bitwise selects are matched by pseudo VBSP instruction
and expanded to VBSL/VBIT/VBIF after register allocation
depend on operands registers to minimize extra copies.
2020-07-16 11:25:53 +01:00
4879f70ab9
Un-XFAIL file. Comment out individual failing instructions.
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llvm-svn: 141117
2011-10-04 21:16:42 +00:00
f3e1fc3f86
Tidy up formatting.
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llvm-svn: 141115
2011-10-04 20:52:57 +00:00
c3ff538dcf
Fix misspelled target triples in MC/ARM test commands.
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llvm-svn: 121901
2010-12-15 22:14:01 +00:00
ce2250fba4
Fill out support for Thumb2 encodings of NEON instructions.
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llvm-svn: 118854
2010-11-11 23:12:55 +00:00
Pavel Iliin