Commit Graph

709 Commits

Author SHA1 Message Date
Albion Fung ef49d925e2 [PowerPC] Implement trap and conversion builtins for XL compatibility
This patch implements trap and FP to and from double conversions. The builtins
generate code that mirror what is generated from the XL compiler. Intrinsics
are named conventionally with builtin_ppc, but are aliased to provide the same
builtin names as the XL compiler.

Differential Revision: https://reviews.llvm.org/D103668
2021-07-12 11:04:17 -05:00
Derek Schuff ac02baab48 WebAssembly: Update datalayout to match fp128 ABI change
This fix goes along with d1a96e906c
and makes the fp128 alignment match clang's long double alignment.

Differential Revision: https://reviews.llvm.org/D105749
2021-07-09 16:51:36 -07:00
Varun Gandhi 92dcb1d2db [Clang] Introduce Swift async calling convention.
This change is intended as initial setup. The plan is to add
more semantic checks later. I plan to update the documentation
as more semantic checks are added (instead of documenting the
details up front). Most of the code closely mirrors that for
the Swift calling convention. Three places are marked as
[FIXME: swiftasynccc]; those will be addressed once the
corresponding convention is introduced in LLVM.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D95561
2021-07-09 11:50:10 -07:00
Jake Egan 045872f422 [AIX] Define __TOS_AIX__ predefined macro
%%%
Transfer the predefined macro, __TOS_AIX__, from the AIX XL C/C++ compilers.

__TOS_AIX__ indicates that the target operating system is AIX.
%%%

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D103587
2021-07-06 14:15:35 -04:00
Albion Fung 7d10dd60ce [PowerPC] Implament Load and Reserve and Store Conditional Builtins
This patch implaments the load and reserve and store conditional
builtins for the PowerPC target, in order to have feature parody with
xlC on AIX.

Differential revision: https://reviews.llvm.org/D105236
2021-07-05 21:35:41 -05:00
Jake Egan 52f34673ea [AIX] Add _AIX73 version macro
This patch defines _AIX73 version macro for AIX 7.3.

It extends the following patch https://reviews.llvm.org/D61530.

Reviewed By: xgupta

Differential Revision: https://reviews.llvm.org/D105185
2021-07-05 16:28:48 -04:00
Sam Clegg d1a96e906c [clang][emscripten] Reduce alignof long double from 16 to 8 bytes
This means `max_align_t` is 8 bytes which also sets the alignment
malloc.  Since this is technically and ABI breaking change we have
limited to just the emscripten OS target.  It is also relatively low
import breakage since it will only effect the alignement of struct that
contai `long double`s (extremerly rare I imagine).

Emscripten's malloc implementation already use 8 byte alignement
(dlmalloc uses and alignement of 2*sizeof(void*) == 8 rather than
checking max_align_t) so will not be effected by this change.  By
bringing the ABI in line with the current malloc code this will fix
several issue we have seen in the wild.

See: https://github.com/emscripten-core/emscripten/pull/14456

Differential Revision: https://reviews.llvm.org/D104808
2021-07-02 11:05:40 -07:00
Roman Lebedev c2c0d3ea89
Revert "[WebAssembly] Implementation of global.get/set for reftypes in LLVM IR"
This reverts commit 4facbf213c.

```
********************
FAIL: LLVM :: CodeGen/WebAssembly/funcref-call.ll (44466 of 44468)
******************** TEST 'LLVM :: CodeGen/WebAssembly/funcref-call.ll' FAILED ********************
Script:
--
: 'RUN: at line 1';   /builddirs/llvm-project/build-Clang12/bin/llc < /repositories/llvm-project/llvm/test/CodeGen/WebAssembly/funcref-call.ll --mtriple=wasm32-unknown-unknown -asm-verbose=false -mattr=+reference-types | /builddirs/llvm-project/build-Clang12/bin/FileCheck /repositories/llvm-project/llvm/test/CodeGen/WebAssembly/funcref-call.ll
--
Exit Code: 2

Command Output (stderr):
--
llc: /repositories/llvm-project/llvm/include/llvm/Support/LowLevelTypeImpl.h:44: static llvm::LLT llvm::LLT::scalar(unsigned int): Assertion `SizeInBits > 0 && "invalid scalar size"' failed.

```
2021-07-02 11:49:51 +03:00
Paulo Matos 4facbf213c [WebAssembly] Implementation of global.get/set for reftypes in LLVM IR
Reland of 31859f896.

This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Differential Revision: https://reviews.llvm.org/D104797
2021-07-02 09:46:28 +02:00
Melanie Blower e773216f46 [clang][patch] Add builtin __arithmetic_fence and option fprotect-parens
This patch adds a new clang builtin, __arithmetic_fence. The purpose of the
builtin is to provide the user fine control, at the expression level, over
floating point optimization when -ffast-math (-ffp-model=fast) is enabled.
The builtin prevents the optimizer from rearranging floating point expression
evaluation. The new option fprotect-parens has the same effect on
parenthesized expressions, forcing the optimizer to respect the parentheses.

Reviewed By: aaron.ballman, kpn

Differential Revision: https://reviews.llvm.org/D100118
2021-06-30 09:58:06 -04:00
Melanie Blower aaba37187f [clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D104729
2021-06-29 13:26:23 -04:00
Tianqing Wang d8faf03807 [X86] Add -mgeneral-regs-only support.
Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D103943
2021-06-29 16:02:51 +08:00
Melanie Blower 1d85d0879a Revert "[clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options"
This reverts commit 2dbe1c675f.
More buildbot failures
2021-06-28 15:47:21 -04:00
Melanie Blower 2dbe1c675f [clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D104729
2021-06-28 15:09:53 -04:00
Melanie Blower c27e5a2a8e Revert "[clang][patch][fpenv] Add builtin __arithmetic_fence and option fprotect-parens"
This reverts commit 4f1238e44d.
Buildbot fails on predecessor patch
2021-06-28 12:42:59 -04:00
Melanie Blower 8815ef823c Revert "[clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options"
This reverts commit 2c02b0c3f4.
buildbot fails
2021-06-28 12:42:59 -04:00
Melanie Blower 4f1238e44d [clang][patch][fpenv] Add builtin __arithmetic_fence and option fprotect-parens
This patch adds a new clang builtin, __arithmetic_fence. The purpose of the
builtin is to provide the user fine control, at the expression level, over
floating point optimization when -ffast-math (-ffp-model=fast) is enabled.
The builtin prevents the optimizer from rearranging floating point expression
evaluation. The new option fprotect-parens has the same effect on
parenthesized expressions, forcing the optimizer to respect the parentheses.

Reviewed By: aaron.ballman, kpn

Differential Revision: https://reviews.llvm.org/D100118
2021-06-28 12:26:53 -04:00
Melanie Blower 2c02b0c3f4 [clang][PATCH][nfc] Refactor TargetInfo::adjust to pass DiagnosticsEngine to allow diagnostics on target-unsupported options
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D104729
2021-06-28 12:26:53 -04:00
Jinsong Ji eb237ffca8 [PowerPC] Add XL Compat fetch builtins
Prototype
```
unsigned int __fetch_and_add (volatile unsigned int* addr, unsigned int
val);
unsigned long __fetch_and_addlp (volatile unsigned long* addr, unsigned
long val);
```
Ref:
https://www.ibm.com/docs/en/xl-c-and-cpp-linux/16.1.1?topic=functions-fetch

Reviewed By: #powerpc, w2yehia, lkail

Differential Revision: https://reviews.llvm.org/D104991
2021-06-28 02:52:32 +00:00
Jinsong Ji f3ef4f5bff [PowerPC] Add XL compat __compare_and_swap builtins
Prototype
int __compare_and_swap (volatile int* addr, int* old_val_addr, int
new_val);

int __compare_and_swaplp (volatile long* addr, long* old_val_addr, long
new_val);

Refer to
https://www.ibm.com/docs/en/xl-c-and-cpp-aix/16.1?topic=functions-compare-swap-compare-swaplp

Reviewed By: w2yehia

Differential Revision: https://reviews.llvm.org/D104837
2021-06-25 01:08:48 +00:00
Aakanksha Patil 3453f3dd46 [AMDGPU] Add gfx1035 target
Differential Revision: https://reviews.llvm.org/D104804
2021-06-24 14:32:41 -04:00
Quinn Pham 994bb937f0 [PowerPC] Moving defineXLCompatMacros() definition
Moving the definition of the defineXLCompatMacros function from
the header file clang/lib/Basic/Targets/PPC.h to the source file
clang/lib/Basic/Targets/PPC.cpp.

Differential revision: https://reviews.llvm.org/D104125
2021-06-15 14:25:43 -05:00
Krzysztof Parzyszek 0577f4b178 [Hexagon] Add HVX and control register names to Hexagon target 2021-06-14 17:14:37 -05:00
Haojian Wu a83ef21ff8 Fix -Wswitch warning after 092c303955. 2021-06-14 11:52:49 +02:00
serge-sans-paille 092c303955 AMD k8 family does not support SSE4.x which are required by x86-64-v2+
So don't define __tune__k8__ for these micro architecture.

SSE, SSE2 and SSE3 appear in https://www.amd.com/system/files/TechDocs/25112.PDF
but not SSE4.x.

Differential Revision: https://reviews.llvm.org/D104116
2021-06-14 07:17:30 +02:00
David Spickett 64de8763aa Revert "Implementation of global.get/set for reftypes in LLVM IR"
This reverts commit 31859f896c.

Causing SVE and RISCV-V test failures on bots.
2021-06-10 10:11:17 +00:00
Paulo Matos 31859f896c Implementation of global.get/set for reftypes in LLVM IR
This change implements new DAG notes GLOBAL_GET/GLOBAL_SET, and
lowering methods for load and stores of reference types from IR
globals. Once the lowering creates the new nodes, tablegen pattern
matches those and converts them to Wasm global.get/set.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D95425
2021-06-10 10:07:45 +02:00
Chris Bowler e48880078a Fix LIT test failure encountered on AIX
```
fatal error: error in backend: getLangStandardForKind() on unspecified kind
```

Clang :: Modules/preprocess-module.cpp
Clang :: Modules/no-module-map.cpp
Clang :: Modules/preprocess-build-diamond.m
Clang :: Modules/preprocess-decluse.cpp
Clang :: Modules/string_names.cpp

Fix to prior commit f38eff777e, D103707
2021-06-08 23:56:42 -04:00
Brendon Cahoon 294efbbd3e Reland "[AMDGPU] Add gfx1013 target"
This reverts commit 211e584fa2.

Fixed a use-after-free error that caused the sanitizers to fail.
2021-06-08 21:15:35 -04:00
Brendon Cahoon 211e584fa2 Revert "[AMDGPU] Add gfx1013 target"
This reverts commit ea10a86984.

A sanitizer buildbot reports an error.
2021-06-08 16:29:41 -04:00
Brendon Cahoon ea10a86984 [AMDGPU] Add gfx1013 target
Differential Revision: https://reviews.llvm.org/D103663
2021-06-08 12:49:49 -04:00
Jake.Egan f38eff777e [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__
Revert/reapply to fix Git authorship metadata

Differential Revision: https://reviews.llvm.org/D103707
2021-06-07 22:45:41 -04:00
Chris Bowler f97e01e61a Revert "[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros"
This reverts commit e6629be31e.
2021-06-07 22:45:41 -04:00
=Jake Egan e6629be31e [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ predefined macros
Differential Revision: https://reviews.llvm.org/D103707
2021-06-07 22:04:18 -04:00
Harald van Dijk 75521bd9d8
[X32] Add Triple::isX32(), use it.
So far, support for x86_64-linux-gnux32 has been handled by explicit
comparisons of Triple.getEnvironment() to GNUX32. This worked as long as
x86_64-linux-gnux32 was the only X32 environment to worry about, but we
now have x86_64-linux-muslx32 as well. To support this, this change adds
an isX32() function and uses it. It replaces all checks for GNUX32 or
MuslX32 by isX32(), except for the following:

- Triple::isGNUEnvironment() and Triple::isMusl() are supposed to treat
  GNUX32 and MuslX32 differently.
- computeTargetTriple() needs to be able to transform triples to add or
  remove X32 from the environment and needs to map GNU to GNUX32, and
  Musl to MuslX32.
- getMultiarchTriple() completely lacks any Musl support and retains the
  explicit check for GNUX32 as it can only return x86_64-linux-gnux32.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D103777
2021-06-07 20:48:39 +01:00
Jason Zheng 333987b045 [OpenCL] Add DWARF address spaces mapping for SPIR
Extend debug info handling by adding DWARF address space mapping for
SPIR, with corresponding test case.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D103097
2021-06-04 18:10:54 +01:00
Quinn Pham 62b5df7fe2 [PowerPC] Added multiple PowerPC builtins
This is the first in a series of patches to provide builtins for
compatibility with the XL compiler. Most of the builtins already had
intrinsics and only needed to be implemented in the front end.
Intrinsics were created for the three iospace builtins, eieio, and icbt.
Pseudo instructions were created for eieio and iospace_eieio to
ensure that nops were inserted before the eieio instruction.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D102443
2021-05-27 16:23:03 -05:00
Qiu Chaofan 5c18d11366 [SPE] Disable strict-fp for SPE by default
As discussed in PR50385, strict-fp on PowerPC SPE has not been handled
well. This patch disables it by default for SPE.

Reviewed By: nemanjai, vit9696, jhibbits

Differential Revision: https://reviews.llvm.org/D103235
2021-05-28 00:14:35 +08:00
Min-Yih Hsu 6685a3f3e4 [cfe] Support target-specific escaped character in inline asm
GCC allows each target to define a set of non-letter and non-digit
escaped characters for inline assembly that will be replaced by another
string (They call this "punctuation" characters. The existing "%%" and
"%{" -- replaced by '%' and '{' at the end -- can be seen as special
cases shared by all targets).
This patch implements this feature by adding a new hook in `TargetInfo`.

Differential Revision: https://reviews.llvm.org/D103036
2021-05-24 21:39:21 -07:00
Anastasia Stulova 237c6924bd [OpenCL] Add clang extension for bit-fields.
Allow use of bit-fields as a clang extension
in OpenCL. The extension can be enabled using
pragma directives.

This fixes PR45339!

Differential Revision: https://reviews.llvm.org/D101843
2021-05-24 12:42:17 +01:00
Anton Zabaznov 826905787a [OpenCL] Add support of OpenCL C 3.0 __opencl_c_fp64
There already exists cl_khr_fp64 extension. So OpenCL C 3.0
and higher should use the feature, earlier versions still
use the extension. OpenCL C 3.0 API spec states that extension
will be not described in the option string if corresponding
optional functionality is not supported (see 4.2. Querying Devices).
Due to that fact the usage of features for OpenCL C 3.0 must
be as follows:

```
$ clang -Xclang -cl-ext=+cl_khr_fp64,+__opencl_c_fp64 ...

$ clang -Xclang -cl-ext=-cl_khr_fp64,-__opencl_c_fp64 ...
```

e.g. the feature and the equivalent extension (if exists)
must be set to the same values

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D96524
2021-05-21 15:01:19 +03:00
Min-Yih Hsu dccf5c7dfb [M68k] Support for inline asm operands w/ simple constraints
This patch adds supports for inline assembly operands and some simple
operand constraints, including register and constant operands.

Differential Revision: https://reviews.llvm.org/D102585
2021-05-20 14:00:09 -07:00
Melanie Blower d30dfa8676 [clang][patch] Add support for option -fextend-arguments={32,64}: widen integer arguments to int64 in unprototyped function calls
Reviewed By: Aaron Ballman

Differential Revision: https://reviews.llvm.org/D101640
2021-05-19 10:59:56 -04:00
Alexey Bader 2ab513cd3e [SYCL] Enable `opencl_global_[host,device]` attributes for SYCL
Differential Revision: https://reviews.llvm.org/D100396
2021-05-18 10:27:35 +03:00
Ben Shi b99e2c5616 [clang][AVR] Redefine [u]int16_t to be compatible with avr-gcc
Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D102547
2021-05-18 07:06:12 +08:00
Alessandro Decina 833e9b2ea7 [BPF] add support for 32 bit registers in inline asm
Add "w" constraint type which allows selecting 32 bit registers.
32 bit registers were added in https://reviews.llvm.org/rGca31c3bb3ff149850b664838fbbc7d40ce571879.

Differential Revision: https://reviews.llvm.org/D102118
2021-05-16 11:01:47 -07:00
David Candler 3d59f9d224 [ARM][AArch64] Correct __ARM_FEATURE_CRYPTO macro and crypto feature
This patch contains a couple of minor corrections to my previous
crypto patch:

Since both AArch32 and AArch64 are now correctly setting the aes and
sha2 features individually, it is not necessary to continue to check
the crypto feature when defining feature macros.

In the AArch32 driver, the feature vector is only modified when the
crypto feature is actually in the vector. If crypto is not present,
there is no need to split it and explicitly define crypto/sha2/aes.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D102406
2021-05-14 14:19:46 +01:00
Aakanksha Patil 464e4dc50f [AMDGPU] Add gfx1034 target
Differential Revision: https://reviews.llvm.org/D102306
2021-05-13 14:25:18 -04:00
Lei Huang 9469ff15b7 [PowerPC] Add clang option -m[no-]prefixed
Add user-facing front end option to turn off power10 prefixed instructions.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D102191
2021-05-13 12:02:10 -05:00
Ben Shi 892c56eabe [clang][AVR] Redefine some types to be compatible with avr-gcc
Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D100701
2021-05-12 22:05:26 +08:00