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4 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov f86e4b7266 [AMDGPU] Add f16 support (VI+) 
Differential Revision: https://reviews.llvm.org/D25975

llvm-svn: 286753
 2016-11-13 07:01:11 +00:00
Matt Arsenault 5d8eb25e78 AMDGPU: Use unsigned compare for eq/ne 
For some reason there are both of these available, except
for scalar 64-bit compares which only has u64. I'm not sure
why there are both (I'm guessing it's for the one bit inputs we
don't use), but for consistency always using the
unsigned one.

llvm-svn: 282832
 2016-09-30 01:50:20 +00:00
Valery Pykhtin 355103f6c0 [AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions 
Differential revision: https://reviews.llvm.org/D24738

llvm-svn: 282234
 2016-09-23 09:08:07 +00:00
Valery Pykhtin 2828b9be1e [AMDGPU] Refactor VOPC instruction TD definitions 
Differential Revision: https://reviews.llvm.org/D24546

llvm-svn: 281903
 2016-09-19 14:39:49 +00:00