Commit Graph

182 Commits

Author SHA1 Message Date
Lei Huang caf7243a6b [PowerPC] Fix signatures for vec_replace_unaligned builtin
``vec_replace_unaligned`` is meant to return vuc to emphasize that elements
are being inserted on unnatural boundaries.

Reviewed By: amyk, quinnp

Differential Revision: https://reviews.llvm.org/D128288
2022-06-29 09:35:52 -05:00
Maryam Moghadas a9ddb7d54e [PowerPC] Fixing implicit castings in altivec for -fno-lax-vector-conversions
XL considers different vector types to be incompatible with each other.
For example assignment between variables of types vector float and vector
long long or even vector signed int and vector unsigned int are diagnosed.
clang, however does not diagnose such cases and does a simple bitcast between
the two types. This could easily result in program errors. This patch is to
fix the implicit casts in altivec.h so that there is no incompatible vector
type errors whit -fno-lax-vector-conversions, this is the prerequisite patch
to switch the default to -fno-lax-vector-conversions later.

Reviewed By: nemanjai, amyk

Differential Revision: https://reviews.llvm.org/D124093
2022-06-16 17:07:03 -05:00
Nemanja Ivanovic dc1aa8eacd [PowerPC] Add missed clang portion of c933c2eb33
The clang portion of c933c2eb33 was missed as I made
some kind of mistake squashing the commits with git.
This patch just adds those.

The original review: https://reviews.llvm.org/D114088
2021-11-24 12:42:58 -06:00
Nemanja Ivanovic b7bf937bbe [PowerPC] Provide XL-compatible vec_round implementation
The XL implementation of vec_round for vector double uses
"round-to-nearest, ties to even" just as the vector float
`version does. However clang and gcc use "round-to-nearest-away"
for vector double and "round-to-nearest, ties to even"
for vector float.

The XL behaviour is implemented under the __XL_COMPAT_ALTIVEC__
macro similarly to other instances of incompatibility.

Differential revision: https://reviews.llvm.org/D113642
2021-11-24 06:43:56 -06:00
Amy Kwan 03bfddae50 [NFC] Update vec_extract builtin signatures to take signed int.
This patch updates the vec_extract builtins to take a signed int as the second
parameter, as defined by the Power Vector Intrinsics Programming Reference.
This patch is NFC and all existing tests pass.

Differential Revision: https://reviews.llvm.org/D110935
2021-10-08 15:09:53 -05:00
Amy Kwan 74b1ac7155 [NFC] Update return type of vec_popcnt to vector unsigned.
This patch updates the vec_popcnt builtins to return vector unsigned,
as defined by the Power Vector Intrinsics Programming Reference.
This patch is NFC and all existing tests pass.

Differential Revision: https://reviews.llvm.org/D110934
2021-10-07 11:33:19 -05:00
Albion Fung 13d3cd37e2 [PowerPC] Implement vector float and vector double version for vec_orc builtin
The builtin for vec_orc has support for the following two signatures,
but currently the compiler marks it ambiguous:
vector float vec_orc(vector float, vector float)
vector double vec_orc(vector double, vector double)

This patch implements these two builtins.

Differential revision: https://reviews.llvm.org/D110858
2021-10-06 02:47:42 -05:00
Lei Huang 8b3d944a97 [PowerPC] Disable vector types when not supported by subtarget features
Update clang to treat vector unsigned long long and friends as invalid
for AltiVec without VSX.

Reported in: https://bugs.llvm.org/show_bug.cgi?id=47782

Reviewed By: nemanjai, amyk

Differential Revision: https://reviews.llvm.org/D109178
2021-10-04 14:16:47 -05:00
Nemanja Ivanovic 369d785574 [PowerPC] Optimal sequence for doubleword vec_all_{eq|ne} on Power7
These builtins produce inefficient code for CPU's prior to Power8
due to vcmpequd being unavailable. The predicate forms can actually
leverage the available vcmpequw along with xxlxor to produce a better
sequence.
2021-10-01 08:27:15 -05:00
Nemanja Ivanovic fad14a17a4 [PowerPC] Truncate element index for vec_insert in altivec.h
When a user specifies an out-of-range index for vec_insert, we
just produce IR that has undefined behaviour even though the
documentation states that modulo arithmetic is used. This patch
just truncates the value to a valid index.
2021-09-30 05:58:22 -05:00
Nemanja Ivanovic 09b67aa1c3 [PowerPC] Implement builtin for vbpermd
The instruction has similar semantics to vbpermq but for doublewords.
It was added in Power9 and the ABI documents the builtin.

Differential revision: https://reviews.llvm.org/D107899
2021-09-29 06:34:31 -05:00
Quinn Pham f9912fe4ea [PowerPC] Add range checks for P10 Vector Builtins
This patch adds range checking for some Power10 altivec builtins and
changes the signature of a builtin to match documentation. For `vec_cntm`,
range checking is done via SemaChecking. For `vec_splati_ins`, the second
argument is masked to extract the 0th bit so that we always receive either a `0`
or a `1`.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D109710
2021-09-23 11:05:49 -05:00
Albion Fung b93359ea3f [PowerPC] Support for vector bool int128 on vector comparison builtins
This patch implements support for the type vector bool int128
for arguments on vector comparison builtins listed below,
which would otherwise crash due to ambiguity.

The following builtins are added:

vec_all_eq (vector bool __int128, vector bool __int128)
vec_all_ne (vector bool __int128, vector bool __int128)
vec_any_eq (vector bool __int128, vector bool __int128)
vec_any_ne (vector bool __int128, vector bool __int128)
vec_cmpne(vector bool __int128 a, vector bool __int128 b)
vec_cmpeq(vector bool __int128 a, vector bool __int128 b)

Differential revision: https://reviews.llvm.org/D110084
2021-09-21 16:29:37 -05:00
Victor Huang 2e5c17d19e [PowerPC][NFC] Rename P10 builtins vec_clrl, vec_clrr to vec_clr_first and vec_clr_last
This patch renames the vector clear left/right builtins vec_clrl, vec_clrr to
vec_clr_first and vec_clr_last to avoid the ambiguities when dealing with endianness.

Reviewed By: amyk, lei

Differential revision: https://reviews.llvm.org/D108702
2021-08-30 09:52:15 -05:00
Nemanja Ivanovic 9019b55b60 [PowerPC] Fix byte ordering of ld/st with length on BE
The builtins vec_xl_len_r and vec_xst_len_r actually use the
wrong side of the vector on big endian Power9 systems. We never
spotted this before because there was no such thing as a big
endian distro that supported Power9. Now we have AIX and the
elements are in the wrong part of the vector. This just fixes
it so the elements are loaded to and stored from the right
side of the vector.
2021-07-30 14:37:24 -05:00
Nemanja Ivanovic 1c50a5da36 [PowerPC] Implement partial vector ld/st builtins for XL compatibility
XL provides functions __vec_ldrmb/__vec_strmb for loading/storing a
sequence of 1 to 16 bytes in big endian order, right justified in the
vector register (regardless of target endianness).
This is equivalent to vec_xl_len_r/vec_xst_len_r which are only
available on Power9.

This patch simply uses the Power9 functions when compiled for Power9,
but provides a more general implementation for Power8.

Differential revision: https://reviews.llvm.org/D106757
2021-07-26 13:19:52 -05:00
Qiu Chaofan 240dde9482 [PowerPC] Change altivec indexed load/store builtins argument type
This patch changes the index argument of lvxl?/lve[bhw]x and
stvxl?/stve[bhw]x builtins from int to long. Because on 64-bit
subtargets, an extra extsw will always been generated, which is
incorrect.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D106530
2021-07-27 00:26:50 +08:00
Bardia Mahjour 2071ce9d45 [Altivec] Use signed comparison for vec_all_* and vec_any_* interfaces
We are currently being inconsistent in using signed vs unsigned comparisons for
vec_all_* and vec_any_* interfaces that use vector bool types. For example we
use signed comparison for vec_all_ge(vector signed char, vector bool char) but
unsigned comparison for when the arguments are swapped. GCC and XL use signed
comparison instead. This patch makes clang consistent with itself and with XL
and GCC.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D105666
2021-07-12 11:41:16 -04:00
Nemanja Ivanovic 84e429693f [PowerPC] Fix rounding mode for vec_round in altivec.h
The function is supposed to be the equivalent of rint() (as in
round to nearest, ties to even) rather than round() (round to
nearest, ties away from zero). In fact, the instruction we emit
without VSX is vrfin which is correct. However, with VSX we emit
xvrspi which is the equivalent of round() and therefore incorrect.
Since there is no equivalent VSX instruction, simply use vrfin
regardless of availability of VSX.
2021-07-12 06:11:27 -05:00
Nemanja Ivanovic 41ce5ec5f6 [PowerPC] Remove unnecessary 64-bit guards from altivec.h
A number of functions in the header have guards for 64-bit only
that were presumably added as some of the functions in the blocks
use vector __int128 which is only available in 64-bit mode.
A more appropriate guard (__SIZEOF_INT128__) has been added for
those functions since, making the 64-bit guards redundant.
This patch removes those guards as they inadvertently guard code
that uses vector long long which does not actually require 64-bit
mode.
2021-07-12 04:59:00 -05:00
Nemanja Ivanovic ef906573a1 [PowerPC] Fix vec_add for 64-bit on pre-Power7 subtargets
The shift of the carry was actually incorrect.
2021-06-24 18:42:44 -05:00
Nemanja Ivanovic 7cd2833311 [PowerPC] Add vec_vupkhpx and vec_vupklpx for XL compatibility
These are old names for these functions that XL still supports.
2021-05-14 08:02:00 -05:00
Nemanja Ivanovic 39e4676ca7 [PowerPC] Provide doubleword vector predicate form comparisons on Power7
There are two reasons this shouldn't be restricted to Power8 and up:
1. For XL compatibility
2. Because clang will expand comparison operators to these intrinsics*

*Without this patch, the following causes a selection error:

int test(vector signed long a, vector signed long b) {
  return a < b;
}

This patch provides the handling for the intrinsics in the back
end and removes the Power8 guards from the predicate functions
(vec_{all|any}_{eq|ne|gt|ge|lt|le}).
2021-05-13 04:56:56 -05:00
Nemanja Ivanovic 1faf3b195e [PowerPC] Re-commit ed87f512bb
This was reverted in 3761b9a234 just
as I was about to commit the fix. This patch inlcudes the
necessary fix.
2021-05-06 09:50:12 -05:00
Nico Weber 3761b9a234 Revert "[PowerPC] Provide some P8-specific altivec overloads for P7"
This reverts commit ed87f512bb.
Breaks check-clang, see e.g.
https://lab.llvm.org/buildbot/#/builders/139/builds/3818
2021-05-06 10:01:16 -04:00
Nemanja Ivanovic ed87f512bb [PowerPC] Provide some P8-specific altivec overloads for P7
This adds additional support for XL compatibility. There are a number
of functions in altivec.h that produce a single instruction (or a
very short sequence) for Power8 but can be done on Power7 without
scalarization. XL provides these implementations.
This patch adds the following overloads for doubleword vectors:
vec_add
vec_cmpeq
vec_cmpgt
vec_cmpge
vec_cmplt
vec_cmple
vec_sl
vec_sr
vec_sra
2021-05-06 08:37:36 -05:00
Nemanja Ivanovic bfd60b36f8 [PowerPC] Add floating point overloads for vec_sldw
These are added for compatibility with XLC.
2021-04-30 20:29:03 -05:00
Nemanja Ivanovic c3da07d216 [PowerPC] Provide fastmath sqrt and div functions in altivec.h
This adds the long overdue implementations of these functions
that have been part of the ABI document and are now part of
the "Power Vector Intrinsic Programming Reference" (PVIPR).

The approach is to add new builtins and to emit code with
the fast flag regardless of whether fastmath was specified
on the command line.

Differential revision: https://reviews.llvm.org/D101209
2021-04-30 19:17:48 -05:00
Nemanja Ivanovic 19b29b1ed1 [PowerPC] Provide XL-compatible builtins in altivec.h
There are some interfaces in altivec.h that are not compatible
between Clang and XL (although Clang is compatible with GCC).
Currently, we have found 3 but there may be others.

Clang/GCC signatures:

vector double vec_ctf(vector signed long long)
vector double vec_ctf(vector unsigned long long)
vector signed long long vec_cts(vector double)
vector unsigned long long vec_ctu(vector double)

XL signatures:

vector float vec_ctf(vector signed long long)
vector float vec_ctf(vector unsigned long long)
vector signed int vec_cts(vector double)
vector unsigned int vec_ctu(vector double)

This patch provides the XL behaviour under the __XL_COMPAT_ALTIVEC__
macro for users that rely on XL behaviour.

Differential revision: https://reviews.llvm.org/D101130
2021-04-23 15:13:46 -05:00
Nemanja Ivanovic 6725b90a02 [PowerPC] Add vec_ctsl and vec_ctul to altivec.h
These are added for compatibility with XLC. They are similar to
vec_cts and vec_ctu except that the result is a doubleword vector
regardless of the parameter type.
2021-04-23 11:03:38 -05:00
Nemanja Ivanovic 7a5641d651 [PowerPC] Add missing casts for vec_xlds and vec_load_splats
The previous commits just missed some pointer casts and ended up
producing warnings.
2021-04-22 10:31:00 -05:00
Nemanja Ivanovic 1cc1d9db28 [PowerPC] Add vec_vclz as an alias for vec_cntlz in altivec.h
Another addition for compatibility with XLC. The functions have the
same overloads so just add it as a preprocessor define.
2021-04-22 10:31:00 -05:00
Nemanja Ivanovic e43963db24 [PowerPC] Add vec_load_splats to altivec.h
Add these overloads for compatibility with XLC. This is a word
load-and-splat.
2021-04-22 10:31:00 -05:00
Nemanja Ivanovic a0e6189712 [PowerPC] Add vec_xlds to altivec.h
Add these overloads for compatibility with XLC. This is a doubleword
load-and-splat.
2021-04-22 10:31:00 -05:00
Nemanja Ivanovic a1d325af67 [PowerPC] Add vec_roundz as alias for vec_trunc in altivec.h
Add the overloads for compatibility with XLC.
2021-04-22 10:31:00 -05:00
Nemanja Ivanovic 1550c47c18 [PowerPC] Add vec_roundp as alias for vec_ceil
Add the overloads for compatibility with XLC.
2021-04-22 10:30:59 -05:00
Nemanja Ivanovic 51692c6c63 [PowerPC] Add missing VSX guard for vec_roundm with vector double
The guard was missed in the previous commit.
2021-04-22 10:30:59 -05:00
Nemanja Ivanovic 3a46667059 [PowerPC] Add vec_roundm as alias for vec_floor in altivec.h
Add the overloads for compatibility with XLC.
2021-04-22 10:30:59 -05:00
Nemanja Ivanovic 3bcd0ece43 [PowerPC] Add vec_roundc as alias for vec_rint in altivec.h
For compatibility with XLC, add these overloads.
2021-04-22 05:31:38 -05:00
Nemanja Ivanovic 06411edb9f [PowerPC][NFC] Provide legacy names for VSX loads and stores
Before we unified the names of the builtins across all the
compilers, there were a number of synonyms between them. There
is code out there that uses XL naming for some of these loads and
stores. This just adds those names.
2021-03-25 06:32:40 -05:00
Nemanja Ivanovic 4020932706 [PowerPC] Make altivec.h work with AIX which has no __int128
There are a number of functions in altivec.h that use
vector __int128 which isn't supported on AIX. Those functions
need to be guarded for targets that don't support the type.
Furthermore, the functions that produce quadword instructions
without using the type need a builtin. This patch adds the
macro guards to altivec.h using the __SIZEOF_INT128__ which
is only defined on targets that support the __int128 type.
2021-03-24 00:35:51 -05:00
Nemanja Ivanovic 4146864735 [PowerPC][NFC] Use valid type for offset in altivec.h
We currently use signed long long instead of ptrdiff_t for offsets
in altivec.h. This has never really presented a problem because
all platforms where we use these are 64-bit. However, now that
we have 32-bit targets, we need to use a meaningful type.
2021-03-23 08:45:37 -05:00
Nemanja Ivanovic 2f782a796a [PowerPC] Add more missing overloads to altivec.h
Add overloads that perform subtraction on v1i128 that take and
produce vector unsigned char to avoid needing to use __int128.
The overloads are suffixed with _u128 and are needed for targets
where __int128 isn't supported (AIX).
2021-03-23 05:52:36 -05:00
Nemanja Ivanovic 54e4654f04 [PowerPC] Add more missing overloads to altivec.h
Add overloads that perform addition on v1i128 that take and produce
vector unsigned char to avoid needing to use __int128. The overloads
are suffixed with _u128 and are needed for targets where __int128
isn't supported (AIX).
2021-03-23 05:09:19 -05:00
Nemanja Ivanovic 10cc5bcd86 [PowerPC] Add more missing overloads to altivec.h
Add vec_permi as a synonym for vec_xxpermdi (but only for
doubleword vectors).
2021-03-22 23:09:41 -05:00
Nemanja Ivanovic b5e96e0ad6 [PowerPC] Add more missing overloads to altivec.h
Add vec_gbb as a synonym for vec_vgbbd but for doubleword vectors.
2021-03-22 22:25:28 -05:00
Nemanja Ivanovic d8e574c8e6 [PowerPC] Add more missing overloads to altivec.h
Add vec_cvf as a synonym for vec_doublee/vec_floate.
2021-03-22 22:08:43 -05:00
Nemanja Ivanovic bef2cb9062 [PowerPC] Add more missing overloads to altivec.h
Add vec_ctd which is similar to vec_ctf except the return type is
vector double rather than vector float.
2021-03-22 20:23:07 -05:00
Nemanja Ivanovic b5fae4b9b2 [PowerPC] Add more missing overloads to altivec.h
We are missing more predicate forms for 'vector double' and some
tests. This adds the missing overloads and completes the set of
test cases for them.
2021-03-12 10:51:57 -06:00
Nemanja Ivanovic f4ad7a1a15 [PowerPC] Add missing double precision vec_all overloads to altivec.h
We somehow missed vec_all_nlt, vec_all_nle and vec_all_numeric
overloads for double precision vectors when VSX is enabled.
2021-03-05 18:42:12 -06:00