Freddy Ye
|
73c9cf8204
|
[X86][FP16] add alias for f*mul_*ch intrinsics
*_mul_*ch is to align with *_mul_*s, *_mul_*d and *_mul_*h.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D112777
|
2021-11-17 13:26:11 +08:00 |
|
Wang, Pengfei
|
ebec077e07
|
[X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D109658
|
2021-09-23 11:02:48 +08:00 |
|
Wang, Pengfei
|
2aaa6466fe
|
[X86] Support *_set1_pch(Float16 _Complex h)
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D109487
|
2021-09-11 17:47:31 +08:00 |
|
Wang, Pengfei
|
ab40dbfe03
|
[X86] AVX512FP16 instructions enabling 6/6
Enable FP16 complex FMA instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105269
|
2021-08-30 13:08:45 +08:00 |
|
Wang, Pengfei
|
c728bd5bba
|
[X86] AVX512FP16 instructions enabling 5/6
Enable FP16 FMA instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105268
|
2021-08-24 09:07:19 +08:00 |
|
Wang, Pengfei
|
b088536ce9
|
[X86] AVX512FP16 instructions enabling 4/6
Enable FP16 unary operator instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105267
|
2021-08-22 08:59:35 +08:00 |
|
Wang, Pengfei
|
2379949aad
|
[X86] AVX512FP16 instructions enabling 3/6
Enable FP16 conversion instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105265
|
2021-08-18 09:03:41 +08:00 |
|
Wang, Pengfei
|
f1de9d6dae
|
[X86] AVX512FP16 instructions enabling 2/6
Enable FP16 binary operator instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105264
|
2021-08-15 08:56:33 +08:00 |
|
Freddy Ye
|
6c1468854d
|
[X86] Reverse *_set_ph and *_setr_ph 's set order.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D107946
|
2021-08-12 16:27:04 +08:00 |
|
Wang, Pengfei
|
6f7f5b54c8
|
[X86] AVX512FP16 instructions enabling 1/6
1. Enable FP16 type support and basic declarations used by following patches.
2. Enable new instructions VMOVW and VMOVSH.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105263
|
2021-08-10 12:46:01 +08:00 |