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7 Commits

Author SHA1 Message Date
Dmitry Preobrazhensky f90f0e8fe7 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description 
Summary of changes:
- Update MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Add v_cvt_pkrtz_f16_f32_dpp, v_cvt_pkrtz_f16_f32_sdwa.
- Update SMEM syntax (see https://reviews.llvm.org/D127314).
- Enable op_sel for v_add_nc_u16, v_sub_nc_u16 (see https://reviews.llvm.org/D123594).
- Minor bug fixing and improvements.
 2022-07-04 13:30:56 +03:00
Dmitry Preobrazhensky c33770d87f [AMDGPU][DOC][NFC] Updated GFX10 assembler syntax description 
The description has been updated to reflect AMDGPU MC changes:
- enabled literals for src0 of v_fmaak_f*, v_fmamk_f*, v_madak_f32, v_madmk_f32;
- enabled global_atomic_fcmpswap and global_atomic_fcmpswap_x2;
- enabled dlc with flat_atomic* and global_atomic_*.

Bug fixing and improvements:
- enabled s_wait_idle;
- enabled s_waitcnt_depctr;
- added description of s_waitcnt_depctr syntactic sugar;
- disabled SYSMSG_OP_HOST_TRAP_ACK (it is not supported on GFX10);
- corrected description of lgkmcnt (accept values from 0 to 63).
 2022-04-12 15:18:44 +03:00
Dmitry Preobrazhensky c7ca4c6365 [AMDGPU][GFX10][MC] Updated symbolic names of internal HW registers 
GFX10 no longer support HW_ID. It has been replaced with HW_ID1 and HW_ID2.
See bug 52904: https://github.com/llvm/llvm-project/issues/52904

Differential Revision: https://reviews.llvm.org/D117313
 2022-01-17 20:29:10 +03:00
Dmitry Preobrazhensky 8ea3e9d9a2 [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. 
Summary of changes:
- Added f16 omod modifier (bug 51386).
- Corrected names of data types (bug 48638).
- Enabled a16 with most GFX10 MIMG opcodes (see https://reviews.llvm.org/D102231).
- Corrected description of integer operands (bug 51130).
- Corrected description of 8-bit DS offsets (bug 51536).
- Improved PERMLANE op_sel description.
- Corrected *SAD* opcode types.
 2021-08-27 17:23:20 +03:00
Dmitry Preobrazhensky 3f7985e6ec [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. 
Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
 2020-08-21 14:25:14 +03:00
Dmitry Preobrazhensky b9683d3c53 [AMDGPU][MC][DOC] Updated AMD GPU assembler description. 
Summary of changes:
- Updated to reflect recent changes in assembler;
- Minor bugfixing and improvements.

llvm-svn: 372857
 2019-09-25 12:38:35 +00:00
Dmitry Preobrazhensky cef9d42157 [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. 
Summary of changes:
- added description of GFX10;
- added description of operands sccz, vccz, lds_direct, etc;
- minor bugfixing and improvements.

llvm-svn: 365347
 2019-07-08 16:50:11 +00:00